This is work-in-progress, it implements multiple ARF
encoding behind an experimental flag.
It adds the ability to insert multiple ARF frames into a
single ARF group. This patch implements the reordering
of the coded frames, and implements a fixed-length coding
pattern. It applies a fixed quantizer strategy based on
where the frame is in the coding sequence.
Further work to modify the rate control strategy is
ongoing and will be submitted via a set of future patches.
In this first step, each ARF group is recursively
bisected and an ARF frame added at that position in the
sequence. The recursion continues until ARF frames are
within MIN_GF_INTERVAL frames.
The code sits behind the "multiple-arf" experimental
flag ("CONFIG_MULTIPLE_ARF"). The experimental flag
"oneshotq" ("CONFIG_ONESHOTQ") also needs to be enabled
for this patch to work correctly.
Change-Id: Ie473b05ebb43ac473c0cfb659b2b8042823085e2
Pick up VP8 encryption, quantization changes, and some fixes to vpxenc
Conflicts:
test/decode_test_driver.cc
test/decode_test_driver.h
test/encode_test_driver.cc
vp8/vp8cx.mk
vpxdec.c
vpxenc.c
Change-Id: I9fbcc64808ead47e22f1f22501965cc7f0c4791c
Adding -Wshadow to CFLAGS generated a bunch of warnings. This commit
is based on work already done by jzern.
Change-Id: Iefc08a7ab601c4d1b507f039577433bfb1c6cc9d
Writing all #define guards using the same style. Inlining macro
VP8DX_BOOL_DECODER_FILL into vp8dx_bool_decoder_fill. Removing unnecessary
includes.
Change-Id: I483fa979ab34008bf7835b5f34c6471c44daf956
Remove dependency of this function on asm_offsets. ssse3/sse4 next.
Change quant_shift calculation so it be done using SIMD. Pre-calculate
as much as possible to simplify EOB selection.
Take advantage of qcoeff being zero'd by tying the if statements
together.
Speed parity with previous implementation with gcc x86_64 linux
Change-Id: Ife97556a1eca3a74b09def1a3d04084974dff1fb
Reduce dependency on offsets file by using intrinsics. Disassembly shows
improvements over previous assembly specifically in register management,
preloading, and {pro,epi}log. Speed change is within margin of error.
Change-Id: I8131b4b4d62bc092407fe847bfaa8f2c0e1384ff
Started adding support for multiple internal decoder instances. Also added
code to limit the vp8 config options available when using frame-based
multithreading.
Change-Id: I0f1ee7abcfcff59204f50162e28254b8dd6972eb
Adds a flag to disable features that would inhibit frame parallel
decoding. This includes backward adaptation and MV sorting based
on search in ref frame buffer.
Also includes some minor clean-ups.
Change-Id: I434846717a47b7bcb244b37ea670c5cdf776f14d
When error concealment is enabled, it swaps the mi and prev_mi ptrs after
each frame is decoded. The postproc uses the mi ptr for the mode info context.
Now the postproc will use the correct mode info context.
Change-Id: I537ae5450f319c624999b44525bb52bb30047b7b