3d98205fce
Move fdct32x32 SSE2 implementation in separate file.
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This is in preparation for the SSE2 version of the high-precision
32x32 forward DCT which will share a lot of code with the existing
low precision version used for rate-distortion search.
Change-Id: I7084b6bdfb480b1fabb8493fb14e3f7fcc7888c0
2013-08-06 10:17:11 -07:00
25ec1375c9
intrapred x86inc guards
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Change-Id: If0399d8e11f4ebe75a5c91abb8d6a52a7709065b
2013-08-06 09:39:30 -07:00
62c6aa884d
block error / x86inc mods
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Change-Id: Icb607745634e10b9bac5019d06661ece09fcdb40
2013-08-06 06:23:38 -07:00
a93b115cd6
reworked config for use_x86_inc
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Support enabling it or disabling it. Moved read out to configure.sh
so that its done once instead of in make and in config.
Change-Id: I73a9190cf31de9f03e8a577f478fa522f8c01c8b
2013-08-05 17:35:25 -07:00
d115cd8b12
Merge changes I082959ab,Ib6932640
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* changes:
vp9/decoder: threaded row-based loop filter
vp9/decoder: add thread worker
2013-08-05 16:07:09 -07:00
b9c7d04e95
Finally removing all old block size constants.
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Change-Id: I3aae21e88b876d53ecc955260479980ffe04ad8d
2013-08-05 15:23:49 -07:00
f4837579d1
fixed script problem with config_force_x86_inc
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Change-Id: I226e5094d216b09dc47fa5511a66e2d314608000
2013-08-05 14:48:20 -07:00
a5a7322459
Merge "Begin to restrict x86inc.asm usage"
2013-08-05 14:17:49 -07:00
8b3faccb9e
Add variance based mode/skipping
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Adds a speed feature to skip all intra modes other than
DC_PRED if the source variance is small. This feature is
made part of speed 1 and up.
Results on derf300: psnr -0.07%, speedup about 1-2%
Also uses the source variance to fine-tune the early
termination criteria when FLAG_EARLY_TERMINATE is on.
This feature is made part of speed 2 and up.
Results on derf300: psnr -0.52%, speedup about 5-7%
Change-Id: I59e38aa836557cfa5405ae706fc64815cbfe4232
2013-08-05 14:14:01 -07:00
9f988a2edf
Merge "cleanups after bw bh code"
2013-08-05 14:02:02 -07:00
a0ffa2794b
vp9/decoder: threaded row-based loop filter
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Currently the only threaded option for vp9 decode. Enabled when the
decoder config thread count is > 1.
Change-Id: I082959abac9e31aa4a38ed9fd68b94680e57f4df
2013-08-05 13:22:04 -07:00
183b77d5ab
vp9/decoder: add thread worker
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vp9/decoder/vp9_thread.[hc]
Original source:
http://git.chromium.org/webm/libwebp.git
100644 blob b1615d0fb8d311666b2fa4561076c62d72c2e3ff src/utils/thread.c
100644 blob 13a61a4c84194c3374080cbf03d881d3cd6af40d src/utils/thread.h
Local modifications:
- s/WebP/VP9/g
- camelcase functions -> lower with _'s
Change-Id: Ib6932640ee34f8b4782c6fbd15864a59d5d4c5fe
2013-08-05 13:21:13 -07:00
3f611555d7
Changing the order switchable filter enum constants.
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This changeset allows to remove vp9_switchable_interp and
vp9_switchable_interp_map arrays and make code much clear. Actually we
still have to use these mapping but only inside read_interp_filter_type and
write_interp_filter_type functions.
Change-Id: I4026c6f8c4acefba6c81421b7bacbaa52cc45f50
2013-08-05 12:26:15 -07:00
5d2cb7ead0
cleanups after bw bh code
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Cons bw/bh parms that should have been const. Additional formatting.
Change-Id: Icd36a5c9dc17dadd7284315ac0d6fef1a565ca16
2013-08-05 12:15:52 -07:00
9ab47772bd
Update README
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- new date
- add VP9 to the title
- update list of available targets
Change-Id: I56263336db393020bac5da8e42fbac3a276ffb1f
2013-08-05 12:13:32 -07:00
c3809f3de5
Begin to restrict x86inc.asm usage
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Chromium does not support 32bit builds for Mac which use x86inc.asm.
Make the files which include it work if 64bit or not PIC enabled
starting with vp9_copy_sse2.asm
Consolidate these targets in vp9_rtcd_defs.sh
Change-Id: If18f0b957a611efd085a3ee7d245cf1eb91e8248
2013-08-05 12:07:30 -07:00
d007446b3f
Replacing long block size enum values with shorter ones (2).
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Change-Id: I428c4d42212b757112e3acfe5b81314cfbb5fd6b
2013-08-05 10:51:02 -07:00
319867d71c
Merge "Cleaning up vp9_build_inter_predictor function."
2013-08-05 01:52:11 -07:00
78671e2eff
Merge "Replacing "txfm" with "tx" in identifiers."
2013-08-04 02:52:22 -07:00
f703f98757
reworked find_mv_ref
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This is an attempt at rewriting vp9_find_mv_refs_idx. I believe that it gains
about 1-2% decode speed
Change-Id: Ia5359c94ce9bb43b32652890e605e9a385485c1b
2013-08-03 20:25:55 -07:00
fe2a201eb1
Replacing "txfm" with "tx" in identifiers.
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Consistent names with TX_SIZE, TX_MODE, and TX_MODE.
Change-Id: I79592218bf5a40ace89197a34a06ee7de581ed8d
2013-08-02 17:28:23 -07:00
5edc65d00d
Removing NMS_STATS defines.
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Change-Id: Iabab0e59042a33456df1d449c0d0f01debc00c7c
2013-08-02 17:10:15 -07:00
7b50333e8f
Merge "Adding is_inter_block function."
2013-08-02 16:54:32 -07:00
5f0a52faaf
Cleaning up vp9_build_inter_predictor function.
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Change-Id: I94f6b4272b95ac101de6d10f048116ba065788b0
2013-08-02 16:53:18 -07:00
fec4ec4edd
Removing unused functions.
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Removed functions:
model_rd_for_sb_y,
block_error_sby,
get_sb_variance
Change-Id: Iec458df180caf6f8eac3605773841a4121dd3a8f
2013-08-02 16:41:09 -07:00
603931e291
Merge "Changing function arg type from int_mv* to MV*."
2013-08-02 16:30:06 -07:00
a6adc82e78
Merge "Cleanups around allow_high_precision_mv flag."
2013-08-02 16:27:05 -07:00
680ec32d18
Adding is_inter_block function.
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Using it instead of long unclear verbose check
"mbmi->ref_frame[0] != INTRA_FRAME".
Change-Id: I9c7b4b3797942fa962bf3ba7460fff3084beabe9
2013-08-02 16:25:33 -07:00
d4e020c4b1
Merge "Cleaning up set_contexts_on_border function."
2013-08-02 16:22:50 -07:00
d340c114fb
Merge "Add more checking to using_small_partition_info"
2013-08-02 15:55:09 -07:00
769bcab3f5
Cleaning up set_contexts_on_border function.
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Change-Id: I8f21c18b29f54b277fb1c167f278f109d9f3b996
2013-08-02 15:52:26 -07:00
25b77e2569
Changing function arg type from int_mv* to MV*.
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Change-Id: Ic878d31df2ce783a2c9a8c4bc9ed301ec8ffe25e
2013-08-02 15:26:32 -07:00
5d86f3886d
Moving struct loop_filter_info from *.h to *.c file.
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Change-Id: I3fe90eb40088a5b07bdc7d66d93ffe6ef99943d5
2013-08-02 11:53:49 -07:00
60ff123536
Merge "Fixed typos and added a few explanatory comments"
2013-08-02 11:37:47 -07:00
075b11f004
Merge "Changed name of rd_pick_intra4x4mby_modes"
2013-08-02 11:36:46 -07:00
8ff58093f0
Merge "vp9: neon: convolve: replace some insns with simpler equivalents"
2013-08-02 11:28:31 -07:00
8bebfbf7c5
Merge "vp9: neon: convolve: simplify branching to C fallbacks"
2013-08-02 11:28:25 -07:00
7d14ce8ba5
Merge "vp9: neon: optimise loads in horiz convolve functions"
2013-08-02 11:28:04 -07:00
319b7dc283
Merge "vp9: neon: add vp9_mb_lpf_* functions"
2013-08-02 11:27:52 -07:00
86053d3ae2
Cleanups around allow_high_precision_mv flag.
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Change-Id: Ic07f5f8ffeaedd5b7513b464871f83afc82dcd5c
2013-08-02 11:21:16 -07:00
b47153deed
Replacing long block size enum values with shorter ones.
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Change-Id: I0e9329490828684a4fd46f540d89114cc68e8407
2013-08-02 10:48:27 -07:00
0d68080445
Merge "Comment out 2 unused speed features"
2013-08-02 09:58:46 -07:00
355cb14dc7
vp9: neon: convolve: replace some insns with simpler equivalents
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Change-Id: I5d6906772e6e6adf68d7f0fd5b8b5207a64a3a37
2013-08-02 08:11:28 -07:00
2003468df8
vp9: neon: convolve: simplify branching to C fallbacks
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Change-Id: Ic7cacd02d6dc9243ad8fc85082c5618a9d1e66dc
2013-08-02 08:11:25 -07:00
5e2e78d024
vp9: neon: optimise loads in horiz convolve functions
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Loading to single lanes in multiple registers is expensive since
it requires a read and write of each register which saturates
the register file access. Loading to single registers followed
by a separate transpose reduces this pressure.
Change-Id: I4cc35887ddbca80e5e635b50d2b1d158de9668ee
2013-08-02 08:11:08 -07:00
d85ae87183
vp9: neon: add vp9_mb_lpf_* functions
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Change-Id: I13e0880df234f15abc4cc7c57fe84488d5d46a75
2013-08-02 08:10:50 -07:00
d91e9f4e36
Merge "Cleanup: replacing xd->seg with seg, and xd->lf with lf."
2013-08-01 23:17:17 -07:00
4144fee9e9
Merge "Cleanup: reusing clamp_mv function."
2013-08-01 23:16:56 -07:00
555bbd68c7
Merge "Remove unused vp9_short_idct10_32x32_add"
2013-08-01 15:41:35 -07:00
741537f3ce
Cleanup: replacing xd->seg with seg, and xd->lf with lf.
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Change-Id: I73b59d7699a8e7e7acd3bf8041cb6c98ce9ba4bf
2013-08-01 15:38:16 -07:00
Christian Duvivier
Jim Bankoski
James Zern
Dmitry Kovalev
Deb Mukherjee
Paweł Hajdan
Yunqing Wang
Adrian Grange
Johann
Mans Rullgard
Jingning Han