Граф коммитов

17883 Коммитов

Автор SHA1 Сообщение Дата
Nathan E. Egge 0435f0eae6 Silence clang-format code review warning.
Change-Id: Ic76de4a4c0c39924bf04c3c2fa9214d33bcee9fb
2016-10-14 14:59:27 -07:00
Nathan E. Egge 8043cc4018 Use Daala entropy coder to code bits.
When building with --enable-daala_ec, calls to aom_write() and aom_read()
 use the daala entropy coder to write and read bits.
When the probability is exactly 0.5 (128), then raw bits are used.

ntt-short-1:

          MEDIUM (%) HIGH (%)
    PSNR -0.027556  -0.020114
 PSNRHVS -0.027401  -0.020169
    SSIM -0.027587  -0.020151
FASTSSIM -0.027592  -0.020102

subset1:

         RATE (%)  DSNR (dB)
    PSNR 0.03296  -0.00210
 PSNRHVS 0.03537  -0.00281
    SSIM 0.03299  -0.00161
FASTSSIM 0.03458  -0.00111

Change-Id: I48ad8eb40fc895d62d6e241ea8abc02820d573f7
2016-10-14 14:59:27 -07:00
Yaowu Xu 931bc2a714 Clear existing format issue in the codebase
Fix the clang-format warnings on the existing codes.

Change-Id: I8e9e781b6f68f41a7fbd0a2116f6b35290d73dc8
2016-10-14 14:59:27 -07:00
Nathan E. Egge 1078dee569 Add Daala entropy coder.
Change-Id: I2849a50163268d58cc5d80aacfec1fd02299ca43
2016-10-14 14:59:27 -07:00
Alex Converse b60dfc2542 Merge "Switch rANS to 15 bit precision, and adjust L_BASE." into nextgenv2 2016-10-14 21:56:34 +00:00
Alex Converse 62a94a649d Switch rANS to 15 bit precision, and adjust L_BASE.
This causes rANS to operate at the same precision as the Daala EC.

aom/master stats: rans10uabs8lbase12 → rans15uabs8lbase15

objective-1-fast
PSNR YCbCr:      0.01%      0.01%      0.01%
   PSNRHVS:      0.01%
      SSIM:      0.01%
    MSSSIM:      0.01%
 CIEDE2000:      0.01%

subset1
PSNR YCbCr:     -0.01%     -0.00%     -0.00%
   PSNRHVS:     -0.01%
      SSIM:     -0.01%
    MSSSIM:     -0.01%
 CIEDE2000:     -0.01%

(cherry picked from aom/master commit ddbc2e2a68)

Change-Id: I6ef0a4f6198784b3712a61af9f105d560a22eaea
2016-10-14 14:05:50 -07:00
Urvang Joshi 74114a3a1e Bugfix: fix the build for CONFIG_FP_MB_STATS
Cherry-picked from aomedia/master: bf6c636

Change-Id: Iea3fb46d23cb94d1152de3a7a40b6a183e78b4d7
2016-10-14 13:42:53 -07:00
Urvang Joshi b100db7c1d Wrap palette code inside CONFIG_PALETTE flag.
This flag was already added to aomedia/master, so bringing it back to
webm/nextgenv2, as part of an effort to get the two codebases in sync.

Change-Id: I2b933a6a160e4210d1411a9e7978149eb8553205
2016-10-14 13:42:02 -07:00
Yi Luo e9fde265f7 Zero high 128b YMM registers to avoid SSE-AVX transition penalties
Documents:
- https://software.intel.com/en-us/articles/intel-avx-state-transitions-migrating-sse-code-to-avx
- https://software.intel.com/sites/default/files/m/d/4/1/d/8/11MC12_Avoiding_2BAVX-SSE_2BTransition_2BPenalties_2Brh_2Bfinal.pdf

Change-Id: I90f85fcb15a7a2c49ee068300be6ffe9c68d371c
2016-10-14 12:22:35 -07:00
James Zern fbabcad67c Merge changes I4850b36e,Ic4d7128a into nextgenv2
* changes:
  variance_avx2: sync variance functions with c-code
  Resolve -Wshorten-64-to-32 in variance.
2016-10-14 19:10:20 +00:00
Yaowu Xu 8d510e2e78 Use "av1" as codec name
Change-Id: I7650f1e96df0bcd53b1733c7967aae52dccf836a
2016-10-14 11:05:54 -07:00
Yaowu Xu 931bf3d6e1 Merge "Revert "Revert "Move CLPF block signals from frame to SB level.""" into nextgenv2 2016-10-14 17:58:20 +00:00
Yi Luo b9fbf38bff Merge "Delete some redundant function declarations in aom_dsp_rtcd_defs.pl" into nextgenv2 2016-10-14 17:50:37 +00:00
Yaowu Xu d71be7815d Revert "Revert "Move CLPF block signals from frame to SB level.""
This reverts commit 9b25f30674 to
reinstate the reverted commit with fixes that solved the build issues
when --enalbe-clpf is used in configure.

Change-Id: I15447cae7fa9b3deb27976345dc3db230a4a7a60
2016-10-14 08:58:49 -07:00
Yaowu Xu 4b71775307 Merge "Revert "Move CLPF block signals from frame to SB level."" into nextgenv2 2016-10-14 15:39:36 +00:00
Yaowu Xu 9b25f30674 Revert "Move CLPF block signals from frame to SB level."
This reverts commit 975350387c.

Change-Id: I9f8e891739352ca2bde4b294e37c85a668f416e0
2016-10-14 15:39:03 +00:00
James Zern 8c64331aa2 variance_avx2: sync variance functions with c-code
add missing int64 -> uint32 cast; quiets -Wshorten-64-to-32 warnings

Change-Id: I4850b36e18dc8b399108342be4bfe0b684aefb78
(cherry picked from commit 6acd061aad8cf62000cc9117390d0c94581a8591)
2016-10-13 20:15:18 -07:00
Alex Converse 2176b7acc2 Resolve -Wshorten-64-to-32 in variance.
The subtrahend is small enough to fit into uint32_t.

Change-Id: Ic4d7128aaa665eaf6b25d562610ba8942c46137f
(cherry picked from commit c0241664aac3a1805db9bd8e09e071ac326531e0)
2016-10-13 20:12:20 -07:00
Debargha Mukherjee 078856a4df Merge "Simplify 8x16 and 16x8 inverse transform tests" into nextgenv2 2016-10-14 02:53:38 +00:00
Debargha Mukherjee 089315fc5e Merge "Enable test system to detect transforms misusing 'stride' parameter" into nextgenv2 2016-10-14 02:50:47 +00:00
Debargha Mukherjee a720f4b3b5 Merge "Add sse2 forward and inverse 16x32 and 32x16 transforms" into nextgenv2 2016-10-14 02:49:20 +00:00
Yue Chen a48764d05f Merge "Renamings for OBMC experiment" into nextgenv2 2016-10-14 01:33:00 +00:00
Yi Luo 761ae880d7 Delete some redundant function declarations in aom_dsp_rtcd_defs.pl
Change-Id: I4df57a7faba5800c048b2dc469ec31545406f55c
2016-10-13 17:53:45 -07:00
Steinar Midtskogen 975350387c Move CLPF block signals from frame to SB level.
These signals were in the uncompressed frame header (as a temporary
hack), which caused two problems:

* We don't want that header to be duplicated in the slice header
* It was necessary to signal the number of bits to transmit up front

However, the filter size can be 128x128 which is greater than the SB
size, and a decoder wouldn't be able to know whether to read a bit or
not until the final SB of that 128x128 block has been decoded
(depending on whether the 128x128 is all skip or not).  Therefore the
signalling was changed for 128x128 blocks so that every top left SB of
a 128x128 filter block contains a signal regardless of whether the
block is all skip or not.  Also, all the MB's of 128x128 block are
filtered even if they are skip MB's.  This gives the signal a purpose
even when the 128x128 block is all skip, and it also gives a slight
coding gain as it leaves a way to filter skip blocks, which was
previously forbidden.

Low latency:
PSNR YCbCr:     -0.19%     -0.14%     -0.06%
   PSNRHVS:     -0.15%
      SSIM:     -0.13%
    MSSSIM:     -0.15%
 CIEDE2000:     -0.19%

High latency:
PSNR YCbCr:     -0.03%     -0.01%     -0.09%
   PSNRHVS:      0.04%
      SSIM:      0.00%
    MSSSIM:      0.02%
 CIEDE2000:     -0.02%

Change-Id: I69ba7144d07d388b4f0968f6a53558f480979171
2016-10-13 16:06:10 -07:00
Yue Chen cb60b185c7 Renamings for OBMC experiment
To get ready for pulling AV1 to nextgenv2
Replace the experimental flag by MOTION_VAR. Rename major variables.

Change-Id: If6cf4f37b9319c46d8f90df551cc7295d66ca205
2016-10-13 15:51:22 -07:00
Steinar Midtskogen 2d5f752ae9 Don't use _mm_cvtsi128_si64 on 32 bit systems
Change-Id: I332afb8d9e35cd60f05915160a5b2e1dc8757de5
2016-10-13 14:35:00 -07:00
Yaowu Xu 410fee8de6 Fix formatting in a few files
Change-Id: Ia5175afe82b142d9e18c01c546610202c630588e
2016-10-13 13:04:29 -07:00
Jean-Marc Valin a8ce2c9199 Removing some useless loops in deringing filter
No change in the output

Change-Id: I1627feaa163d65da0df90e9dacbc5e39ee755de8
2016-10-13 18:27:25 +00:00
Jean-Marc Valin 209f830d97 Fix deringing level choice for 10-bit and 12-bit
Making sure we never exceed a base level of 63

Change-Id: I821254b8d970446bd40fdd6e4d7073c69760a86d
2016-10-13 18:27:17 +00:00
Jean-Marc Valin 3cfec90d33 Don't dering superblocks that have deringing disabled
Doesn't change the output, but avoids useless deringing with threshold=0

Change-Id: I69f3e54abad2d2493cfbc76c188ad7d190f0aeff
2016-10-13 18:27:03 +00:00
Yaowu Xu 98e9ce923b Merge "Add SSE4.1 code for deringing functions." into nextgenv2 2016-10-13 18:02:59 +00:00
Michael Bebenita 7227b65c4c Add SSE4.1 code for deringing functions.
Change-Id: I363f7fb610a5c86ea9f417e34b57c6373af877e5
2016-10-13 18:02:19 +00:00
Yaowu Xu 3feb89170b Merge "Simpler threshold calculation for the second filter" into nextgenv2 2016-10-13 18:01:45 +00:00
Yaowu Xu 5d2f01284f Merge "Make 4x4 deringing (chroma) use shorter filters" into nextgenv2 2016-10-13 18:01:23 +00:00
Yaowu Xu fd44e24541 Merge "Removing Daala-specific deringing code" into nextgenv2 2016-10-13 18:01:11 +00:00
Zoe Liu 12cbaac759 Merge "Clean code a bit and fix a couple of small bugs in ext-refs" into nextgenv2 2016-10-13 16:47:03 +00:00
Yaowu Xu 9ffdf48c5a Merge "Use a quantizer-based threshold rather than full search for deringing" into nextgenv2 2016-10-13 16:35:08 +00:00
Yaowu Xu 8ac419f307 Merge changes Ic3a68557,Ib1dbe41a,I0da09270,Ibdbd720d into nextgenv2
* changes:
  Deringing cleanup: remove DERING_REFINEMENT (always on now)
  Don't run the deringing filter on skipped blocks within a superblock
  Don't dering skipped superblocks
  On x86 use _mm_set_epi32 when _mm_cvtsi64_si128 isn't available
2016-10-13 15:54:32 +00:00
Zoe Liu f0e4669edb Clean code a bit and fix a couple of small bugs in ext-refs
Currently the patch does not have any impact on the RD performance. The
fix could however potentially help on the next step of work, especially
when the extra altref frames allow non-zero temporal filtering strength
and their corresponding OVERLAY frames, i.e. the INTNL_OVERLAY frames
are being added.

Change-Id: I2e07fb3d0aa547a0b5dd05bb4ba865cd46309076
2016-10-13 08:42:51 -07:00
Yaowu Xu 89d3f2fd10 Merge "Sync 2x2 intra predictors" into nextgenv2 2016-10-13 15:20:52 +00:00
David Barker 4f803efac1 Simplify 8x16 and 16x8 inverse transform tests
Change-Id: Ie86aedfb1f3e0d9c0cf58d7183861a0ed0e8ccc8
2016-10-13 16:02:59 +01:00
David Barker 7825022daa Enable test system to detect transforms misusing 'stride' parameter
This would have caught the bug introduced in patch set 1 of
https://chromium-review.googlesource.com/#/c/397378/

Change-Id: I9c6d5d9c4c98aed5ac48c4fb1c4ff4131b0df1d5
2016-10-13 15:50:44 +01:00
Alex Converse cba3d1f1c3 AnsTest: Replace the dummy distribution
Use constrained token table row 65/256 instead.

Change-Id: I8b442d4c82af8fa9d36ac2de0d73179ed040478d
(cherry picked from commit 47eb9a2ca4)
2016-10-13 07:04:55 -07:00
Alex Converse fc4980edb7 Merge changes Ic74d9d88,Ie93b474e,I544989ea,Ic273f7d9,Idfd2d2b3, ... into nextgenv2
* changes:
  Remove custom rans types
  Remove add_token_no_extra.
  Remove unused aom_rans_build_cdf_from_pdf
  Add the tool used to generate the constrained tokenset.
  Remove the starting zero from ANS CDFs.
  Import the aom_read/write_symbol abstractions from aom/master
2016-10-13 14:03:15 +00:00
David Barker 33231d4801 Add sse2 forward and inverse 16x32 and 32x16 transforms
Change-Id: I1241257430f1e08ead1ce0f31db8272b50783102
2016-10-13 14:01:22 +01:00
Debargha Mukherjee cad8283e55 Merge "Fix a bug in inverse halfright 32x32 transform" into nextgenv2 2016-10-13 08:16:47 +00:00
Alex Converse 9ed1a2ff44 Remove custom rans types
(cherry picked from aom/master commit 11206c60d9)

Includes renames in a bunch of places not handled by the original
due to differing tree states.

Change-Id: Ic74d9d8850b8c80a51e55e425bbf472a67e2653f
2016-10-13 05:53:58 +00:00
Jingning Han e3954d8312 Sync 2x2 intra predictors
Add 2x2 DC, V, H, TM intra predictors.

Change-Id: I2a614adde553f821c45bc5a9bf09800a9f0aaa26
2016-10-12 21:04:01 -07:00
Jean-Marc Valin 4713d8d019 Simpler threshold calculation for the second filter
PSNR YCbCr:      0.03%     -0.00%      0.07%
   PSNRHVS:      0.06%
      SSIM:      0.12%
    MSSSIM:      0.09%
 CIEDE2000:      0.05%

Change-Id: I15ef9598a08f6713bc28ab98b0182310433e97ef
2016-10-12 18:17:10 -07:00
Jean-Marc Valin ea64c342b7 Make 4x4 deringing (chroma) use shorter filters
Avoids blurring chroma for 4:2:0

PSNR YCbCr:      0.03%     -0.31%     -0.29%
   PSNRHVS:      0.02%
      SSIM:      0.03%
    MSSSIM:      0.02%
 CIEDE2000:      0.01%

Change-Id: If744fb902b5f24404479def22b9ca8a19baec722
2016-10-12 18:16:54 -07:00