182 строки
6.6 KiB
C
182 строки
6.6 KiB
C
/*
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* Copyright (c) 2012 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <immintrin.h>
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#include "./vpx_dsp_rtcd.h"
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#include "vpx_ports/mem.h"
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#define FSAD64_H(h) \
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unsigned int vpx_sad64x##h##_avx2(const uint8_t *src_ptr, \
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int src_stride, \
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const uint8_t *ref_ptr, \
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int ref_stride) { \
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int i, res; \
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__m256i sad1_reg, sad2_reg, ref1_reg, ref2_reg; \
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__m256i sum_sad = _mm256_setzero_si256(); \
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__m256i sum_sad_h; \
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__m128i sum_sad128; \
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for (i = 0 ; i < h ; i++) { \
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ref1_reg = _mm256_loadu_si256((__m256i const *)ref_ptr); \
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ref2_reg = _mm256_loadu_si256((__m256i const *)(ref_ptr + 32)); \
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sad1_reg = _mm256_sad_epu8(ref1_reg, \
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_mm256_loadu_si256((__m256i const *)src_ptr)); \
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sad2_reg = _mm256_sad_epu8(ref2_reg, \
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_mm256_loadu_si256((__m256i const *)(src_ptr + 32))); \
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sum_sad = _mm256_add_epi32(sum_sad, _mm256_add_epi32(sad1_reg, sad2_reg)); \
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ref_ptr+= ref_stride; \
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src_ptr+= src_stride; \
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} \
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sum_sad_h = _mm256_srli_si256(sum_sad, 8); \
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sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
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sum_sad128 = _mm256_extracti128_si256(sum_sad, 1); \
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sum_sad128 = _mm_add_epi32(_mm256_castsi256_si128(sum_sad), sum_sad128); \
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res = _mm_cvtsi128_si32(sum_sad128); \
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return res; \
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}
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#define FSAD32_H(h) \
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unsigned int vpx_sad32x##h##_avx2(const uint8_t *src_ptr, \
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int src_stride, \
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const uint8_t *ref_ptr, \
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int ref_stride) { \
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int i, res; \
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__m256i sad1_reg, sad2_reg, ref1_reg, ref2_reg; \
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__m256i sum_sad = _mm256_setzero_si256(); \
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__m256i sum_sad_h; \
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__m128i sum_sad128; \
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int ref2_stride = ref_stride << 1; \
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int src2_stride = src_stride << 1; \
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int max = h >> 1; \
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for (i = 0 ; i < max ; i++) { \
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ref1_reg = _mm256_loadu_si256((__m256i const *)ref_ptr); \
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ref2_reg = _mm256_loadu_si256((__m256i const *)(ref_ptr + ref_stride)); \
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sad1_reg = _mm256_sad_epu8(ref1_reg, \
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_mm256_loadu_si256((__m256i const *)src_ptr)); \
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sad2_reg = _mm256_sad_epu8(ref2_reg, \
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_mm256_loadu_si256((__m256i const *)(src_ptr + src_stride))); \
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sum_sad = _mm256_add_epi32(sum_sad, _mm256_add_epi32(sad1_reg, sad2_reg)); \
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ref_ptr+= ref2_stride; \
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src_ptr+= src2_stride; \
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} \
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sum_sad_h = _mm256_srli_si256(sum_sad, 8); \
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sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
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sum_sad128 = _mm256_extracti128_si256(sum_sad, 1); \
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sum_sad128 = _mm_add_epi32(_mm256_castsi256_si128(sum_sad), sum_sad128); \
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res = _mm_cvtsi128_si32(sum_sad128); \
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return res; \
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}
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#define FSAD64 \
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FSAD64_H(64); \
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FSAD64_H(32);
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#define FSAD32 \
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FSAD32_H(64); \
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FSAD32_H(32); \
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FSAD32_H(16);
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FSAD64;
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FSAD32;
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#undef FSAD64
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#undef FSAD32
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#undef FSAD64_H
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#undef FSAD32_H
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#define FSADAVG64_H(h) \
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unsigned int vpx_sad64x##h##_avg_avx2(const uint8_t *src_ptr, \
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int src_stride, \
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const uint8_t *ref_ptr, \
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int ref_stride, \
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const uint8_t *second_pred) { \
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int i, res; \
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__m256i sad1_reg, sad2_reg, ref1_reg, ref2_reg; \
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__m256i sum_sad = _mm256_setzero_si256(); \
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__m256i sum_sad_h; \
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__m128i sum_sad128; \
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for (i = 0 ; i < h ; i++) { \
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ref1_reg = _mm256_loadu_si256((__m256i const *)ref_ptr); \
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ref2_reg = _mm256_loadu_si256((__m256i const *)(ref_ptr + 32)); \
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ref1_reg = _mm256_avg_epu8(ref1_reg, \
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_mm256_loadu_si256((__m256i const *)second_pred)); \
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ref2_reg = _mm256_avg_epu8(ref2_reg, \
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_mm256_loadu_si256((__m256i const *)(second_pred +32))); \
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sad1_reg = _mm256_sad_epu8(ref1_reg, \
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_mm256_loadu_si256((__m256i const *)src_ptr)); \
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sad2_reg = _mm256_sad_epu8(ref2_reg, \
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_mm256_loadu_si256((__m256i const *)(src_ptr + 32))); \
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sum_sad = _mm256_add_epi32(sum_sad, _mm256_add_epi32(sad1_reg, sad2_reg)); \
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ref_ptr+= ref_stride; \
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src_ptr+= src_stride; \
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second_pred+= 64; \
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} \
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sum_sad_h = _mm256_srli_si256(sum_sad, 8); \
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sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
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sum_sad128 = _mm256_extracti128_si256(sum_sad, 1); \
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sum_sad128 = _mm_add_epi32(_mm256_castsi256_si128(sum_sad), sum_sad128); \
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res = _mm_cvtsi128_si32(sum_sad128); \
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return res; \
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}
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#define FSADAVG32_H(h) \
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unsigned int vpx_sad32x##h##_avg_avx2(const uint8_t *src_ptr, \
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int src_stride, \
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const uint8_t *ref_ptr, \
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int ref_stride, \
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const uint8_t *second_pred) { \
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int i, res; \
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__m256i sad1_reg, sad2_reg, ref1_reg, ref2_reg; \
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__m256i sum_sad = _mm256_setzero_si256(); \
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__m256i sum_sad_h; \
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__m128i sum_sad128; \
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int ref2_stride = ref_stride << 1; \
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int src2_stride = src_stride << 1; \
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int max = h >> 1; \
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for (i = 0 ; i < max ; i++) { \
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ref1_reg = _mm256_loadu_si256((__m256i const *)ref_ptr); \
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ref2_reg = _mm256_loadu_si256((__m256i const *)(ref_ptr + ref_stride)); \
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ref1_reg = _mm256_avg_epu8(ref1_reg, \
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_mm256_loadu_si256((__m256i const *)second_pred)); \
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ref2_reg = _mm256_avg_epu8(ref2_reg, \
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_mm256_loadu_si256((__m256i const *)(second_pred +32))); \
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sad1_reg = _mm256_sad_epu8(ref1_reg, \
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_mm256_loadu_si256((__m256i const *)src_ptr)); \
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sad2_reg = _mm256_sad_epu8(ref2_reg, \
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_mm256_loadu_si256((__m256i const *)(src_ptr + src_stride))); \
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sum_sad = _mm256_add_epi32(sum_sad, \
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_mm256_add_epi32(sad1_reg, sad2_reg)); \
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ref_ptr+= ref2_stride; \
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src_ptr+= src2_stride; \
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second_pred+= 64; \
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} \
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sum_sad_h = _mm256_srli_si256(sum_sad, 8); \
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sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
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sum_sad128 = _mm256_extracti128_si256(sum_sad, 1); \
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sum_sad128 = _mm_add_epi32(_mm256_castsi256_si128(sum_sad), sum_sad128); \
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res = _mm_cvtsi128_si32(sum_sad128); \
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return res; \
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}
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#define FSADAVG64 \
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FSADAVG64_H(64); \
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FSADAVG64_H(32);
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#define FSADAVG32 \
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FSADAVG32_H(64); \
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FSADAVG32_H(32); \
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FSADAVG32_H(16);
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FSADAVG64;
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FSADAVG32;
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#undef FSADAVG64
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#undef FSADAVG32
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#undef FSADAVG64_H
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#undef FSADAVG32_H
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