463 строки
16 KiB
C++
463 строки
16 KiB
C++
/*
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* Copyright (c) 2012 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <math.h>
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#include <stdlib.h>
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#include <string.h>
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#include "third_party/googletest/src/include/gtest/gtest.h"
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#include "./vp10_rtcd.h"
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#include "./vpx_config.h"
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#include "./vpx_dsp_rtcd.h"
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#include "test/acm_random.h"
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#include "test/clear_system_state.h"
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#include "test/register_state_check.h"
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#include "test/util.h"
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#include "vp10/common/entropy.h"
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#include "vpx/vpx_codec.h"
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#include "vpx/vpx_integer.h"
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#include "vpx_ports/mem.h"
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#include "vpx_ports/msvc.h" // for round()
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using libvpx_test::ACMRandom;
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namespace {
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const int kNumCoeffs = 1024;
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const double kPi = 3.141592653589793238462643383279502884;
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void reference_32x32_dct_1d(const double in[32], double out[32]) {
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const double kInvSqrt2 = 0.707106781186547524400844362104;
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for (int k = 0; k < 32; k++) {
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out[k] = 0.0;
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for (int n = 0; n < 32; n++)
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out[k] += in[n] * cos(kPi * (2 * n + 1) * k / 64.0);
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if (k == 0)
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out[k] = out[k] * kInvSqrt2;
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}
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}
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void reference_32x32_dct_2d(const int16_t input[kNumCoeffs],
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double output[kNumCoeffs]) {
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// First transform columns
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for (int i = 0; i < 32; ++i) {
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double temp_in[32], temp_out[32];
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for (int j = 0; j < 32; ++j)
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temp_in[j] = input[j*32 + i];
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reference_32x32_dct_1d(temp_in, temp_out);
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for (int j = 0; j < 32; ++j)
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output[j * 32 + i] = temp_out[j];
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}
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// Then transform rows
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for (int i = 0; i < 32; ++i) {
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double temp_in[32], temp_out[32];
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for (int j = 0; j < 32; ++j)
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temp_in[j] = output[j + i*32];
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reference_32x32_dct_1d(temp_in, temp_out);
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// Scale by some magic number
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for (int j = 0; j < 32; ++j)
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output[j + i * 32] = temp_out[j] / 4;
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}
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}
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typedef void (*FwdTxfmFunc)(const int16_t *in, tran_low_t *out, int stride);
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typedef void (*InvTxfmFunc)(const tran_low_t *in, uint8_t *out, int stride);
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typedef std::tr1::tuple<FwdTxfmFunc, InvTxfmFunc, int, vpx_bit_depth_t>
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Trans32x32Param;
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#if CONFIG_VP9_HIGHBITDEPTH
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void idct32x32_10(const tran_low_t *in, uint8_t *out, int stride) {
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vpx_highbd_idct32x32_1024_add_c(in, out, stride, 10);
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}
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void idct32x32_12(const tran_low_t *in, uint8_t *out, int stride) {
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vpx_highbd_idct32x32_1024_add_c(in, out, stride, 12);
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}
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#endif // CONFIG_VP9_HIGHBITDEPTH
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class Trans32x32Test : public ::testing::TestWithParam<Trans32x32Param> {
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public:
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virtual ~Trans32x32Test() {}
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virtual void SetUp() {
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fwd_txfm_ = GET_PARAM(0);
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inv_txfm_ = GET_PARAM(1);
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version_ = GET_PARAM(2); // 0: high precision forward transform
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// 1: low precision version for rd loop
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bit_depth_ = GET_PARAM(3);
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mask_ = (1 << bit_depth_) - 1;
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}
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virtual void TearDown() { libvpx_test::ClearSystemState(); }
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protected:
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int version_;
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vpx_bit_depth_t bit_depth_;
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int mask_;
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FwdTxfmFunc fwd_txfm_;
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InvTxfmFunc inv_txfm_;
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};
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TEST_P(Trans32x32Test, AccuracyCheck) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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uint32_t max_error = 0;
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int64_t total_error = 0;
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const int count_test_block = 10000;
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DECLARE_ALIGNED(16, int16_t, test_input_block[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, test_temp_block[kNumCoeffs]);
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DECLARE_ALIGNED(16, uint8_t, dst[kNumCoeffs]);
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DECLARE_ALIGNED(16, uint8_t, src[kNumCoeffs]);
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#if CONFIG_VP9_HIGHBITDEPTH
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DECLARE_ALIGNED(16, uint16_t, dst16[kNumCoeffs]);
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DECLARE_ALIGNED(16, uint16_t, src16[kNumCoeffs]);
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#endif
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for (int i = 0; i < count_test_block; ++i) {
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// Initialize a test block with input range [-mask_, mask_].
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for (int j = 0; j < kNumCoeffs; ++j) {
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if (bit_depth_ == VPX_BITS_8) {
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src[j] = rnd.Rand8();
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dst[j] = rnd.Rand8();
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test_input_block[j] = src[j] - dst[j];
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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src16[j] = rnd.Rand16() & mask_;
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dst16[j] = rnd.Rand16() & mask_;
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test_input_block[j] = src16[j] - dst16[j];
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#endif
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}
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}
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ASM_REGISTER_STATE_CHECK(fwd_txfm_(test_input_block, test_temp_block, 32));
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if (bit_depth_ == VPX_BITS_8) {
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ASM_REGISTER_STATE_CHECK(inv_txfm_(test_temp_block, dst, 32));
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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ASM_REGISTER_STATE_CHECK(inv_txfm_(test_temp_block,
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CONVERT_TO_BYTEPTR(dst16), 32));
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#endif
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}
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for (int j = 0; j < kNumCoeffs; ++j) {
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#if CONFIG_VP9_HIGHBITDEPTH
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const int32_t diff =
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bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
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#else
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const int32_t diff = dst[j] - src[j];
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#endif
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const uint32_t error = diff * diff;
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if (max_error < error)
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max_error = error;
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total_error += error;
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}
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}
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if (version_ == 1) {
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max_error /= 2;
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total_error /= 45;
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}
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EXPECT_GE(1u << 2 * (bit_depth_ - 8), max_error)
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<< "Error: 32x32 FDCT/IDCT has an individual round-trip error > 1";
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EXPECT_GE(count_test_block << 2 * (bit_depth_ - 8), total_error)
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<< "Error: 32x32 FDCT/IDCT has average round-trip error > 1 per block";
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}
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TEST_P(Trans32x32Test, CoeffCheck) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 1000;
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DECLARE_ALIGNED(16, int16_t, input_block[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, output_ref_block[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, output_block[kNumCoeffs]);
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for (int i = 0; i < count_test_block; ++i) {
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for (int j = 0; j < kNumCoeffs; ++j)
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input_block[j] = (rnd.Rand16() & mask_) - (rnd.Rand16() & mask_);
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const int stride = 32;
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vpx_fdct32x32_c(input_block, output_ref_block, stride);
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ASM_REGISTER_STATE_CHECK(fwd_txfm_(input_block, output_block, stride));
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if (version_ == 0) {
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for (int j = 0; j < kNumCoeffs; ++j)
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EXPECT_EQ(output_block[j], output_ref_block[j])
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<< "Error: 32x32 FDCT versions have mismatched coefficients";
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} else {
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for (int j = 0; j < kNumCoeffs; ++j)
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EXPECT_GE(6, abs(output_block[j] - output_ref_block[j]))
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<< "Error: 32x32 FDCT rd has mismatched coefficients";
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}
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}
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}
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TEST_P(Trans32x32Test, MemCheck) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 2000;
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DECLARE_ALIGNED(16, int16_t, input_extreme_block[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, output_ref_block[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, output_block[kNumCoeffs]);
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for (int i = 0; i < count_test_block; ++i) {
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// Initialize a test block with input range [-mask_, mask_].
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for (int j = 0; j < kNumCoeffs; ++j) {
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input_extreme_block[j] = rnd.Rand8() & 1 ? mask_ : -mask_;
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}
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if (i == 0) {
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for (int j = 0; j < kNumCoeffs; ++j)
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input_extreme_block[j] = mask_;
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} else if (i == 1) {
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for (int j = 0; j < kNumCoeffs; ++j)
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input_extreme_block[j] = -mask_;
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}
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const int stride = 32;
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vpx_fdct32x32_c(input_extreme_block, output_ref_block, stride);
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ASM_REGISTER_STATE_CHECK(
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fwd_txfm_(input_extreme_block, output_block, stride));
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// The minimum quant value is 4.
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for (int j = 0; j < kNumCoeffs; ++j) {
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if (version_ == 0) {
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EXPECT_EQ(output_block[j], output_ref_block[j])
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<< "Error: 32x32 FDCT versions have mismatched coefficients";
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} else {
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EXPECT_GE(6, abs(output_block[j] - output_ref_block[j]))
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<< "Error: 32x32 FDCT rd has mismatched coefficients";
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}
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EXPECT_GE(4 * DCT_MAX_VALUE << (bit_depth_ - 8), abs(output_ref_block[j]))
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<< "Error: 32x32 FDCT C has coefficient larger than 4*DCT_MAX_VALUE";
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EXPECT_GE(4 * DCT_MAX_VALUE << (bit_depth_ - 8), abs(output_block[j]))
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<< "Error: 32x32 FDCT has coefficient larger than "
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<< "4*DCT_MAX_VALUE";
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}
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}
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}
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TEST_P(Trans32x32Test, InverseAccuracy) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 1000;
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DECLARE_ALIGNED(16, int16_t, in[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, coeff[kNumCoeffs]);
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DECLARE_ALIGNED(16, uint8_t, dst[kNumCoeffs]);
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DECLARE_ALIGNED(16, uint8_t, src[kNumCoeffs]);
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#if CONFIG_VP9_HIGHBITDEPTH
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DECLARE_ALIGNED(16, uint16_t, dst16[kNumCoeffs]);
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DECLARE_ALIGNED(16, uint16_t, src16[kNumCoeffs]);
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#endif
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for (int i = 0; i < count_test_block; ++i) {
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double out_r[kNumCoeffs];
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// Initialize a test block with input range [-255, 255]
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for (int j = 0; j < kNumCoeffs; ++j) {
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if (bit_depth_ == VPX_BITS_8) {
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src[j] = rnd.Rand8();
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dst[j] = rnd.Rand8();
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in[j] = src[j] - dst[j];
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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src16[j] = rnd.Rand16() & mask_;
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dst16[j] = rnd.Rand16() & mask_;
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in[j] = src16[j] - dst16[j];
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#endif
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}
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}
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reference_32x32_dct_2d(in, out_r);
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for (int j = 0; j < kNumCoeffs; ++j)
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coeff[j] = static_cast<tran_low_t>(round(out_r[j]));
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if (bit_depth_ == VPX_BITS_8) {
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ASM_REGISTER_STATE_CHECK(inv_txfm_(coeff, dst, 32));
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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ASM_REGISTER_STATE_CHECK(inv_txfm_(coeff, CONVERT_TO_BYTEPTR(dst16), 32));
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#endif
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}
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for (int j = 0; j < kNumCoeffs; ++j) {
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#if CONFIG_VP9_HIGHBITDEPTH
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const int diff =
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bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
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#else
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const int diff = dst[j] - src[j];
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#endif
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const int error = diff * diff;
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EXPECT_GE(1, error)
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<< "Error: 32x32 IDCT has error " << error
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<< " at index " << j;
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}
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}
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}
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class PartialTrans32x32Test
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: public ::testing::TestWithParam<
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std::tr1::tuple<FwdTxfmFunc, vpx_bit_depth_t> > {
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public:
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virtual ~PartialTrans32x32Test() {}
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virtual void SetUp() {
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fwd_txfm_ = GET_PARAM(0);
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bit_depth_ = GET_PARAM(1);
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}
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virtual void TearDown() { libvpx_test::ClearSystemState(); }
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protected:
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vpx_bit_depth_t bit_depth_;
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FwdTxfmFunc fwd_txfm_;
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};
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TEST_P(PartialTrans32x32Test, Extremes) {
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#if CONFIG_VP9_HIGHBITDEPTH
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const int16_t maxval =
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static_cast<int16_t>(clip_pixel_highbd(1 << 30, bit_depth_));
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#else
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const int16_t maxval = 255;
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#endif
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const int minval = -maxval;
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DECLARE_ALIGNED(16, int16_t, input[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, output[kNumCoeffs]);
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for (int i = 0; i < kNumCoeffs; ++i) input[i] = maxval;
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output[0] = 0;
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ASM_REGISTER_STATE_CHECK(fwd_txfm_(input, output, 32));
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EXPECT_EQ((maxval * kNumCoeffs) >> 3, output[0]);
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for (int i = 0; i < kNumCoeffs; ++i) input[i] = minval;
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output[0] = 0;
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ASM_REGISTER_STATE_CHECK(fwd_txfm_(input, output, 32));
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EXPECT_EQ((minval * kNumCoeffs) >> 3, output[0]);
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}
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TEST_P(PartialTrans32x32Test, Random) {
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#if CONFIG_VP9_HIGHBITDEPTH
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const int16_t maxval =
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static_cast<int16_t>(clip_pixel_highbd(1 << 30, bit_depth_));
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#else
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const int16_t maxval = 255;
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#endif
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DECLARE_ALIGNED(16, int16_t, input[kNumCoeffs]);
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DECLARE_ALIGNED(16, tran_low_t, output[kNumCoeffs]);
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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int sum = 0;
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for (int i = 0; i < kNumCoeffs; ++i) {
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const int val = (i & 1) ? -rnd(maxval + 1) : rnd(maxval + 1);
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input[i] = val;
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sum += val;
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}
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output[0] = 0;
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ASM_REGISTER_STATE_CHECK(fwd_txfm_(input, output, 32));
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EXPECT_EQ(sum >> 3, output[0]);
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}
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using std::tr1::make_tuple;
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#if CONFIG_VP9_HIGHBITDEPTH
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INSTANTIATE_TEST_CASE_P(
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C, Trans32x32Test,
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::testing::Values(
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make_tuple(&vpx_highbd_fdct32x32_c,
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&idct32x32_10, 0, VPX_BITS_10),
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make_tuple(&vpx_highbd_fdct32x32_rd_c,
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&idct32x32_10, 1, VPX_BITS_10),
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make_tuple(&vpx_highbd_fdct32x32_c,
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&idct32x32_12, 0, VPX_BITS_12),
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make_tuple(&vpx_highbd_fdct32x32_rd_c,
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&idct32x32_12, 1, VPX_BITS_12),
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make_tuple(&vpx_fdct32x32_c,
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&vpx_idct32x32_1024_add_c, 0, VPX_BITS_8),
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make_tuple(&vpx_fdct32x32_rd_c,
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&vpx_idct32x32_1024_add_c, 1, VPX_BITS_8)));
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INSTANTIATE_TEST_CASE_P(
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C, PartialTrans32x32Test,
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::testing::Values(make_tuple(&vpx_highbd_fdct32x32_1_c, VPX_BITS_8),
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make_tuple(&vpx_highbd_fdct32x32_1_c, VPX_BITS_10),
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make_tuple(&vpx_highbd_fdct32x32_1_c, VPX_BITS_12)));
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#else
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INSTANTIATE_TEST_CASE_P(
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C, Trans32x32Test,
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::testing::Values(
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make_tuple(&vpx_fdct32x32_c,
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&vpx_idct32x32_1024_add_c, 0, VPX_BITS_8),
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make_tuple(&vpx_fdct32x32_rd_c,
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&vpx_idct32x32_1024_add_c, 1, VPX_BITS_8)));
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INSTANTIATE_TEST_CASE_P(C, PartialTrans32x32Test,
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::testing::Values(make_tuple(&vpx_fdct32x32_1_c,
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VPX_BITS_8)));
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#endif // CONFIG_VP9_HIGHBITDEPTH
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#if HAVE_NEON && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
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INSTANTIATE_TEST_CASE_P(
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NEON, Trans32x32Test,
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::testing::Values(
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make_tuple(&vpx_fdct32x32_c,
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&vpx_idct32x32_1024_add_neon, 0, VPX_BITS_8),
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make_tuple(&vpx_fdct32x32_rd_c,
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&vpx_idct32x32_1024_add_neon, 1, VPX_BITS_8)));
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#endif // HAVE_NEON && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
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#if HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
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INSTANTIATE_TEST_CASE_P(
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SSE2, Trans32x32Test,
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::testing::Values(
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make_tuple(&vpx_fdct32x32_sse2,
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&vpx_idct32x32_1024_add_sse2, 0, VPX_BITS_8),
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make_tuple(&vpx_fdct32x32_rd_sse2,
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|
&vpx_idct32x32_1024_add_sse2, 1, VPX_BITS_8)));
|
|
INSTANTIATE_TEST_CASE_P(SSE2, PartialTrans32x32Test,
|
|
::testing::Values(make_tuple(&vpx_fdct32x32_1_sse2,
|
|
VPX_BITS_8)));
|
|
#endif // HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
|
|
#if HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
INSTANTIATE_TEST_CASE_P(
|
|
SSE2, Trans32x32Test,
|
|
::testing::Values(
|
|
make_tuple(&vpx_highbd_fdct32x32_sse2, &idct32x32_10, 0, VPX_BITS_10),
|
|
make_tuple(&vpx_highbd_fdct32x32_rd_sse2, &idct32x32_10, 1,
|
|
VPX_BITS_10),
|
|
make_tuple(&vpx_highbd_fdct32x32_sse2, &idct32x32_12, 0, VPX_BITS_12),
|
|
make_tuple(&vpx_highbd_fdct32x32_rd_sse2, &idct32x32_12, 1,
|
|
VPX_BITS_12),
|
|
make_tuple(&vpx_fdct32x32_sse2, &vpx_idct32x32_1024_add_c, 0,
|
|
VPX_BITS_8),
|
|
make_tuple(&vpx_fdct32x32_rd_sse2, &vpx_idct32x32_1024_add_c, 1,
|
|
VPX_BITS_8)));
|
|
INSTANTIATE_TEST_CASE_P(SSE2, PartialTrans32x32Test,
|
|
::testing::Values(make_tuple(&vpx_fdct32x32_1_sse2,
|
|
VPX_BITS_8)));
|
|
#endif // HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
|
|
#if HAVE_AVX2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
INSTANTIATE_TEST_CASE_P(
|
|
AVX2, Trans32x32Test,
|
|
::testing::Values(
|
|
make_tuple(&vpx_fdct32x32_avx2,
|
|
&vpx_idct32x32_1024_add_sse2, 0, VPX_BITS_8),
|
|
make_tuple(&vpx_fdct32x32_rd_avx2,
|
|
&vpx_idct32x32_1024_add_sse2, 1, VPX_BITS_8)));
|
|
#endif // HAVE_AVX2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
|
|
#if HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
INSTANTIATE_TEST_CASE_P(
|
|
MSA, Trans32x32Test,
|
|
::testing::Values(
|
|
make_tuple(&vpx_fdct32x32_msa,
|
|
&vpx_idct32x32_1024_add_msa, 0, VPX_BITS_8),
|
|
make_tuple(&vpx_fdct32x32_rd_msa,
|
|
&vpx_idct32x32_1024_add_msa, 1, VPX_BITS_8)));
|
|
INSTANTIATE_TEST_CASE_P(MSA, PartialTrans32x32Test,
|
|
::testing::Values(make_tuple(&vpx_fdct32x32_1_msa,
|
|
VPX_BITS_8)));
|
|
#endif // HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
} // namespace
|