445 строки
19 KiB
C
445 строки
19 KiB
C
/*
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* Copyright (c) 2016, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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* was not distributed with this source code in the LICENSE file, you can
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
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* Media Patent License 1.0 was not distributed with this source code in the
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* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#ifndef AV1_FWD_TXFM2D_CFG_H_
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#define AV1_FWD_TXFM2D_CFG_H_
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#include "av1/common/enums.h"
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#include "av1/common/av1_fwd_txfm1d.h"
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// ---------------- config fwd_dct_dct_4 ----------------
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static const int8_t fwd_shift_dct_dct_4[3] = { 2, 0, 0 };
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static const int8_t fwd_stage_range_col_dct_dct_4[4] = { 15, 16, 17, 17 };
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static const int8_t fwd_stage_range_row_dct_dct_4[4] = { 17, 18, 18, 18 };
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static const int8_t fwd_cos_bit_col_dct_dct_4[4] = { 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_dct_dct_4[4] = { 13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_4 = {
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4, // .txfm_size
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4, // .stage_num_col
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4, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_dct_dct_4, // .shift
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fwd_stage_range_col_dct_dct_4, // .stage_range_col
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fwd_stage_range_row_dct_dct_4, // .stage_range_row
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fwd_cos_bit_col_dct_dct_4, // .cos_bit_col
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fwd_cos_bit_row_dct_dct_4, // .cos_bit_row
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TXFM_TYPE_DCT4, // .txfm_type_col
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TXFM_TYPE_DCT4
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}; // .txfm_type_row
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// ---------------- config fwd_dct_dct_8 ----------------
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static const int8_t fwd_shift_dct_dct_8[3] = { 2, -1, 0 };
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static const int8_t fwd_stage_range_col_dct_dct_8[6] = {
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15, 16, 17, 18, 18, 18
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};
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static const int8_t fwd_stage_range_row_dct_dct_8[6] = {
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17, 18, 19, 19, 19, 19
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};
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static const int8_t fwd_cos_bit_col_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_8 = {
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8, // .txfm_size
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6, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_dct_dct_8, // .shift
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fwd_stage_range_col_dct_dct_8, // .stage_range_col
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fwd_stage_range_row_dct_dct_8, // .stage_range_row
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fwd_cos_bit_col_dct_dct_8, // .cos_bit_col
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fwd_cos_bit_row_dct_dct_8, // .cos_bit_row
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TXFM_TYPE_DCT8, // .txfm_type_col
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TXFM_TYPE_DCT8
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}; // .txfm_type_row
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// ---------------- config fwd_dct_dct_16 ----------------
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static const int8_t fwd_shift_dct_dct_16[3] = { 2, -2, 0 };
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static const int8_t fwd_stage_range_col_dct_dct_16[8] = { 15, 16, 17, 18,
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19, 19, 19, 19 };
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static const int8_t fwd_stage_range_row_dct_dct_16[8] = { 17, 18, 19, 20,
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20, 20, 20, 20 };
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static const int8_t fwd_cos_bit_col_dct_dct_16[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_dct_dct_16[8] = { 12, 12, 12, 12,
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12, 12, 12, 12 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_16 = {
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16, // .txfm_size
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8, // .stage_num_col
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8, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_dct_dct_16, // .shift
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fwd_stage_range_col_dct_dct_16, // .stage_range_col
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fwd_stage_range_row_dct_dct_16, // .stage_range_row
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fwd_cos_bit_col_dct_dct_16, // .cos_bit_col
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fwd_cos_bit_row_dct_dct_16, // .cos_bit_row
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TXFM_TYPE_DCT16, // .txfm_type_col
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TXFM_TYPE_DCT16
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}; // .txfm_type_row
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// ---------------- config fwd_dct_dct_32 ----------------
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static const int8_t fwd_shift_dct_dct_32[3] = { 2, -4, 0 };
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static const int8_t fwd_stage_range_col_dct_dct_32[10] = { 15, 16, 17, 18, 19,
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20, 20, 20, 20, 20 };
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static const int8_t fwd_stage_range_row_dct_dct_32[10] = { 16, 17, 18, 19, 20,
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20, 20, 20, 20, 20 };
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static const int8_t fwd_cos_bit_col_dct_dct_32[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const int8_t fwd_cos_bit_row_dct_dct_32[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_32 = {
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32, // .txfm_size
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10, // .stage_num_col
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10, // .stage_num_row
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// 1, // .log_scale
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fwd_shift_dct_dct_32, // .shift
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fwd_stage_range_col_dct_dct_32, // .stage_range_col
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fwd_stage_range_row_dct_dct_32, // .stage_range_row
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fwd_cos_bit_col_dct_dct_32, // .cos_bit_col
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fwd_cos_bit_row_dct_dct_32, // .cos_bit_row
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TXFM_TYPE_DCT32, // .txfm_type_col
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TXFM_TYPE_DCT32
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}; // .txfm_type_row
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// ---------------- config fwd_dct_dct_64 ----------------
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static const int8_t fwd_shift_dct_dct_64[3] = { 0, -2, -2 };
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static const int8_t fwd_stage_range_col_dct_dct_64[12] = {
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13, 14, 15, 16, 17, 18, 19, 19, 19, 19, 19, 19
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};
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static const int8_t fwd_stage_range_row_dct_dct_64[12] = {
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17, 18, 19, 20, 21, 22, 22, 22, 22, 22, 22, 22
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};
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static const int8_t fwd_cos_bit_col_dct_dct_64[12] = { 15, 15, 15, 15, 15, 14,
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13, 13, 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_dct_dct_64[12] = { 15, 14, 13, 12, 11, 10,
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10, 10, 10, 10, 10, 10 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_64 = {
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64, // .txfm_size
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12, // .stage_num_col
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12, // .stage_num_row
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fwd_shift_dct_dct_64, // .shift
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fwd_stage_range_col_dct_dct_64, // .stage_range_col
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fwd_stage_range_row_dct_dct_64, // .stage_range_row
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fwd_cos_bit_col_dct_dct_64, // .cos_bit_col
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fwd_cos_bit_row_dct_dct_64, // .cos_bit_row
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TXFM_TYPE_DCT64, // .txfm_type_col
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TXFM_TYPE_DCT64
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}; // .txfm_type_row
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// ---------------- config fwd_dct_adst_4 ----------------
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static const int8_t fwd_shift_dct_adst_4[3] = { 2, 0, 0 };
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static const int8_t fwd_stage_range_col_dct_adst_4[4] = { 15, 16, 17, 17 };
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static const int8_t fwd_stage_range_row_dct_adst_4[6] = {
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17, 17, 17, 18, 18, 18
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};
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static const int8_t fwd_cos_bit_col_dct_adst_4[4] = { 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_dct_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_4 = {
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4, // .txfm_size
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4, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_dct_adst_4, // .shift
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fwd_stage_range_col_dct_adst_4, // .stage_range_col
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fwd_stage_range_row_dct_adst_4, // .stage_range_row
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fwd_cos_bit_col_dct_adst_4, // .cos_bit_col
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fwd_cos_bit_row_dct_adst_4, // .cos_bit_row
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TXFM_TYPE_DCT4, // .txfm_type_col
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TXFM_TYPE_ADST4
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}; // .txfm_type_row
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// ---------------- config fwd_dct_adst_8 ----------------
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static const int8_t fwd_shift_dct_adst_8[3] = { 2, -1, 0 };
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static const int8_t fwd_stage_range_col_dct_adst_8[6] = {
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15, 16, 17, 18, 18, 18
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};
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static const int8_t fwd_stage_range_row_dct_adst_8[8] = { 17, 17, 17, 18,
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18, 19, 19, 19 };
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static const int8_t fwd_cos_bit_col_dct_adst_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_dct_adst_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_8 = {
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8, // .txfm_size
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6, // .stage_num_col
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8, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_dct_adst_8, // .shift
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fwd_stage_range_col_dct_adst_8, // .stage_range_col
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fwd_stage_range_row_dct_adst_8, // .stage_range_row
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fwd_cos_bit_col_dct_adst_8, // .cos_bit_col
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fwd_cos_bit_row_dct_adst_8, // .cos_bit_row
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TXFM_TYPE_DCT8, // .txfm_type_col
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TXFM_TYPE_ADST8
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}; // .txfm_type_row
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// ---------------- config fwd_dct_adst_16 ----------------
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static const int8_t fwd_shift_dct_adst_16[3] = { 2, -2, 0 };
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static const int8_t fwd_stage_range_col_dct_adst_16[8] = { 15, 16, 17, 18,
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19, 19, 19, 19 };
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static const int8_t fwd_stage_range_row_dct_adst_16[10] = {
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17, 17, 17, 18, 18, 19, 19, 20, 20, 20
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};
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static const int8_t fwd_cos_bit_col_dct_adst_16[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_dct_adst_16[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_16 = {
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16, // .txfm_size
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8, // .stage_num_col
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10, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_dct_adst_16, // .shift
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fwd_stage_range_col_dct_adst_16, // .stage_range_col
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fwd_stage_range_row_dct_adst_16, // .stage_range_row
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fwd_cos_bit_col_dct_adst_16, // .cos_bit_col
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fwd_cos_bit_row_dct_adst_16, // .cos_bit_row
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TXFM_TYPE_DCT16, // .txfm_type_col
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TXFM_TYPE_ADST16
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}; // .txfm_type_row
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// ---------------- config fwd_dct_adst_32 ----------------
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static const int8_t fwd_shift_dct_adst_32[3] = { 2, -4, 0 };
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static const int8_t fwd_stage_range_col_dct_adst_32[10] = {
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15, 16, 17, 18, 19, 20, 20, 20, 20, 20
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};
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static const int8_t fwd_stage_range_row_dct_adst_32[12] = {
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16, 16, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20
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};
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static const int8_t fwd_cos_bit_col_dct_adst_32[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const int8_t fwd_cos_bit_row_dct_adst_32[12] = {
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12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
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};
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_32 = {
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32, // .txfm_size
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10, // .stage_num_col
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12, // .stage_num_row
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// 1, // .log_scale
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fwd_shift_dct_adst_32, // .shift
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fwd_stage_range_col_dct_adst_32, // .stage_range_col
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fwd_stage_range_row_dct_adst_32, // .stage_range_row
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fwd_cos_bit_col_dct_adst_32, // .cos_bit_col
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fwd_cos_bit_row_dct_adst_32, // .cos_bit_row
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TXFM_TYPE_DCT32, // .txfm_type_col
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TXFM_TYPE_ADST32
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}; // .txfm_type_row
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// ---------------- config fwd_adst_adst_4 ----------------
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static const int8_t fwd_shift_adst_adst_4[3] = { 2, 0, 0 };
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static const int8_t fwd_stage_range_col_adst_adst_4[6] = { 15, 15, 16,
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17, 17, 17 };
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static const int8_t fwd_stage_range_row_adst_adst_4[6] = { 17, 17, 17,
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18, 18, 18 };
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static const int8_t fwd_cos_bit_col_adst_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_adst_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_4 = {
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4, // .txfm_size
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6, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_adst_adst_4, // .shift
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fwd_stage_range_col_adst_adst_4, // .stage_range_col
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fwd_stage_range_row_adst_adst_4, // .stage_range_row
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fwd_cos_bit_col_adst_adst_4, // .cos_bit_col
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fwd_cos_bit_row_adst_adst_4, // .cos_bit_row
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TXFM_TYPE_ADST4, // .txfm_type_col
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TXFM_TYPE_ADST4
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}; // .txfm_type_row
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// ---------------- config fwd_adst_adst_8 ----------------
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static const int8_t fwd_shift_adst_adst_8[3] = { 2, -1, 0 };
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static const int8_t fwd_stage_range_col_adst_adst_8[8] = { 15, 15, 16, 17,
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17, 18, 18, 18 };
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static const int8_t fwd_stage_range_row_adst_adst_8[8] = { 17, 17, 17, 18,
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18, 19, 19, 19 };
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static const int8_t fwd_cos_bit_col_adst_adst_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_adst_adst_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_8 = {
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8, // .txfm_size
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8, // .stage_num_col
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8, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_adst_adst_8, // .shift
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fwd_stage_range_col_adst_adst_8, // .stage_range_col
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fwd_stage_range_row_adst_adst_8, // .stage_range_row
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fwd_cos_bit_col_adst_adst_8, // .cos_bit_col
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fwd_cos_bit_row_adst_adst_8, // .cos_bit_row
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TXFM_TYPE_ADST8, // .txfm_type_col
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TXFM_TYPE_ADST8
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}; // .txfm_type_row
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// ---------------- config fwd_adst_adst_16 ----------------
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static const int8_t fwd_shift_adst_adst_16[3] = { 2, -2, 0 };
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static const int8_t fwd_stage_range_col_adst_adst_16[10] = {
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15, 15, 16, 17, 17, 18, 18, 19, 19, 19
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};
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static const int8_t fwd_stage_range_row_adst_adst_16[10] = {
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17, 17, 17, 18, 18, 19, 19, 20, 20, 20
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};
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static const int8_t fwd_cos_bit_col_adst_adst_16[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_adst_adst_16[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_16 = {
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16, // .txfm_size
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10, // .stage_num_col
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10, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_adst_adst_16, // .shift
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fwd_stage_range_col_adst_adst_16, // .stage_range_col
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fwd_stage_range_row_adst_adst_16, // .stage_range_row
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fwd_cos_bit_col_adst_adst_16, // .cos_bit_col
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fwd_cos_bit_row_adst_adst_16, // .cos_bit_row
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TXFM_TYPE_ADST16, // .txfm_type_col
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TXFM_TYPE_ADST16
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}; // .txfm_type_row
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// ---------------- config fwd_adst_adst_32 ----------------
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static const int8_t fwd_shift_adst_adst_32[3] = { 2, -4, 0 };
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static const int8_t fwd_stage_range_col_adst_adst_32[12] = {
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15, 15, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20
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};
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static const int8_t fwd_stage_range_row_adst_adst_32[12] = {
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16, 16, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20
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};
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static const int8_t fwd_cos_bit_col_adst_adst_32[12] = {
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12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
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};
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static const int8_t fwd_cos_bit_row_adst_adst_32[12] = {
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12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
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};
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_32 = {
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32, // .txfm_size
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12, // .stage_num_col
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12, // .stage_num_row
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// 1, // .log_scale
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fwd_shift_adst_adst_32, // .shift
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fwd_stage_range_col_adst_adst_32, // .stage_range_col
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fwd_stage_range_row_adst_adst_32, // .stage_range_row
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fwd_cos_bit_col_adst_adst_32, // .cos_bit_col
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fwd_cos_bit_row_adst_adst_32, // .cos_bit_row
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TXFM_TYPE_ADST32, // .txfm_type_col
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TXFM_TYPE_ADST32
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}; // .txfm_type_row
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// ---------------- config fwd_adst_dct_4 ----------------
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static const int8_t fwd_shift_adst_dct_4[3] = { 2, 0, 0 };
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static const int8_t fwd_stage_range_col_adst_dct_4[6] = {
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15, 15, 16, 17, 17, 17
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};
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static const int8_t fwd_stage_range_row_adst_dct_4[4] = { 17, 18, 18, 18 };
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static const int8_t fwd_cos_bit_col_adst_dct_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_adst_dct_4[4] = { 13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_4 = {
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4, // .txfm_size
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6, // .stage_num_col
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4, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_adst_dct_4, // .shift
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fwd_stage_range_col_adst_dct_4, // .stage_range_col
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fwd_stage_range_row_adst_dct_4, // .stage_range_row
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fwd_cos_bit_col_adst_dct_4, // .cos_bit_col
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fwd_cos_bit_row_adst_dct_4, // .cos_bit_row
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TXFM_TYPE_ADST4, // .txfm_type_col
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TXFM_TYPE_DCT4
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}; // .txfm_type_row
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// ---------------- config fwd_adst_dct_8 ----------------
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static const int8_t fwd_shift_adst_dct_8[3] = { 2, -1, 0 };
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static const int8_t fwd_stage_range_col_adst_dct_8[8] = { 15, 15, 16, 17,
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17, 18, 18, 18 };
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static const int8_t fwd_stage_range_row_adst_dct_8[6] = {
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17, 18, 19, 19, 19, 19
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};
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static const int8_t fwd_cos_bit_col_adst_dct_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_adst_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_8 = {
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8, // .txfm_size
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8, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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fwd_shift_adst_dct_8, // .shift
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fwd_stage_range_col_adst_dct_8, // .stage_range_col
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fwd_stage_range_row_adst_dct_8, // .stage_range_row
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fwd_cos_bit_col_adst_dct_8, // .cos_bit_col
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fwd_cos_bit_row_adst_dct_8, // .cos_bit_row
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TXFM_TYPE_ADST8, // .txfm_type_col
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TXFM_TYPE_DCT8
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}; // .txfm_type_row
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// ---------------- config fwd_adst_dct_16 ----------------
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static const int8_t fwd_shift_adst_dct_16[3] = { 2, -2, 0 };
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static const int8_t fwd_stage_range_col_adst_dct_16[10] = {
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15, 15, 16, 17, 17, 18, 18, 19, 19, 19
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};
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static const int8_t fwd_stage_range_row_adst_dct_16[8] = { 17, 18, 19, 20,
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20, 20, 20, 20 };
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static const int8_t fwd_cos_bit_col_adst_dct_16[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t fwd_cos_bit_row_adst_dct_16[8] = { 12, 12, 12, 12,
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12, 12, 12, 12 };
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|
|
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static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_16 = {
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16, // .txfm_size
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10, // .stage_num_col
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8, // .stage_num_row
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|
// 0, // .log_scale
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fwd_shift_adst_dct_16, // .shift
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fwd_stage_range_col_adst_dct_16, // .stage_range_col
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|
fwd_stage_range_row_adst_dct_16, // .stage_range_row
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|
fwd_cos_bit_col_adst_dct_16, // .cos_bit_col
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|
fwd_cos_bit_row_adst_dct_16, // .cos_bit_row
|
|
TXFM_TYPE_ADST16, // .txfm_type_col
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TXFM_TYPE_DCT16
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|
}; // .txfm_type_row
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|
|
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// ---------------- config fwd_adst_dct_32 ----------------
|
|
static const int8_t fwd_shift_adst_dct_32[3] = { 2, -4, 0 };
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static const int8_t fwd_stage_range_col_adst_dct_32[12] = {
|
|
15, 15, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20
|
|
};
|
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static const int8_t fwd_stage_range_row_adst_dct_32[10] = {
|
|
16, 17, 18, 19, 20, 20, 20, 20, 20, 20
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|
};
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static const int8_t fwd_cos_bit_col_adst_dct_32[12] = {
|
|
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
|
|
};
|
|
static const int8_t fwd_cos_bit_row_adst_dct_32[10] = { 12, 12, 12, 12, 12,
|
|
12, 12, 12, 12, 12 };
|
|
|
|
static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_32 = {
|
|
32, // .txfm_size
|
|
12, // .stage_num_col
|
|
10, // .stage_num_row
|
|
// 1, // .log_scale
|
|
fwd_shift_adst_dct_32, // .shift
|
|
fwd_stage_range_col_adst_dct_32, // .stage_range_col
|
|
fwd_stage_range_row_adst_dct_32, // .stage_range_row
|
|
fwd_cos_bit_col_adst_dct_32, // .cos_bit_col
|
|
fwd_cos_bit_row_adst_dct_32, // .cos_bit_row
|
|
TXFM_TYPE_ADST32, // .txfm_type_col
|
|
TXFM_TYPE_DCT32
|
|
}; // .txfm_type_row
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#endif // AV1_FWD_TXFM2D_CFG_H_
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