445 строки
19 KiB
C
445 строки
19 KiB
C
/*
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* Copyright (c) 2015 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#ifndef AV1_INV_TXFM2D_CFG_H_
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#define AV1_INV_TXFM2D_CFG_H_
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#include "av1/common/av1_inv_txfm1d.h"
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// ---------------- config inv_dct_dct_4 ----------------
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static const int8_t inv_shift_dct_dct_4[2] = { 0, -4 };
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static const int8_t inv_stage_range_col_dct_dct_4[4] = { 18, 18, 17, 17 };
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static const int8_t inv_stage_range_row_dct_dct_4[4] = { 18, 18, 18, 18 };
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static const int8_t inv_cos_bit_col_dct_dct_4[4] = { 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_dct_4[4] = { 13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_4 = {
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4, // .txfm_size
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4, // .stage_num_col
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4, // .stage_num_row
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// 0, // .log_scale
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inv_shift_dct_dct_4, // .shift
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inv_stage_range_col_dct_dct_4, // .stage_range_col
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inv_stage_range_row_dct_dct_4, // .stage_range_row
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inv_cos_bit_col_dct_dct_4, // .cos_bit_col
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inv_cos_bit_row_dct_dct_4, // .cos_bit_row
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TXFM_TYPE_DCT4, // .txfm_type_col
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TXFM_TYPE_DCT4
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}; // .txfm_type_row
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// ---------------- config inv_dct_dct_8 ----------------
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static const int8_t inv_shift_dct_dct_8[2] = { 0, -5 };
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static const int8_t inv_stage_range_col_dct_dct_8[6] = {
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19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_dct_dct_8[6] = {
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19, 19, 19, 19, 19, 19
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};
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static const int8_t inv_cos_bit_col_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_8 = {
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8, // .txfm_size
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6, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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inv_shift_dct_dct_8, // .shift
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inv_stage_range_col_dct_dct_8, // .stage_range_col
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inv_stage_range_row_dct_dct_8, // .stage_range_row
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inv_cos_bit_col_dct_dct_8, // .cos_bit_col
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inv_cos_bit_row_dct_dct_8, // .cos_bit_row
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TXFM_TYPE_DCT8, // .txfm_type_col
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TXFM_TYPE_DCT8
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}; // .txfm_type_row
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// ---------------- config inv_dct_dct_16 ----------------
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static const int8_t inv_shift_dct_dct_16[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_dct_dct_16[8] = { 19, 19, 19, 19,
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19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_dct_dct_16[8] = { 20, 20, 20, 20,
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20, 20, 20, 20 };
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static const int8_t inv_cos_bit_col_dct_dct_16[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_dct_16[8] = { 12, 12, 12, 12,
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12, 12, 12, 12 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_16 = {
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16, // .txfm_size
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8, // .stage_num_col
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8, // .stage_num_row
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// 0, // .log_scale
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inv_shift_dct_dct_16, // .shift
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inv_stage_range_col_dct_dct_16, // .stage_range_col
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inv_stage_range_row_dct_dct_16, // .stage_range_row
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inv_cos_bit_col_dct_dct_16, // .cos_bit_col
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inv_cos_bit_row_dct_dct_16, // .cos_bit_row
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TXFM_TYPE_DCT16, // .txfm_type_col
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TXFM_TYPE_DCT16
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}; // .txfm_type_row
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// ---------------- config inv_dct_dct_32 ----------------
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static const int8_t inv_shift_dct_dct_32[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_dct_dct_32[10] = { 19, 19, 19, 19, 19,
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19, 19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_dct_dct_32[10] = { 20, 20, 20, 20, 20,
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20, 20, 20, 20, 20 };
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static const int8_t inv_cos_bit_col_dct_dct_32[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_dct_32[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_32 = {
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32, // .txfm_size
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10, // .stage_num_col
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10, // .stage_num_row
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// 1, // .log_scale
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inv_shift_dct_dct_32, // .shift
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inv_stage_range_col_dct_dct_32, // .stage_range_col
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inv_stage_range_row_dct_dct_32, // .stage_range_row
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inv_cos_bit_col_dct_dct_32, // .cos_bit_col
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inv_cos_bit_row_dct_dct_32, // .cos_bit_row
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TXFM_TYPE_DCT32, // .txfm_type_col
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TXFM_TYPE_DCT32
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}; // .txfm_type_row
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// ---------------- config inv_dct_dct_64 ----------------
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static const int8_t inv_shift_dct_dct_64[2] = { -1, -7 };
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static const int8_t inv_stage_range_col_dct_dct_64[12] = {
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19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_dct_dct_64[12] = {
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20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
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};
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static const int8_t inv_cos_bit_col_dct_dct_64[12] = { 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_dct_64[12] = { 12, 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12, 12 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_64 = {
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64, // .txfm_size
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12, // .stage_num_col
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12, // .stage_num_row
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inv_shift_dct_dct_64, // .shift
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inv_stage_range_col_dct_dct_64, // .stage_range_col
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inv_stage_range_row_dct_dct_64, // .stage_range_row
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inv_cos_bit_col_dct_dct_64, // .cos_bit_col
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inv_cos_bit_row_dct_dct_64, // .cos_bit_row
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TXFM_TYPE_DCT64, // .txfm_type_col
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TXFM_TYPE_DCT64
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}; // .txfm_type_row
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// ---------------- config inv_dct_adst_4 ----------------
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static const int8_t inv_shift_dct_adst_4[2] = { 0, -4 };
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static const int8_t inv_stage_range_col_dct_adst_4[4] = { 18, 18, 17, 17 };
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static const int8_t inv_stage_range_row_dct_adst_4[6] = {
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18, 18, 18, 18, 18, 18
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};
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static const int8_t inv_cos_bit_col_dct_adst_4[4] = { 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_4 = {
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4, // .txfm_size
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4, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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inv_shift_dct_adst_4, // .shift
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inv_stage_range_col_dct_adst_4, // .stage_range_col
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inv_stage_range_row_dct_adst_4, // .stage_range_row
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inv_cos_bit_col_dct_adst_4, // .cos_bit_col
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inv_cos_bit_row_dct_adst_4, // .cos_bit_row
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TXFM_TYPE_DCT4, // .txfm_type_col
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TXFM_TYPE_ADST4
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}; // .txfm_type_row
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// ---------------- config inv_dct_adst_8 ----------------
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static const int8_t inv_shift_dct_adst_8[2] = { 0, -5 };
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static const int8_t inv_stage_range_col_dct_adst_8[6] = {
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19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_dct_adst_8[8] = { 19, 19, 19, 19,
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19, 19, 19, 19 };
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static const int8_t inv_cos_bit_col_dct_adst_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_adst_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_8 = {
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8, // .txfm_size
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6, // .stage_num_col
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8, // .stage_num_row
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// 0, // .log_scale
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inv_shift_dct_adst_8, // .shift
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inv_stage_range_col_dct_adst_8, // .stage_range_col
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inv_stage_range_row_dct_adst_8, // .stage_range_row
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inv_cos_bit_col_dct_adst_8, // .cos_bit_col
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inv_cos_bit_row_dct_adst_8, // .cos_bit_row
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TXFM_TYPE_DCT8, // .txfm_type_col
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TXFM_TYPE_ADST8
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}; // .txfm_type_row
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// ---------------- config inv_dct_adst_16 ----------------
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static const int8_t inv_shift_dct_adst_16[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_dct_adst_16[8] = { 19, 19, 19, 19,
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19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_dct_adst_16[10] = {
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20, 20, 20, 20, 20, 20, 20, 20, 20, 20
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};
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static const int8_t inv_cos_bit_col_dct_adst_16[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_adst_16[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_16 = {
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16, // .txfm_size
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8, // .stage_num_col
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10, // .stage_num_row
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// 0, // .log_scale
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inv_shift_dct_adst_16, // .shift
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inv_stage_range_col_dct_adst_16, // .stage_range_col
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inv_stage_range_row_dct_adst_16, // .stage_range_row
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inv_cos_bit_col_dct_adst_16, // .cos_bit_col
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inv_cos_bit_row_dct_adst_16, // .cos_bit_row
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TXFM_TYPE_DCT16, // .txfm_type_col
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TXFM_TYPE_ADST16
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}; // .txfm_type_row
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// ---------------- config inv_dct_adst_32 ----------------
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static const int8_t inv_shift_dct_adst_32[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_dct_adst_32[10] = {
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19, 19, 19, 19, 19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_dct_adst_32[12] = {
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20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
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};
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static const int8_t inv_cos_bit_col_dct_adst_32[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_adst_32[12] = {
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12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
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};
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static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_32 = {
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32, // .txfm_size
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10, // .stage_num_col
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12, // .stage_num_row
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// 1, // .log_scale
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inv_shift_dct_adst_32, // .shift
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inv_stage_range_col_dct_adst_32, // .stage_range_col
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inv_stage_range_row_dct_adst_32, // .stage_range_row
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inv_cos_bit_col_dct_adst_32, // .cos_bit_col
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inv_cos_bit_row_dct_adst_32, // .cos_bit_row
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TXFM_TYPE_DCT32, // .txfm_type_col
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TXFM_TYPE_ADST32
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}; // .txfm_type_row
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// ---------------- config inv_adst_adst_4 ----------------
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static const int8_t inv_shift_adst_adst_4[2] = { 0, -4 };
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static const int8_t inv_stage_range_col_adst_adst_4[6] = { 18, 18, 18,
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18, 17, 17 };
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static const int8_t inv_stage_range_row_adst_adst_4[6] = { 18, 18, 18,
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18, 18, 18 };
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static const int8_t inv_cos_bit_col_adst_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_4 = {
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4, // .txfm_size
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6, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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inv_shift_adst_adst_4, // .shift
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inv_stage_range_col_adst_adst_4, // .stage_range_col
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inv_stage_range_row_adst_adst_4, // .stage_range_row
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inv_cos_bit_col_adst_adst_4, // .cos_bit_col
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inv_cos_bit_row_adst_adst_4, // .cos_bit_row
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TXFM_TYPE_ADST4, // .txfm_type_col
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TXFM_TYPE_ADST4
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}; // .txfm_type_row
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// ---------------- config inv_adst_adst_8 ----------------
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static const int8_t inv_shift_adst_adst_8[2] = { 0, -5 };
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static const int8_t inv_stage_range_col_adst_adst_8[8] = { 19, 19, 19, 19,
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19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_adst_adst_8[8] = { 19, 19, 19, 19,
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19, 19, 19, 19 };
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static const int8_t inv_cos_bit_col_adst_adst_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_adst_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_8 = {
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8, // .txfm_size
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8, // .stage_num_col
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8, // .stage_num_row
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// 0, // .log_scale
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inv_shift_adst_adst_8, // .shift
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inv_stage_range_col_adst_adst_8, // .stage_range_col
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inv_stage_range_row_adst_adst_8, // .stage_range_row
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inv_cos_bit_col_adst_adst_8, // .cos_bit_col
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inv_cos_bit_row_adst_adst_8, // .cos_bit_row
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TXFM_TYPE_ADST8, // .txfm_type_col
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TXFM_TYPE_ADST8
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}; // .txfm_type_row
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// ---------------- config inv_adst_adst_16 ----------------
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static const int8_t inv_shift_adst_adst_16[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_adst_adst_16[10] = {
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19, 19, 19, 19, 19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_adst_adst_16[10] = {
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20, 20, 20, 20, 20, 20, 20, 20, 20, 20
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};
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static const int8_t inv_cos_bit_col_adst_adst_16[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_adst_16[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_16 = {
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16, // .txfm_size
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10, // .stage_num_col
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10, // .stage_num_row
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// 0, // .log_scale
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inv_shift_adst_adst_16, // .shift
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inv_stage_range_col_adst_adst_16, // .stage_range_col
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inv_stage_range_row_adst_adst_16, // .stage_range_row
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inv_cos_bit_col_adst_adst_16, // .cos_bit_col
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inv_cos_bit_row_adst_adst_16, // .cos_bit_row
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TXFM_TYPE_ADST16, // .txfm_type_col
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TXFM_TYPE_ADST16
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}; // .txfm_type_row
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// ---------------- config inv_adst_adst_32 ----------------
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static const int8_t inv_shift_adst_adst_32[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_adst_adst_32[12] = {
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19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_adst_adst_32[12] = {
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20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
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};
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static const int8_t inv_cos_bit_col_adst_adst_32[12] = {
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13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13
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};
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static const int8_t inv_cos_bit_row_adst_adst_32[12] = {
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12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
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};
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_32 = {
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32, // .txfm_size
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12, // .stage_num_col
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12, // .stage_num_row
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// 1, // .log_scale
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inv_shift_adst_adst_32, // .shift
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inv_stage_range_col_adst_adst_32, // .stage_range_col
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inv_stage_range_row_adst_adst_32, // .stage_range_row
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inv_cos_bit_col_adst_adst_32, // .cos_bit_col
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inv_cos_bit_row_adst_adst_32, // .cos_bit_row
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TXFM_TYPE_ADST32, // .txfm_type_col
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TXFM_TYPE_ADST32
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}; // .txfm_type_row
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// ---------------- config inv_adst_dct_4 ----------------
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static const int8_t inv_shift_adst_dct_4[2] = { 0, -4 };
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static const int8_t inv_stage_range_col_adst_dct_4[6] = {
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18, 18, 18, 18, 17, 17
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};
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static const int8_t inv_stage_range_row_adst_dct_4[4] = { 18, 18, 18, 18 };
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static const int8_t inv_cos_bit_col_adst_dct_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_dct_4[4] = { 13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_4 = {
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4, // .txfm_size
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6, // .stage_num_col
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4, // .stage_num_row
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// 0, // .log_scale
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inv_shift_adst_dct_4, // .shift
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inv_stage_range_col_adst_dct_4, // .stage_range_col
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inv_stage_range_row_adst_dct_4, // .stage_range_row
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inv_cos_bit_col_adst_dct_4, // .cos_bit_col
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inv_cos_bit_row_adst_dct_4, // .cos_bit_row
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TXFM_TYPE_ADST4, // .txfm_type_col
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TXFM_TYPE_DCT4
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}; // .txfm_type_row
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// ---------------- config inv_adst_dct_8 ----------------
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static const int8_t inv_shift_adst_dct_8[2] = { 0, -5 };
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static const int8_t inv_stage_range_col_adst_dct_8[8] = { 19, 19, 19, 19,
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19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_adst_dct_8[6] = {
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19, 19, 19, 19, 19, 19
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};
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static const int8_t inv_cos_bit_col_adst_dct_8[8] = { 13, 13, 13, 13,
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13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_8 = {
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8, // .txfm_size
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8, // .stage_num_col
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6, // .stage_num_row
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// 0, // .log_scale
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inv_shift_adst_dct_8, // .shift
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inv_stage_range_col_adst_dct_8, // .stage_range_col
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inv_stage_range_row_adst_dct_8, // .stage_range_row
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inv_cos_bit_col_adst_dct_8, // .cos_bit_col
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inv_cos_bit_row_adst_dct_8, // .cos_bit_row
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TXFM_TYPE_ADST8, // .txfm_type_col
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TXFM_TYPE_DCT8
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}; // .txfm_type_row
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// ---------------- config inv_adst_dct_16 ----------------
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static const int8_t inv_shift_adst_dct_16[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_adst_dct_16[10] = {
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19, 19, 19, 19, 19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_adst_dct_16[8] = { 20, 20, 20, 20,
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20, 20, 20, 20 };
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static const int8_t inv_cos_bit_col_adst_dct_16[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_dct_16[8] = { 12, 12, 12, 12,
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12, 12, 12, 12 };
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_16 = {
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16, // .txfm_size
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10, // .stage_num_col
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8, // .stage_num_row
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// 0, // .log_scale
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inv_shift_adst_dct_16, // .shift
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inv_stage_range_col_adst_dct_16, // .stage_range_col
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inv_stage_range_row_adst_dct_16, // .stage_range_row
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inv_cos_bit_col_adst_dct_16, // .cos_bit_col
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inv_cos_bit_row_adst_dct_16, // .cos_bit_row
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TXFM_TYPE_ADST16, // .txfm_type_col
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TXFM_TYPE_DCT16
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}; // .txfm_type_row
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// ---------------- config inv_adst_dct_32 ----------------
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static const int8_t inv_shift_adst_dct_32[2] = { -1, -5 };
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static const int8_t inv_stage_range_col_adst_dct_32[12] = {
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19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_adst_dct_32[10] = {
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20, 20, 20, 20, 20, 20, 20, 20, 20, 20
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};
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static const int8_t inv_cos_bit_col_adst_dct_32[12] = {
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13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13
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};
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static const int8_t inv_cos_bit_row_adst_dct_32[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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|
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static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_32 = {
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32, // .txfm_size
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12, // .stage_num_col
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10, // .stage_num_row
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// 1, // .log_scale
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inv_shift_adst_dct_32, // .shift
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inv_stage_range_col_adst_dct_32, // .stage_range_col
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inv_stage_range_row_adst_dct_32, // .stage_range_row
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inv_cos_bit_col_adst_dct_32, // .cos_bit_col
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|
inv_cos_bit_row_adst_dct_32, // .cos_bit_row
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TXFM_TYPE_ADST32, // .txfm_type_col
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|
TXFM_TYPE_DCT32
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}; // .txfm_type_row
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#endif // AV1_INV_TXFM2D_CFG_H_
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