2013-07-24 11:41:39 +04:00
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- */
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/* vim: set ts=8 sts=2 et sw=2 tw=80: */
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2013-04-22 22:12:03 +04:00
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/* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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/*
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* Implements (almost always) lock-free atomic operations. The operations here
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* are a subset of that which can be found in C++11's <atomic> header, with a
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* different API to enforce consistent memory ordering constraints.
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*
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* Anyone caught using |volatile| for inter-thread memory safety needs to be
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* sent a copy of this header and the C++11 standard.
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*/
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2013-07-24 11:41:39 +04:00
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#ifndef mozilla_Atomics_h
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#define mozilla_Atomics_h
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2013-04-22 22:12:03 +04:00
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#include "mozilla/Assertions.h"
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2013-08-15 00:28:17 +04:00
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#include "mozilla/Attributes.h"
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2013-08-30 07:44:23 +04:00
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#include "mozilla/Compiler.h"
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2018-07-21 17:17:16 +03:00
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#include "mozilla/RecordReplay.h"
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2013-04-22 22:12:03 +04:00
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#include "mozilla/TypeTraits.h"
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2017-05-10 16:58:28 +03:00
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#include <atomic>
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2013-04-22 22:12:03 +04:00
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#include <stdint.h>
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namespace mozilla {
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/**
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* An enum of memory ordering possibilities for atomics.
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*
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* Memory ordering is the observable state of distinct values in memory.
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* (It's a separate concept from atomicity, which concerns whether an
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* operation can ever be observed in an intermediate state. Don't
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* conflate the two!) Given a sequence of operations in source code on
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* memory, it is *not* always the case that, at all times and on all
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* cores, those operations will appear to have occurred in that exact
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* sequence. First, the compiler might reorder that sequence, if it
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* thinks another ordering will be more efficient. Second, the CPU may
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* not expose so consistent a view of memory. CPUs will often perform
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* their own instruction reordering, above and beyond that performed by
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* the compiler. And each core has its own memory caches, and accesses
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* (reads and writes both) to "memory" may only resolve to out-of-date
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* cache entries -- not to the "most recently" performed operation in
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* some global sense. Any access to a value that may be used by
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* multiple threads, potentially across multiple cores, must therefore
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* have a memory ordering imposed on it, for all code on all
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* threads/cores to have a sufficiently coherent worldview.
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*
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* http://gcc.gnu.org/wiki/Atomic/GCCMM/AtomicSync and
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* http://en.cppreference.com/w/cpp/atomic/memory_order go into more
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* detail on all this, including examples of how each mode works.
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*
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* Note that for simplicity and practicality, not all of the modes in
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* C++11 are supported. The missing C++11 modes are either subsumed by
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* the modes we provide below, or not relevant for the CPUs we support
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* in Gecko. These three modes are confusing enough as it is!
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*/
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enum MemoryOrdering {
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/*
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* Relaxed ordering is the simplest memory ordering: none at all.
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* When the result of a write is observed, nothing may be inferred
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* about other memory. Writes ostensibly performed "before" on the
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* writing thread may not yet be visible. Writes performed "after" on
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* the writing thread may already be visible, if the compiler or CPU
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* reordered them. (The latter can happen if reads and/or writes get
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* held up in per-processor caches.) Relaxed ordering means
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* operations can always use cached values (as long as the actual
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* updates to atomic values actually occur, correctly, eventually), so
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* it's usually the fastest sort of atomic access. For this reason,
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* *it's also the most dangerous kind of access*.
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*
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* Relaxed ordering is good for things like process-wide statistics
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* counters that don't need to be consistent with anything else, so
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* long as updates themselves are atomic. (And so long as any
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* observations of that value can tolerate being out-of-date -- if you
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* need some sort of up-to-date value, you need some sort of other
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* synchronizing operation.) It's *not* good for locks, mutexes,
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* reference counts, etc. that mediate access to other memory, or must
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* be observably consistent with other memory.
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*
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* x86 architectures don't take advantage of the optimization
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* opportunities that relaxed ordering permits. Thus it's possible
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* that using relaxed ordering will "work" on x86 but fail elsewhere
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* (ARM, say, which *does* implement non-sequentially-consistent
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* relaxed ordering semantics). Be extra-careful using relaxed
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* ordering if you can't easily test non-x86 architectures!
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*/
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Relaxed,
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2014-05-30 09:40:33 +04:00
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2013-04-22 22:12:03 +04:00
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/*
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* When an atomic value is updated with ReleaseAcquire ordering, and
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* that new value is observed with ReleaseAcquire ordering, prior
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* writes (atomic or not) are also observable. What ReleaseAcquire
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* *doesn't* give you is any observable ordering guarantees for
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* ReleaseAcquire-ordered operations on different objects. For
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* example, if there are two cores that each perform ReleaseAcquire
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* operations on separate objects, each core may or may not observe
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* the operations made by the other core. The only way the cores can
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* be synchronized with ReleaseAcquire is if they both
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* ReleaseAcquire-access the same object. This implies that you can't
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* necessarily describe some global total ordering of ReleaseAcquire
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* operations.
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*
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* ReleaseAcquire ordering is good for (as the name implies) atomic
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* operations on values controlling ownership of things: reference
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* counts, mutexes, and the like. However, if you are thinking about
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* using these to implement your own locks or mutexes, you should take
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* a good, hard look at actual lock or mutex primitives first.
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*/
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ReleaseAcquire,
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2014-05-30 09:40:33 +04:00
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2013-04-22 22:12:03 +04:00
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/*
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* When an atomic value is updated with SequentiallyConsistent
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* ordering, all writes observable when the update is observed, just
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* as with ReleaseAcquire ordering. But, furthermore, a global total
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* ordering of SequentiallyConsistent operations *can* be described.
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* For example, if two cores perform SequentiallyConsistent operations
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* on separate objects, one core will observably perform its update
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* (and all previous operations will have completed), then the other
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* core will observably perform its update (and all previous
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* operations will have completed). (Although those previous
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* operations aren't themselves ordered -- they could be intermixed,
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* or ordered if they occur on atomic values with ordering
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* requirements.) SequentiallyConsistent is the *simplest and safest*
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* ordering of atomic operations -- it's always as if one operation
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* happens, then another, then another, in some order -- and every
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* core observes updates to happen in that single order. Because it
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* has the most synchronization requirements, operations ordered this
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* way also tend to be slowest.
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*
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* SequentiallyConsistent ordering can be desirable when multiple
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* threads observe objects, and they all have to agree on the
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* observable order of changes to them. People expect
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* SequentiallyConsistent ordering, even if they shouldn't, when
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* writing code, atomic or otherwise. SequentiallyConsistent is also
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* the ordering of choice when designing lockless data structures. If
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* you don't know what order to use, use this one.
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*/
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SequentiallyConsistent,
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};
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namespace detail {
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2018-07-21 17:17:16 +03:00
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/*
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* Structure which can be used to preserve the ordering of atomic accesses
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* when recording or replaying an execution, depending on the Recording enum.
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*
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* Atomic access ordering is preserved by default when recording/replaying.
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* This should be overridden for atomics that can be accessed in code that
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* runs non-deterministically when recording/replaying, such as during GC, the
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* JS interrupt callback, or code that is affected by JIT compilation or
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* debugger activity.
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*/
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template<recordreplay::Behavior Recording> struct AutoRecordAtomicAccess;
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template<>
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struct AutoRecordAtomicAccess<recordreplay::Behavior::DontPreserve> {
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AutoRecordAtomicAccess() {}
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~AutoRecordAtomicAccess() {}
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};
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template<>
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struct AutoRecordAtomicAccess<recordreplay::Behavior::Preserve> {
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AutoRecordAtomicAccess() { recordreplay::BeginOrderedAtomicAccess(); }
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~AutoRecordAtomicAccess() { recordreplay::EndOrderedAtomicAccess(); }
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};
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Bug 898491 - use the four argument form of compare_exchange_strong in Atomics.h; r=Waldo
The C++ standard (29.6p20-22 in N3337) specifies limitations on the failure ordering
for atomic compare-and-exchange. Specifically, you can't pass memory_order_acq_rel or
memory_order_release. For the (T&, T, std::memory_order) version, which we use, the
standard specifies that the provided argument should be "lowered" to comply with the
above restrictions on the failure ordering (29.6p21).
However, it seems that some versions of GCC's <atomic> header don't follow the spec
for the generic versions of std::atomic<>, though they do follow the spec with the
appropriate specializations (bool, integer, and pointer) of std::atomic<>. This
results in mysterious failures when using atomic enums, as bug 888548 purports to
do, and ReleaseAcquire ordering.
Happily, we can work around this by using the more explicit version of
compare-and-exchange. I've chosen to add another member to AtomicOrderConstraints,
even though it'd be the same as LoadOrder. I feel explicitness is to be preferred
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2013-07-26 20:31:19 +04:00
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/*
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* We provide CompareExchangeFailureOrder to work around a bug in some
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* versions of GCC's <atomic> header. See bug 898491.
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*/
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2013-04-22 22:12:03 +04:00
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template<MemoryOrdering Order> struct AtomicOrderConstraints;
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template<>
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struct AtomicOrderConstraints<Relaxed>
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{
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2014-05-30 09:40:33 +04:00
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static const std::memory_order AtomicRMWOrder = std::memory_order_relaxed;
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static const std::memory_order LoadOrder = std::memory_order_relaxed;
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static const std::memory_order StoreOrder = std::memory_order_relaxed;
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static const std::memory_order CompareExchangeFailureOrder =
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std::memory_order_relaxed;
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2013-04-22 22:12:03 +04:00
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};
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template<>
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struct AtomicOrderConstraints<ReleaseAcquire>
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{
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2014-05-30 09:40:33 +04:00
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static const std::memory_order AtomicRMWOrder = std::memory_order_acq_rel;
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static const std::memory_order LoadOrder = std::memory_order_acquire;
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static const std::memory_order StoreOrder = std::memory_order_release;
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static const std::memory_order CompareExchangeFailureOrder =
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std::memory_order_acquire;
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2013-04-22 22:12:03 +04:00
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};
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template<>
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struct AtomicOrderConstraints<SequentiallyConsistent>
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{
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2014-05-30 09:40:33 +04:00
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static const std::memory_order AtomicRMWOrder = std::memory_order_seq_cst;
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static const std::memory_order LoadOrder = std::memory_order_seq_cst;
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static const std::memory_order StoreOrder = std::memory_order_seq_cst;
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static const std::memory_order CompareExchangeFailureOrder =
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std::memory_order_seq_cst;
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2013-04-22 22:12:03 +04:00
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};
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template<typename T, MemoryOrdering Order>
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struct IntrinsicBase
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{
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2014-05-30 09:40:33 +04:00
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typedef std::atomic<T> ValueType;
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typedef AtomicOrderConstraints<Order> OrderedOp;
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2013-04-22 22:12:03 +04:00
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};
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2018-07-21 17:17:16 +03:00
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template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
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2013-04-22 22:12:03 +04:00
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struct IntrinsicMemoryOps : public IntrinsicBase<T, Order>
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{
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2014-05-30 09:40:33 +04:00
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typedef IntrinsicBase<T, Order> Base;
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static T load(const typename Base::ValueType& aPtr)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2014-05-30 09:40:33 +04:00
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return aPtr.load(Base::OrderedOp::LoadOrder);
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}
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static void store(typename Base::ValueType& aPtr, T aVal)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2014-05-30 09:40:33 +04:00
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aPtr.store(aVal, Base::OrderedOp::StoreOrder);
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}
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static T exchange(typename Base::ValueType& aPtr, T aVal)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2014-05-30 09:40:33 +04:00
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return aPtr.exchange(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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static bool compareExchange(typename Base::ValueType& aPtr,
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T aOldVal, T aNewVal)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2014-05-30 09:40:33 +04:00
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return aPtr.compare_exchange_strong(aOldVal, aNewVal,
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Base::OrderedOp::AtomicRMWOrder,
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Base::OrderedOp::CompareExchangeFailureOrder);
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}
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2013-04-22 22:12:03 +04:00
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};
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2018-07-21 17:17:16 +03:00
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template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
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2013-04-22 22:12:03 +04:00
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struct IntrinsicAddSub : public IntrinsicBase<T, Order>
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{
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2014-05-30 09:40:33 +04:00
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typedef IntrinsicBase<T, Order> Base;
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static T add(typename Base::ValueType& aPtr, T aVal)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2014-05-30 09:40:33 +04:00
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return aPtr.fetch_add(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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static T sub(typename Base::ValueType& aPtr, T aVal)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2014-05-30 09:40:33 +04:00
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return aPtr.fetch_sub(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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2013-04-22 22:12:03 +04:00
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};
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2018-07-21 17:17:16 +03:00
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template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
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struct IntrinsicAddSub<T*, Order, Recording> : public IntrinsicBase<T*, Order>
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2013-04-22 22:12:03 +04:00
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{
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2014-05-30 09:40:33 +04:00
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typedef IntrinsicBase<T*, Order> Base;
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static T* add(typename Base::ValueType& aPtr, ptrdiff_t aVal)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2015-08-01 05:25:21 +03:00
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return aPtr.fetch_add(aVal, Base::OrderedOp::AtomicRMWOrder);
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2014-05-30 09:40:33 +04:00
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}
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static T* sub(typename Base::ValueType& aPtr, ptrdiff_t aVal)
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{
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2018-07-21 17:17:16 +03:00
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AutoRecordAtomicAccess<Recording> record;
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2015-08-01 05:25:21 +03:00
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return aPtr.fetch_sub(aVal, Base::OrderedOp::AtomicRMWOrder);
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2014-05-30 09:40:33 +04:00
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}
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2013-04-22 22:12:03 +04:00
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};
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2018-07-21 17:17:16 +03:00
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template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
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struct IntrinsicIncDec : public IntrinsicAddSub<T, Order, Recording>
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2013-04-22 22:12:03 +04:00
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{
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2014-05-30 09:40:33 +04:00
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typedef IntrinsicBase<T, Order> Base;
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static T inc(typename Base::ValueType& aPtr)
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{
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2018-07-21 17:17:16 +03:00
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return IntrinsicAddSub<T, Order, Recording>::add(aPtr, 1);
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2014-05-30 09:40:33 +04:00
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}
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static T dec(typename Base::ValueType& aPtr)
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{
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2018-07-21 17:17:16 +03:00
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|
|
return IntrinsicAddSub<T, Order, Recording>::sub(aPtr, 1);
|
2014-05-30 09:40:33 +04:00
|
|
|
}
|
2013-04-22 22:12:03 +04:00
|
|
|
};
|
|
|
|
|
2018-07-21 17:17:16 +03:00
|
|
|
template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
|
|
|
|
struct AtomicIntrinsics : public IntrinsicMemoryOps<T, Order, Recording>,
|
|
|
|
public IntrinsicIncDec<T, Order, Recording>
|
2013-04-22 22:12:03 +04:00
|
|
|
{
|
2014-05-30 09:40:33 +04:00
|
|
|
typedef IntrinsicBase<T, Order> Base;
|
|
|
|
|
|
|
|
static T or_(typename Base::ValueType& aPtr, T aVal)
|
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
AutoRecordAtomicAccess<Recording> record;
|
2014-05-30 09:40:33 +04:00
|
|
|
return aPtr.fetch_or(aVal, Base::OrderedOp::AtomicRMWOrder);
|
|
|
|
}
|
|
|
|
|
|
|
|
static T xor_(typename Base::ValueType& aPtr, T aVal)
|
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
AutoRecordAtomicAccess<Recording> record;
|
2014-05-30 09:40:33 +04:00
|
|
|
return aPtr.fetch_xor(aVal, Base::OrderedOp::AtomicRMWOrder);
|
|
|
|
}
|
|
|
|
|
|
|
|
static T and_(typename Base::ValueType& aPtr, T aVal)
|
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
AutoRecordAtomicAccess<Recording> record;
|
2014-05-30 09:40:33 +04:00
|
|
|
return aPtr.fetch_and(aVal, Base::OrderedOp::AtomicRMWOrder);
|
|
|
|
}
|
2013-04-22 22:12:03 +04:00
|
|
|
};
|
|
|
|
|
2018-07-21 17:17:16 +03:00
|
|
|
template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
|
|
|
|
struct AtomicIntrinsics<T*, Order, Recording>
|
|
|
|
: public IntrinsicMemoryOps<T*, Order, Recording>,
|
|
|
|
public IntrinsicIncDec<T*, Order, Recording>
|
2013-04-22 22:12:03 +04:00
|
|
|
{
|
|
|
|
};
|
|
|
|
|
2015-11-04 00:03:26 +03:00
|
|
|
template<typename T>
|
|
|
|
struct ToStorageTypeArgument
|
|
|
|
{
|
2016-07-09 00:39:53 +03:00
|
|
|
static constexpr T convert (T aT) { return aT; }
|
2015-11-04 00:03:26 +03:00
|
|
|
};
|
|
|
|
|
2018-07-21 17:17:16 +03:00
|
|
|
template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
|
2013-04-22 22:12:03 +04:00
|
|
|
class AtomicBase
|
|
|
|
{
|
2015-04-18 04:40:52 +03:00
|
|
|
static_assert(sizeof(T) == 4 || sizeof(T) == 8,
|
|
|
|
"mozilla/Atomics.h only supports 32-bit and 64-bit types");
|
2014-05-30 09:40:33 +04:00
|
|
|
|
|
|
|
protected:
|
2018-07-21 17:17:16 +03:00
|
|
|
typedef typename detail::AtomicIntrinsics<T, Order, Recording> Intrinsics;
|
2015-11-04 00:03:26 +03:00
|
|
|
typedef typename Intrinsics::ValueType ValueType;
|
|
|
|
ValueType mValue;
|
2014-05-30 09:40:33 +04:00
|
|
|
|
|
|
|
public:
|
2016-07-09 00:39:53 +03:00
|
|
|
constexpr AtomicBase() : mValue() {}
|
|
|
|
explicit constexpr AtomicBase(T aInit)
|
2015-11-04 00:03:26 +03:00
|
|
|
: mValue(ToStorageTypeArgument<T>::convert(aInit))
|
|
|
|
{}
|
2014-05-30 09:40:33 +04:00
|
|
|
|
|
|
|
// Note: we can't provide operator T() here because Atomic<bool> inherits
|
|
|
|
// from AtomcBase with T=uint32_t and not T=bool. If we implemented
|
|
|
|
// operator T() here, it would cause errors when comparing Atomic<bool> with
|
|
|
|
// a regular bool.
|
|
|
|
|
|
|
|
T operator=(T aVal)
|
|
|
|
{
|
|
|
|
Intrinsics::store(mValue, aVal);
|
|
|
|
return aVal;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Performs an atomic swap operation. aVal is stored and the previous
|
|
|
|
* value of this variable is returned.
|
|
|
|
*/
|
|
|
|
T exchange(T aVal)
|
|
|
|
{
|
|
|
|
return Intrinsics::exchange(mValue, aVal);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Performs an atomic compare-and-swap operation and returns true if it
|
|
|
|
* succeeded. This is equivalent to atomically doing
|
|
|
|
*
|
|
|
|
* if (mValue == aOldValue) {
|
|
|
|
* mValue = aNewValue;
|
|
|
|
* return true;
|
|
|
|
* } else {
|
|
|
|
* return false;
|
|
|
|
* }
|
|
|
|
*/
|
|
|
|
bool compareExchange(T aOldValue, T aNewValue)
|
|
|
|
{
|
|
|
|
return Intrinsics::compareExchange(mValue, aOldValue, aNewValue);
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
2018-07-21 17:17:16 +03:00
|
|
|
AtomicBase(const AtomicBase& aCopy) = delete;
|
2013-04-22 22:12:03 +04:00
|
|
|
};
|
|
|
|
|
2018-07-21 17:17:16 +03:00
|
|
|
template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
|
|
|
|
class AtomicBaseIncDec : public AtomicBase<T, Order, Recording>
|
2013-08-02 05:21:32 +04:00
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
typedef typename detail::AtomicBase<T, Order, Recording> Base;
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
public:
|
2016-07-09 00:39:53 +03:00
|
|
|
constexpr AtomicBaseIncDec() : Base() {}
|
|
|
|
explicit constexpr AtomicBaseIncDec(T aInit) : Base(aInit) {}
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
using Base::operator=;
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
operator T() const { return Base::Intrinsics::load(Base::mValue); }
|
|
|
|
T operator++(int) { return Base::Intrinsics::inc(Base::mValue); }
|
|
|
|
T operator--(int) { return Base::Intrinsics::dec(Base::mValue); }
|
|
|
|
T operator++() { return Base::Intrinsics::inc(Base::mValue) + 1; }
|
|
|
|
T operator--() { return Base::Intrinsics::dec(Base::mValue) - 1; }
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
private:
|
2018-07-21 17:17:16 +03:00
|
|
|
AtomicBaseIncDec(const AtomicBaseIncDec& aCopy) = delete;
|
2013-08-02 05:21:32 +04:00
|
|
|
};
|
|
|
|
|
2013-04-22 22:12:03 +04:00
|
|
|
} // namespace detail
|
|
|
|
|
|
|
|
/**
|
|
|
|
* A wrapper for a type that enforces that all memory accesses are atomic.
|
|
|
|
*
|
2013-08-02 05:21:32 +04:00
|
|
|
* In general, where a variable |T foo| exists, |Atomic<T> foo| can be used in
|
|
|
|
* its place. Implementations for integral and pointer types are provided
|
|
|
|
* below.
|
2013-04-22 22:12:03 +04:00
|
|
|
*
|
|
|
|
* Atomic accesses are sequentially consistent by default. You should
|
|
|
|
* use the default unless you are tall enough to ride the
|
|
|
|
* memory-ordering roller coaster (if you're not sure, you aren't) and
|
|
|
|
* you have a compelling reason to do otherwise.
|
|
|
|
*
|
|
|
|
* There is one exception to the case of atomic memory accesses: providing an
|
|
|
|
* initial value of the atomic value is not guaranteed to be atomic. This is a
|
|
|
|
* deliberate design choice that enables static atomic variables to be declared
|
|
|
|
* without introducing extra static constructors.
|
|
|
|
*/
|
2013-08-02 05:21:32 +04:00
|
|
|
template<typename T,
|
|
|
|
MemoryOrdering Order = SequentiallyConsistent,
|
2018-07-21 17:17:16 +03:00
|
|
|
recordreplay::Behavior Recording = recordreplay::Behavior::Preserve,
|
2013-08-02 05:21:32 +04:00
|
|
|
typename Enable = void>
|
|
|
|
class Atomic;
|
2013-04-22 22:12:03 +04:00
|
|
|
|
2013-08-02 05:21:32 +04:00
|
|
|
/**
|
|
|
|
* Atomic<T> implementation for integral types.
|
|
|
|
*
|
|
|
|
* In addition to atomic store and load operations, compound assignment and
|
|
|
|
* increment/decrement operators are implemented which perform the
|
|
|
|
* corresponding read-modify-write operation atomically. Finally, an atomic
|
|
|
|
* swap method is provided.
|
|
|
|
*/
|
2018-07-21 17:17:16 +03:00
|
|
|
template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
|
|
|
|
class Atomic<T, Order, Recording,
|
|
|
|
typename EnableIf<IsIntegral<T>::value &&
|
|
|
|
!IsSame<T, bool>::value>::Type>
|
|
|
|
: public detail::AtomicBaseIncDec<T, Order, Recording>
|
2013-08-02 05:21:32 +04:00
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
typedef typename detail::AtomicBaseIncDec<T, Order, Recording> Base;
|
2014-05-30 09:40:33 +04:00
|
|
|
|
|
|
|
public:
|
2016-07-09 00:39:53 +03:00
|
|
|
constexpr Atomic() : Base() {}
|
|
|
|
explicit constexpr Atomic(T aInit) : Base(aInit) {}
|
2014-05-30 09:40:33 +04:00
|
|
|
|
|
|
|
using Base::operator=;
|
|
|
|
|
|
|
|
T operator+=(T aDelta)
|
|
|
|
{
|
|
|
|
return Base::Intrinsics::add(Base::mValue, aDelta) + aDelta;
|
|
|
|
}
|
2013-08-01 05:15:25 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
T operator-=(T aDelta)
|
|
|
|
{
|
|
|
|
return Base::Intrinsics::sub(Base::mValue, aDelta) - aDelta;
|
|
|
|
}
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
T operator|=(T aVal)
|
|
|
|
{
|
|
|
|
return Base::Intrinsics::or_(Base::mValue, aVal) | aVal;
|
|
|
|
}
|
2013-04-22 22:12:03 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
T operator^=(T aVal)
|
|
|
|
{
|
|
|
|
return Base::Intrinsics::xor_(Base::mValue, aVal) ^ aVal;
|
|
|
|
}
|
2013-04-22 22:12:03 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
T operator&=(T aVal)
|
|
|
|
{
|
|
|
|
return Base::Intrinsics::and_(Base::mValue, aVal) & aVal;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
2018-07-21 17:17:16 +03:00
|
|
|
Atomic(Atomic& aOther) = delete;
|
2013-04-22 22:12:03 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
2013-08-02 05:21:32 +04:00
|
|
|
* Atomic<T> implementation for pointer types.
|
2013-04-22 22:12:03 +04:00
|
|
|
*
|
2013-08-02 05:21:32 +04:00
|
|
|
* An atomic compare-and-swap primitive for pointer variables is provided, as
|
|
|
|
* are atomic increment and decement operators. Also provided are the compound
|
|
|
|
* assignment operators for addition and subtraction. Atomic swap (via
|
|
|
|
* exchange()) is included as well.
|
2013-04-22 22:12:03 +04:00
|
|
|
*/
|
2018-07-21 17:17:16 +03:00
|
|
|
template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
|
|
|
|
class Atomic<T*, Order, Recording> : public detail::AtomicBaseIncDec<T*, Order, Recording>
|
2013-04-22 22:12:03 +04:00
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
typedef typename detail::AtomicBaseIncDec<T*, Order, Recording> Base;
|
2013-04-22 22:12:03 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
public:
|
2016-07-09 00:39:53 +03:00
|
|
|
constexpr Atomic() : Base() {}
|
|
|
|
explicit constexpr Atomic(T* aInit) : Base(aInit) {}
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
using Base::operator=;
|
2013-04-22 22:12:03 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
T* operator+=(ptrdiff_t aDelta)
|
|
|
|
{
|
|
|
|
return Base::Intrinsics::add(Base::mValue, aDelta) + aDelta;
|
|
|
|
}
|
2013-04-22 22:12:03 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
T* operator-=(ptrdiff_t aDelta)
|
|
|
|
{
|
|
|
|
return Base::Intrinsics::sub(Base::mValue, aDelta) - aDelta;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
2018-07-21 17:17:16 +03:00
|
|
|
Atomic(Atomic& aOther) = delete;
|
2013-04-22 22:12:03 +04:00
|
|
|
};
|
|
|
|
|
2013-08-02 05:21:32 +04:00
|
|
|
/**
|
|
|
|
* Atomic<T> implementation for enum types.
|
|
|
|
*
|
|
|
|
* The atomic store and load operations and the atomic swap method is provided.
|
|
|
|
*/
|
2018-07-21 17:17:16 +03:00
|
|
|
template<typename T, MemoryOrdering Order, recordreplay::Behavior Recording>
|
|
|
|
class Atomic<T, Order, Recording, typename EnableIf<IsEnum<T>::value>::Type>
|
|
|
|
: public detail::AtomicBase<T, Order, Recording>
|
2013-08-02 05:21:32 +04:00
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
typedef typename detail::AtomicBase<T, Order, Recording> Base;
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
public:
|
2016-07-09 00:39:53 +03:00
|
|
|
constexpr Atomic() : Base() {}
|
|
|
|
explicit constexpr Atomic(T aInit) : Base(aInit) {}
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2015-11-04 00:03:26 +03:00
|
|
|
operator T() const { return T(Base::Intrinsics::load(Base::mValue)); }
|
2014-02-06 23:57:30 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
using Base::operator=;
|
2013-08-02 05:21:32 +04:00
|
|
|
|
2014-05-30 09:40:33 +04:00
|
|
|
private:
|
2018-07-21 17:17:16 +03:00
|
|
|
Atomic(Atomic& aOther) = delete;
|
2013-08-02 05:21:32 +04:00
|
|
|
};
|
|
|
|
|
2014-02-06 23:57:30 +04:00
|
|
|
/**
|
|
|
|
* Atomic<T> implementation for boolean types.
|
|
|
|
*
|
|
|
|
* The atomic store and load operations and the atomic swap method is provided.
|
|
|
|
*
|
|
|
|
* Note:
|
|
|
|
*
|
|
|
|
* - sizeof(Atomic<bool>) != sizeof(bool) for some implementations of
|
|
|
|
* bool and/or some implementations of std::atomic. This is allowed in
|
|
|
|
* [atomic.types.generic]p9.
|
|
|
|
*
|
|
|
|
* - It's not obvious whether the 8-bit atomic functions on Windows are always
|
|
|
|
* inlined or not. If they are not inlined, the corresponding functions in the
|
|
|
|
* runtime library are not available on Windows XP. This is why we implement
|
|
|
|
* Atomic<bool> with an underlying type of uint32_t.
|
|
|
|
*/
|
2018-07-21 17:17:16 +03:00
|
|
|
template<MemoryOrdering Order, recordreplay::Behavior Recording>
|
|
|
|
class Atomic<bool, Order, Recording>
|
|
|
|
: protected detail::AtomicBase<uint32_t, Order, Recording>
|
2014-02-06 23:57:30 +04:00
|
|
|
{
|
2018-07-21 17:17:16 +03:00
|
|
|
typedef typename detail::AtomicBase<uint32_t, Order, Recording> Base;
|
2014-05-30 09:40:33 +04:00
|
|
|
|
|
|
|
public:
|
2016-07-09 00:39:53 +03:00
|
|
|
constexpr Atomic() : Base() {}
|
|
|
|
explicit constexpr Atomic(bool aInit) : Base(aInit) {}
|
2014-05-30 09:40:33 +04:00
|
|
|
|
|
|
|
// We provide boolean wrappers for the underlying AtomicBase methods.
|
2015-04-11 06:05:46 +03:00
|
|
|
MOZ_IMPLICIT operator bool() const
|
2014-05-30 09:40:33 +04:00
|
|
|
{
|
|
|
|
return Base::Intrinsics::load(Base::mValue);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool operator=(bool aVal)
|
|
|
|
{
|
|
|
|
return Base::operator=(aVal);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool exchange(bool aVal)
|
|
|
|
{
|
|
|
|
return Base::exchange(aVal);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool compareExchange(bool aOldValue, bool aNewValue)
|
|
|
|
{
|
|
|
|
return Base::compareExchange(aOldValue, aNewValue);
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
2018-07-21 17:17:16 +03:00
|
|
|
Atomic(Atomic& aOther) = delete;
|
2014-02-06 23:57:30 +04:00
|
|
|
};
|
|
|
|
|
2017-10-10 20:19:31 +03:00
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// If you want to atomically swap two atomic values, use exchange().
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template<typename T, MemoryOrdering Order>
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void
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Swap(Atomic<T, Order>&, Atomic<T, Order>&) = delete;
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2013-04-22 22:12:03 +04:00
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} // namespace mozilla
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2013-07-24 11:41:39 +04:00
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#endif /* mozilla_Atomics_h */
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