2012-05-29 19:52:43 +04:00
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/* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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2011-04-15 04:34:18 +04:00
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.arch armv7-a
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.fpu neon
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2011-07-15 12:15:28 +04:00
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/* Allow to build on targets not supporting neon, and force the object file
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* target to avoid bumping the final binary target */
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.object_arch armv4t
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2011-04-15 04:34:18 +04:00
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.text
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.align
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.balign 64
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YCbCr42xToRGB565_DITHER03_CONSTS_NEON:
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.short -14240
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.short -14240+384
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.short 8672
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.short 8672+192
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.short -17696
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.short -17696+384
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.byte 102
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.byte 25
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.byte 52
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.byte 129
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YCbCr42xToRGB565_DITHER12_CONSTS_NEON:
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.short -14240+128
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.short -14240+256
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.short 8672+64
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.short 8672+128
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.short -17696+128
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.short -17696+256
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.byte 102
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.byte 25
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.byte 52
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.byte 129
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YCbCr42xToRGB565_DITHER21_CONSTS_NEON:
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.short -14240+256
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.short -14240+128
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.short 8672+128
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.short 8672+64
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.short -17696+256
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.short -17696+128
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.byte 102
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.byte 25
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.byte 52
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.byte 129
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YCbCr42xToRGB565_DITHER30_CONSTS_NEON:
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.short -14240+384
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.short -14240
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.short 8672+192
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.short 8672
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.short -17696+384
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.short -17696
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.byte 102
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.byte 25
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.byte 52
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.byte 129
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@ void ScaleYCbCr42xToRGB565_BilinearY_Row_NEON(
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@ yuv2rgb565_row_scale_bilinear_ctx *ctx, int dither);
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@
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@ ctx = {
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2012-08-22 19:59:54 +04:00
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@ uint16_t *rgb_row; /*r0*/
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@ const uint8_t *y_row; /*r1*/
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@ const uint8_t *u_row; /*r2*/
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@ const uint8_t *v_row; /*r3*/
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2011-04-15 04:34:18 +04:00
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@ int y_yweight; /*r4*/
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@ int y_pitch; /*r5*/
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@ int width; /*r6*/
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@ int source_x0_q16; /*r7*/
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@ int source_dx_q16; /*r8*/
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@ int source_uv_xoffs_q16; /*r9*/
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@ };
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.global ScaleYCbCr42xToRGB565_BilinearY_Row_NEON
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.type ScaleYCbCr42xToRGB565_BilinearY_Row_NEON, %function
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.balign 64
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.fnstart
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ScaleYCbCr42xToRGB565_BilinearY_Row_NEON:
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STMFD r13!,{r4-r9,r14} @ 8 words.
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ADR r14,YCbCr42xToRGB565_DITHER03_CONSTS_NEON
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VPUSH {Q4-Q7} @ 16 words.
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ADD r14,r14,r1, LSL #4 @ Select the dither table to use
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LDMIA r0, {r0-r9}
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@ Set up image index registers.
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ADD r12,r8, r8
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VMOV.I32 D16,#0 @ Q8 = < 2| 2| 0| 0>*source_dx_q16
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VDUP.32 D17,r12
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ADD r12,r12,r12
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VTRN.32 D16,D17 @ Q2 = < 2| 0| 2| 0>*source_dx_q16
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VDUP.32 D19,r12 @ Q9 = < 4| 4| ?| ?>*source_dx_q16
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ADD r12,r12,r12
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VDUP.32 Q0, r7 @ Q0 = < 1| 1| 1| 1>*source_x0_q16
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VADD.I32 D17,D17,D19 @ Q8 = < 6| 4| 2| 0>*source_dx_q16
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CMP r8, #0 @ If source_dx_q16 is negative...
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VDUP.32 Q9, r12 @ Q9 = < 8| 8| 8| 8>*source_dx_q16
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ADDLT r7, r7, r8, LSL #4 @ Make r7 point to the end of the block
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VADD.I32 Q0, Q0, Q8 @ Q0 = < 6| 4| 2| 0>*source_dx_q16+source_x0_q16
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SUBLT r7, r7, r8 @ (i.e., the lowest address we'll use)
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VADD.I32 Q1, Q0, Q9 @ Q1 = <14|12|10| 8>*source_dx_q16+source_x0_q16
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VDUP.I32 Q9, r8 @ Q8 = < 1| 1| 1| 1>*source_dx_q16
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VADD.I32 Q2, Q0, Q9 @ Q2 = < 7| 5| 3| 1>*source_dx_q16+source_x0_q16
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VADD.I32 Q3, Q1, Q9 @ Q3 = <15|13|11| 9>*source_dx_q16+source_x0_q16
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VLD1.64 {D30,D31},[r14,:128] @ Load some constants
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VMOV.I8 D28,#52
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VMOV.I8 D29,#129
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@ The basic idea here is to do aligned loads of a block of data and then
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@ index into it using VTBL to extract the data from the source X
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@ coordinate corresponding to each destination pixel.
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@ This is significantly less code and significantly fewer cycles than doing
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@ a series of single-lane loads, but it means that the X step between
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@ pixels must be limited to 2.0 or less, otherwise we couldn't guarantee
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@ that we could read 8 pixels from a single aligned 32-byte block of data.
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@ Q0...Q3 contain the 16.16 fixed-point X coordinates of each pixel,
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@ separated into even pixels and odd pixels to make extracting offsets and
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@ weights easier.
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@ We then pull out two bytes from the middle of each coordinate: the top
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@ byte corresponds to the integer part of the X coordinate, and the bottom
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@ byte corresponds to the weight to use for bilinear blending.
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@ These are separated out into different registers with VTRN.
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@ Then by subtracting the integer X coordinate of the first pixel in the
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@ data block we loaded, we produce an index register suitable for use by
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@ VTBL.
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s42xbily_neon_loop:
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@ Load the Y' data.
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MOV r12,r7, ASR #16
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VRSHRN.S32 D16,Q0, #8
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AND r12,r12,#~15 @ Read 16-byte aligned blocks
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VDUP.I8 D20,r12
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ADD r12,r1, r12 @ r12 = y_row+(source_x&~7)
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VRSHRN.S32 D17,Q1, #8
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PLD [r12,#64]
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VLD1.64 {D8, D9, D10,D11},[r12,:128],r5 @ Load Y' top row
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ADD r14,r7, r8, LSL #3
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VRSHRN.S32 D18,Q2, #8
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MOV r14,r14,ASR #16
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VRSHRN.S32 D19,Q3, #8
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AND r14,r14,#~15 @ Read 16-byte aligned blocks
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VLD1.64 {D12,D13,D14,D15},[r12,:128] @ Load Y' bottom row
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PLD [r12,#64]
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VDUP.I8 D21,r14
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ADD r14,r1, r14 @ r14 = y_row+(source_x&~7)
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VMOV.I8 Q13,#1
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PLD [r14,#64]
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VTRN.8 Q8, Q9 @ Q8 = <wFwEwDwCwBwAw9w8w7w6w5w4w3w2w1w0>
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@ Q9 = <xFxExDxCxBxAx9x8x7x6x5x4x3x2x1x0>
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VSUB.S8 Q9, Q9, Q10 @ Make offsets relative to the data we loaded.
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@ First 8 Y' pixels
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VTBL.8 D20,{D8, D9, D10,D11},D18 @ Index top row at source_x
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VTBL.8 D24,{D12,D13,D14,D15},D18 @ Index bottom row at source_x
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VADD.S8 Q13,Q9, Q13 @ Add 1 to source_x
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VTBL.8 D22,{D8, D9, D10,D11},D26 @ Index top row at source_x+1
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VTBL.8 D26,{D12,D13,D14,D15},D26 @ Index bottom row at source_x+1
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@ Next 8 Y' pixels
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VLD1.64 {D8, D9, D10,D11},[r14,:128],r5 @ Load Y' top row
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VLD1.64 {D12,D13,D14,D15},[r14,:128] @ Load Y' bottom row
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PLD [r14,#64]
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VTBL.8 D21,{D8, D9, D10,D11},D19 @ Index top row at source_x
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VTBL.8 D25,{D12,D13,D14,D15},D19 @ Index bottom row at source_x
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VTBL.8 D23,{D8, D9, D10,D11},D27 @ Index top row at source_x+1
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VTBL.8 D27,{D12,D13,D14,D15},D27 @ Index bottom row at source_x+1
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@ Blend Y'.
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VDUP.I16 Q9, r4 @ Load the y weights.
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VSUBL.U8 Q4, D24,D20 @ Q5:Q4 = c-a
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VSUBL.U8 Q5, D25,D21
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VSUBL.U8 Q6, D26,D22 @ Q7:Q6 = d-b
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VSUBL.U8 Q7, D27,D23
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VMUL.S16 Q4, Q4, Q9 @ Q5:Q4 = (c-a)*yweight
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VMUL.S16 Q5, Q5, Q9
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VMUL.S16 Q6, Q6, Q9 @ Q7:Q6 = (d-b)*yweight
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VMUL.S16 Q7, Q7, Q9
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VMOVL.U8 Q12,D16 @ Promote the x weights to 16 bits.
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VMOVL.U8 Q13,D17 @ Sadly, there's no VMULW.
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VRSHRN.S16 D8, Q4, #8 @ Q4 = (c-a)*yweight+128>>8
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VRSHRN.S16 D9, Q5, #8
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VRSHRN.S16 D12,Q6, #8 @ Q6 = (d-b)*yweight+128>>8
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VRSHRN.S16 D13,Q7, #8
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VADD.I8 Q10,Q10,Q4 @ Q10 = a+((c-a)*yweight+128>>8)
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VADD.I8 Q11,Q11,Q6 @ Q11 = b+((d-b)*yweight+128>>8)
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VSUBL.U8 Q4, D22,D20 @ Q5:Q4 = b-a
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VSUBL.U8 Q5, D23,D21
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VMUL.S16 Q4, Q4, Q12 @ Q5:Q4 = (b-a)*xweight
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VMUL.S16 Q5, Q5, Q13
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VRSHRN.S16 D8, Q4, #8 @ Q4 = (b-a)*xweight+128>>8
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ADD r12,r7, r9
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VRSHRN.S16 D9, Q5, #8
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MOV r12,r12,ASR #17
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VADD.I8 Q8, Q10,Q4 @ Q8 = a+((b-a)*xweight+128>>8)
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@ Start extracting the chroma x coordinates, and load Cb and Cr.
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AND r12,r12,#~15 @ Read 16-byte aligned blocks
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VDUP.I32 Q9, r9 @ Q9 = source_uv_xoffs_q16 x 4
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ADD r14,r2, r12
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VADD.I32 Q10,Q0, Q9
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VLD1.64 {D8, D9, D10,D11},[r14,:128] @ Load Cb
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PLD [r14,#64]
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VADD.I32 Q11,Q1, Q9
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ADD r14,r3, r12
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VADD.I32 Q12,Q2, Q9
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VLD1.64 {D12,D13,D14,D15},[r14,:128] @ Load Cr
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PLD [r14,#64]
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VADD.I32 Q13,Q3, Q9
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VRSHRN.S32 D20,Q10,#9 @ Q10 = <xEwExCwCxAwAx8w8x6w6x4w4x2w2x0w0>
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VRSHRN.S32 D21,Q11,#9
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VDUP.I8 Q9, r12
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VRSHRN.S32 D22,Q12,#9 @ Q11 = <xFwFxDwDxBwBx9w9x7w7x5w5x3w3x1w1>
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VRSHRN.S32 D23,Q13,#9
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@ We don't actually need the x weights, but we get them for free.
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@ Free ALU slot
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VTRN.8 Q10,Q11 @ Q10 = <wFwEwDwCwBwAw9w8w7w6w5w4w3w2w1w0>
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@ Free ALU slot @ Q11 = <xFxExDxCxBxAx9x8x7x6x5x4x3x2x1x0>
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VSUB.S8 Q11,Q11,Q9 @ Make offsets relative to the data we loaded.
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VTBL.8 D18,{D8, D9, D10,D11},D22 @ Index Cb at source_x
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VMOV.I8 D24,#74
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VTBL.8 D19,{D8, D9, D10,D11},D23
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VMOV.I8 D26,#102
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VTBL.8 D20,{D12,D13,D14,D15},D22 @ Index Cr at source_x
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VMOV.I8 D27,#25
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VTBL.8 D21,{D12,D13,D14,D15},D23
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@ We now have Y' in Q8, Cb in Q9, and Cr in Q10
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@ We use VDUP to expand constants, because it's a permute instruction, so
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@ it can dual issue on the A8.
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SUBS r6, r6, #16 @ width -= 16
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VMULL.U8 Q4, D16,D24 @ Q5:Q4 = Y'*74
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VDUP.32 Q6, D30[1] @ Q7:Q6 = bias_G
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VMULL.U8 Q5, D17,D24
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VDUP.32 Q7, D30[1]
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VMLSL.U8 Q6, D18,D27 @ Q7:Q6 = -25*Cb+bias_G
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VDUP.32 Q11,D30[0] @ Q12:Q11 = bias_R
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VMLSL.U8 Q7, D19,D27
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VDUP.32 Q12,D30[0]
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VMLAL.U8 Q11,D20,D26 @ Q12:Q11 = 102*Cr+bias_R
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VDUP.32 Q8, D31[0] @ Q13:Q8 = bias_B
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VMLAL.U8 Q12,D21,D26
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VDUP.32 Q13,D31[0]
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VMLAL.U8 Q8, D18,D29 @ Q13:Q8 = 129*Cb+bias_B
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VMLAL.U8 Q13,D19,D29
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VMLSL.U8 Q6, D20,D28 @ Q7:Q6 = -25*Cb-52*Cr+bias_G
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VMLSL.U8 Q7, D21,D28
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VADD.S16 Q11,Q4, Q11 @ Q12:Q11 = 74*Y'+102*Cr+bias_R
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VADD.S16 Q12,Q5, Q12
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VQADD.S16 Q8, Q4, Q8 @ Q13:Q8 = 74*Y'+129*Cr+bias_B
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VQADD.S16 Q13,Q5, Q13
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VADD.S16 Q6, Q4, Q6 @ Q7:Q6 = 74*Y'-25*Cb-52*Cr+bias_G
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VADD.S16 Q7, Q5, Q7
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@ Push each value to the top of its word and saturate it.
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VQSHLU.S16 Q11,Q11,#2
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VQSHLU.S16 Q12,Q12,#2
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VQSHLU.S16 Q6, Q6, #2
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VQSHLU.S16 Q7, Q7, #2
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VQSHLU.S16 Q8, Q8, #2
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VQSHLU.S16 Q13,Q13,#2
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@ Merge G and B into R.
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VSRI.U16 Q11,Q6, #5
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VSRI.U16 Q12,Q7, #5
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VSRI.U16 Q11,Q8, #11
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MOV r14,r8, LSL #4
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VSRI.U16 Q12,Q13,#11
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BLT s42xbily_neon_tail
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VDUP.I32 Q13,r14
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@ Store the result.
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VST1.16 {D22,D23,D24,D25},[r0]!
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BEQ s42xbily_neon_done
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@ Advance the x coordinates.
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VADD.I32 Q0, Q0, Q13
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VADD.I32 Q1, Q1, Q13
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ADD r7, r14
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VADD.I32 Q2, Q2, Q13
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VADD.I32 Q3, Q3, Q13
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B s42xbily_neon_loop
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s42xbily_neon_tail:
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@ We have between 1 and 15 pixels left to write.
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@ -r6 == the number of pixels we need to skip writing.
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@ Adjust r0 to point to the last one we need to write, because we're going
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@ to write them in reverse order.
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ADD r0, r0, r6, LSL #1
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MOV r14,#-2
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ADD r0, r0, #30
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@ Skip past the ones we don't need to write.
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SUB PC, PC, r6, LSL #2
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ORR r0, r0, r0
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VST1.16 {D25[3]},[r0,:16],r14
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VST1.16 {D25[2]},[r0,:16],r14
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VST1.16 {D25[1]},[r0,:16],r14
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VST1.16 {D25[0]},[r0,:16],r14
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VST1.16 {D24[3]},[r0,:16],r14
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VST1.16 {D24[2]},[r0,:16],r14
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VST1.16 {D24[1]},[r0,:16],r14
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VST1.16 {D24[0]},[r0,:16],r14
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VST1.16 {D23[3]},[r0,:16],r14
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VST1.16 {D23[2]},[r0,:16],r14
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VST1.16 {D23[1]},[r0,:16],r14
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VST1.16 {D23[0]},[r0,:16],r14
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VST1.16 {D22[3]},[r0,:16],r14
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VST1.16 {D22[2]},[r0,:16],r14
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VST1.16 {D22[1]},[r0,:16],r14
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VST1.16 {D22[0]},[r0,:16]
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s42xbily_neon_done:
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VPOP {Q4-Q7} @ 16 words.
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LDMFD r13!,{r4-r9,PC} @ 8 words.
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.fnend
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.size ScaleYCbCr42xToRGB565_BilinearY_Row_NEON, .-ScaleYCbCr42xToRGB565_BilinearY_Row_NEON
|
2012-05-06 16:41:14 +04:00
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#if defined(__ELF__)&&defined(__linux__)
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|
.section .note.GNU-stack,"",%progbits
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#endif
|
