Bug 456028 - x86_64 Optimization for lcms.r=bholley

modules/lcms/include/lcms.h

@@ -209,7 +209,11 @@ typedef    pthread_rwlock_t      LCMS_RWLOCK_T;
 
 typedef unsigned char BYTE, *LPBYTE; 
 typedef unsigned short WORD, *LPWORD;
+#if defined(__x86_64__)
+typedef unsigned int DWORD, *LPDWORD;
+#else
 typedef unsigned long DWORD, *LPDWORD;
+#endif
 typedef char *LPSTR;
 typedef void *LPVOID;
 

modules/lcms/src/cmsxform.c

@@ -93,8 +93,9 @@ LCMS_INLINE void LCMSCPUID(DWORD fxn, LPDWORD a, LPDWORD b, LPDWORD c, LPDWORD d
 #define HAVE_SSE2_INTRINSICS
 #endif
 
-#if defined(__GNUC__) && defined(__i386__)
+#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
 
+#if defined(__i386__)
 /* Get us a CPUID function. We can't use ebx because it's the PIC register on
    some platforms, so we use ESI instead and save ebx to avoid clobbering it. */
 LCMS_INLINE void LCMSCPUID(DWORD fxn, LPDWORD a, LPDWORD b, LPDWORD c, LPDWORD d) {
@@ -107,6 +108,7 @@ LCMS_INLINE void LCMSCPUID(DWORD fxn, LPDWORD a, LPDWORD b, LPDWORD c, LPDWORD d
 	   *c = c_;
 	   *d = d_;
  }
+#endif
 
 #define HAVE_SSE2_INTRINSICS
 /* XXX - the below wasn't in jpeg/jmorecfg.h - why? */
@@ -157,6 +159,9 @@ static LCMSBOOL SSE2Available() {
 // If we don't have compile-time support, we don't have runtime support
 #ifndef HAVE_SSE2_INTEL_MNEMONICS
               isAvailable = 0;
+#elif defined(__x86_64__)
+              /* x64 always supports SSE2 */
+              isAvailable = 1;
 #else
        /* We have CPUID macros defined if we have sse2 mnemonics. */
               LCMSCPUID(function, &a, &b, &c, &d);
@@ -711,6 +716,9 @@ void MatrixShaperXFORMFloat(_LPcmsTRANSFORM p,
                       : 
                       : "r" (MatPtr), "r" (clampMax), "r" (&floatScale)
                       : "memory"
+#if defined(__x86_64__)
+                        , "%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6", "%xmm7"
+#endif
                       );
 #else
                 ASM {