зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1626967: bump Cranelift to 6a68130d5b0296379fae0b8de5fbb8a1499b67a5; r=jseward
Differential Revision: https://phabricator.services.mozilla.com/D69977 --HG-- extra : moz-landing-system : lando
This commit is contained in:
Benjamin Bouvier
Родитель
4e20170db6
Коммит
0c19028f8f
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@ -55,7 +55,7 @@ rev = "72f813a03cefbdf8e2c58c7410f3556c79429a06"
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[source."https://github.com/bytecodealliance/wasmtime"]
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git = "https://github.com/bytecodealliance/wasmtime"
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replace-with = "vendored-sources"
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rev = "5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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rev = "6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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[source."https://github.com/badboy/failure"]
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git = "https://github.com/badboy/failure"
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@ -715,22 +715,22 @@ dependencies = [
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[[package]]
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name = "cranelift-bforest"
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version = "0.60.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c#5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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version = "0.62.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=6a68130d5b0296379fae0b8de5fbb8a1499b67a5#6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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dependencies = [
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"cranelift-entity 0.60.0",
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"cranelift-entity 0.62.0",
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]
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[[package]]
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name = "cranelift-codegen"
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version = "0.60.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c#5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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version = "0.62.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=6a68130d5b0296379fae0b8de5fbb8a1499b67a5#6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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dependencies = [
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"byteorder",
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"cranelift-bforest",
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"cranelift-codegen-meta",
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"cranelift-codegen-shared",
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"cranelift-entity 0.60.0",
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"cranelift-entity 0.62.0",
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"log",
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"smallvec 1.2.0",
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"target-lexicon 0.10.0",
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@ -739,17 +739,17 @@ dependencies = [
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[[package]]
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name = "cranelift-codegen-meta"
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version = "0.60.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c#5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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version = "0.62.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=6a68130d5b0296379fae0b8de5fbb8a1499b67a5#6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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dependencies = [
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"cranelift-codegen-shared",
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"cranelift-entity 0.60.0",
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"cranelift-entity 0.62.0",
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]
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[[package]]
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name = "cranelift-codegen-shared"
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version = "0.60.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c#5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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version = "0.62.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=6a68130d5b0296379fae0b8de5fbb8a1499b67a5#6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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[[package]]
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name = "cranelift-entity"
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@ -758,13 +758,13 @@ source = "git+https://github.com/PLSysSec/lucet_sandbox_compiler?rev=5e870faf6f9
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[[package]]
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name = "cranelift-entity"
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version = "0.60.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c#5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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version = "0.62.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=6a68130d5b0296379fae0b8de5fbb8a1499b67a5#6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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[[package]]
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name = "cranelift-frontend"
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version = "0.60.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c#5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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version = "0.62.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=6a68130d5b0296379fae0b8de5fbb8a1499b67a5#6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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dependencies = [
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"cranelift-codegen",
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"log",
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@ -774,11 +774,11 @@ dependencies = [
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[[package]]
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name = "cranelift-wasm"
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version = "0.60.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c#5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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version = "0.62.0"
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source = "git+https://github.com/bytecodealliance/wasmtime?rev=6a68130d5b0296379fae0b8de5fbb8a1499b67a5#6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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dependencies = [
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"cranelift-codegen",
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"cranelift-entity 0.60.0",
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"cranelift-entity 0.62.0",
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"cranelift-frontend",
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"log",
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"thiserror",
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@ -76,8 +76,8 @@ failure_derive = { git = "https://github.com/badboy/failure", rev = "64af847bc5f
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[patch.crates-io.cranelift-codegen]
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git = "https://github.com/bytecodealliance/wasmtime"
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rev = "5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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rev = "6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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[patch.crates-io.cranelift-wasm]
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git = "https://github.com/bytecodealliance/wasmtime"
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rev = "5cfcbeb59d477e028c6fb312f1cf63aa711fcc3c"
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rev = "6a68130d5b0296379fae0b8de5fbb8a1499b67a5"
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@ -13,8 +13,8 @@ name = "baldrdash"
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# cranelift-wasm to pinned commits. If you want to update Cranelift in Gecko,
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# you should update the following $TOP_LEVEL/Cargo.toml file: look for the
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# revision (rev) hashes of both cranelift dependencies (codegen and wasm).
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cranelift-codegen = { version = "0.60.0", default-features = false }
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cranelift-wasm = "0.60.0"
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cranelift-codegen = { version = "0.62.0", default-features = false }
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cranelift-wasm = "0.62.0"
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log = { version = "0.4.6", default-features = false, features = ["release_max_level_info"] }
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env_logger = "0.6"
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smallvec = "1.0"
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@ -1 +1 @@
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{"files":{"Cargo.toml":"0590650ee92ca1c67e40e0c18f6861f588bac5240e96049af89a290d28b6c774","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"af367c67340fa7f6fb9a35b0aa637dcf303957f7ae7427a5f4f6356801c8bb04","src/lib.rs":"23a5c42d477197a947122e662068e681bb9ed31041c0b668c3267c3fce15d39e","src/map.rs":"a3b7f64cae7ec9c2a8038def315bcf90e8751552b1bc1c20b62fbb8c763866c4","src/node.rs":"28f7edd979f7b9712bc4ab30b0d2a1b8ad5485a4b1e8c09f3dcaf501b9b5ccd1","src/path.rs":"a86ee1c882c173e8af96fd53a416a0fb485dd3f045ac590ef313a9d9ecf90f56","src/pool.rs":"f6337b5417f7772e6878a160c1a40629199ff09997bdff18eb2a0ba770158600","src/set.rs":"281eb8b5ead1ffd395946464d881f9bb0e7fb61092aed701d72d2314b5f80994"},"package":null}
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{"files":{"Cargo.toml":"2826e4035b7d2cffaeb4b093fc3e33475fdd80c2cfae57cbdf1513918808477b","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"af367c67340fa7f6fb9a35b0aa637dcf303957f7ae7427a5f4f6356801c8bb04","src/lib.rs":"23a5c42d477197a947122e662068e681bb9ed31041c0b668c3267c3fce15d39e","src/map.rs":"a3b7f64cae7ec9c2a8038def315bcf90e8751552b1bc1c20b62fbb8c763866c4","src/node.rs":"28f7edd979f7b9712bc4ab30b0d2a1b8ad5485a4b1e8c09f3dcaf501b9b5ccd1","src/path.rs":"a86ee1c882c173e8af96fd53a416a0fb485dd3f045ac590ef313a9d9ecf90f56","src/pool.rs":"f6337b5417f7772e6878a160c1a40629199ff09997bdff18eb2a0ba770158600","src/set.rs":"281eb8b5ead1ffd395946464d881f9bb0e7fb61092aed701d72d2314b5f80994"},"package":null}
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@ -1,7 +1,7 @@
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[package]
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authors = ["The Cranelift Project Developers"]
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name = "cranelift-bforest"
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version = "0.60.0"
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version = "0.62.0"
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description = "A forest of B+-trees"
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license = "Apache-2.0 WITH LLVM-exception"
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documentation = "https://docs.rs/cranelift-bforest"
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@ -12,7 +12,7 @@ keywords = ["btree", "forest", "set", "map"]
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edition = "2018"
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[dependencies]
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cranelift-entity = { path = "../entity", version = "0.60.0", default-features = false }
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cranelift-entity = { path = "../entity", version = "0.62.0", default-features = false }
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[badges]
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maintenance = { status = "experimental" }
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@ -1 +1 @@
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{"files":{"Cargo.toml":"f4c0e8f821dc23fac1e439ff0505fbfb4dd02cf631b629f1d5552b2a9f6dd3a4","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"b123f056d0d458396679c5f7f2a16d2762af0258fcda4ac14b6655a95e5a0022","src/cdsl/ast.rs":"84a4b7e3301e3249716958a7aa4ea5ba8c6172e3c02f57ee3880504c4433ff19","src/cdsl/cpu_modes.rs":"996e45b374cfe85ac47c8c86c4459fe4c04b3158102b4c63b6ee434d5eed6a9e","src/cdsl/encodings.rs":"d884a564815a03c23369bcf31d13b122ae5ba84d0c80eda9312f0c0a829bf794","src/cdsl/formats.rs":"63e638305aa3ca6dd409ddf0e5e9605eeac1cc2631103e42fc6cbc87703d9b63","src/cdsl/instructions.rs":"41e1a230501de3f0da3960d8aa375c8bcd60ec62ede94ad61806816acbd8009a","src/cdsl/isa.rs":"ccabd6848b69eb069c10db61c7e7f86080777495714bb53d03e663c40541be94","src/cdsl/mod.rs":"0aa827923bf4c45e5ee2359573bd863e00f474acd532739f49dcd74a27553882","src/cdsl/operands.rs":"1c3411504de9c83112ff48e0ff1cfbb2e4ba5a9a15c1716f411ef31a4df59899","src/cdsl/recipes.rs":"80b7cd87332229b569e38086ceee8d557e679b9a32ad2e50bdb15c33337c3418","src/cdsl/regs.rs":"466a42a43355fc7623fe5d8e8d330622207a3af6a80cb9367bc0f06e224c9ee0","src/cdsl/settings.rs":"e6fd9a31925743b93b11f09c9c8271bab6aa2430aa053a2601957b4487df7d77","src/cdsl/type_inference.rs":"1efca8a095ffc899b7527bda6b9d9378c73d7283f8dceaa4819e8af599f8be21","src/cdsl/types.rs":"ff764c9e9c29a05677bff6164e7bc25a0c32655052d77ae580536abba8b1713b","src/cdsl/typevar.rs":"c7e80a3c52755f2d91fb5c3d18413b7c97777bd54d1aece8a17d1bbd9944c46a","src/cdsl/xform.rs":"55da0c3f2403147b535ab6ae5d69c623fbe839edecf2a3af1de84420cd58402d","src/default_map.rs":"101bb0282a124f9c921f6bd095f529e8753621450d783c3273b0b0394c2c5c03","src/error.rs":"e9b11b2feb2d867b94c8810fdc5a6c4e0d9131604a0bfa5340ff2639a55100b4","src/gen_binemit.rs":"515e243420b30d1e01f8ea630282d9b6d78a715e1951f3f20392e19a48164442","src/gen_encodings.rs":"f00cded6b68a9b48c9e3cd39a8b6f0ba136f4062c8f8666109158a72c62c3ed1","src/gen_inst.rs":"b275053977c0239211c1df35253154ba4dce2519f506088e71104de37d3db862","src/gen_legalizer.rs":"ea229ab9393cc5ba2242f626e74c624ea59314535e74b26602dafb8e96481a72","src/gen_registers.rs":"a904119ed803c9de24dedd15149a65337ffc168bb1d63df53d7fdebfb5f4b158","src/gen_settings.rs":"f3cc3d31f6cc898f30606caf084f0de220db2d3b1b5e5e4145fa7c9a9a1597e2","src/gen_types.rs":"f6c090e1646a43bf2fe81ae0a7029cc6f7dc6d43285368f56d86c35a21c469a6","src/isa/arm32/mod.rs":"8e09ec1b3caf2d22dce8517b37c356047bfce9a6dea712467d867ed05c4bedaf","src/isa/arm64/mod.rs":"b01f030925d3f2af37d7df1b4a800eb7f0d24f74a46e9154fd8b6752643eb2d5","src/isa/mod.rs":"136141f99f217ba42b9e3f7f47238ab19cc974bb3bef2e2df7f7b5a683989d46","src/isa/riscv/encodings.rs":"8abb1968d917588bc5fc5f5be6dd66bdec23ac456ba65f8138237c8e891e843c","src/isa/riscv/mod.rs":"a7b461a30bbfbc1e3b33645422ff40d5b1761c30cb5d4a8aa12e9a3b7f7aee51","src/isa/riscv/recipes.rs":"c9424cffed54cc4d328879a4613b9f6a2c2b7cde7e6e17b4fccd5f661aaf92f2","src/isa/x86/encodings.rs":"cbf3e7834c7d29de8f3faa4c70dad23167ae22d02fba5d7d518779b34535393d","src/isa/x86/instructions.rs":"3c1482583b031d2663b31ee8784f0cb61c8abef995afc7c8f8a6e7be010a2ba8","src/isa/x86/legalize.rs":"5b654c2410ab384cfb20815f1114af76a7967472a45b8d60232ddce9d9921682","src/isa/x86/mod.rs":"65953f998ff3fc3b333167e9979fc0f15f976b51ad75272ac19dcaad0981b371","src/isa/x86/opcodes.rs":"ddebd2f5a14d9d7e37be0a6dc7467d098a2df554ac1deb41c97e5d16273ed353","src/isa/x86/recipes.rs":"a90c48625cc0c60ae67436e333d330967d4ac67498685c62601b47c94c721e8d","src/isa/x86/registers.rs":"4be0a45d8acd465c31746b7976124025b06b453e3f6d587f93efb5af0e12b1a8","src/isa/x86/settings.rs":"49abb46533b3a5415cd033e0a98b5c9561e231f2dd9510d587dc69b204bb6706","src/lib.rs":"2491b0e74078914cb89d1778fa8174daf723fe76aaf7fed18741237d68f6df32","src/shared/entities.rs":"90f774a70e1c2a2e9a553c07a5e80e0fe54cf127434bd83e67274bba4e1a19ba","src/shared/formats.rs":"89ed4074f748637adf56b93ba952e398c45d43e6326d01676885939e3fe8bc4a","src/shared/immediates.rs":"e4a57657f6af9853794804eb41c01204a2c13a632f44f55d90e156a4b98c5f65","src/shared/instructions.rs":"4528650c9b26bd687458d407f46f3c6531cd6f31249024c94e4bf0b4205d7137","src/shared/legalize.rs":"bc9c3292446c1d338df1c4ce19f3ac5482cfe582a04a5a1e82fc9aaa6aef25ea","src/shared/mod.rs":"c219625990bf15507ac1077b349ce20e5312d4e4707426183676d469e78792b7","src/shared/settings.rs":"2e791624b4e85f9e8adcee7169fe445ca8bcdc97d1da92c92ae9576988ab0470","src/shared/types.rs":"4702df132f4b5d70cc9411ec5221ba0b1bd4479252274e0223ae57b6d0331247","src/srcgen.rs":"dcfc159c8599270f17e6a978c4be255abca51556b5ef0da497faec4a4a1e62ce","src/unique_table.rs":"31aa54330ca4786af772d32e8cb6158b6504b88fa93fe177bf0c6cbe545a8d35"},"package":null}
|
||||
{"files":{"Cargo.toml":"f5c824a81cf3c40bded1bfcc325c15e6109724c3efbbc822d4c5782dbefe9f12","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"b123f056d0d458396679c5f7f2a16d2762af0258fcda4ac14b6655a95e5a0022","src/cdsl/ast.rs":"84a4b7e3301e3249716958a7aa4ea5ba8c6172e3c02f57ee3880504c4433ff19","src/cdsl/cpu_modes.rs":"996e45b374cfe85ac47c8c86c4459fe4c04b3158102b4c63b6ee434d5eed6a9e","src/cdsl/encodings.rs":"d884a564815a03c23369bcf31d13b122ae5ba84d0c80eda9312f0c0a829bf794","src/cdsl/formats.rs":"63e638305aa3ca6dd409ddf0e5e9605eeac1cc2631103e42fc6cbc87703d9b63","src/cdsl/instructions.rs":"41e1a230501de3f0da3960d8aa375c8bcd60ec62ede94ad61806816acbd8009a","src/cdsl/isa.rs":"ccabd6848b69eb069c10db61c7e7f86080777495714bb53d03e663c40541be94","src/cdsl/mod.rs":"0aa827923bf4c45e5ee2359573bd863e00f474acd532739f49dcd74a27553882","src/cdsl/operands.rs":"1c3411504de9c83112ff48e0ff1cfbb2e4ba5a9a15c1716f411ef31a4df59899","src/cdsl/recipes.rs":"80b7cd87332229b569e38086ceee8d557e679b9a32ad2e50bdb15c33337c3418","src/cdsl/regs.rs":"466a42a43355fc7623fe5d8e8d330622207a3af6a80cb9367bc0f06e224c9ee0","src/cdsl/settings.rs":"e6fd9a31925743b93b11f09c9c8271bab6aa2430aa053a2601957b4487df7d77","src/cdsl/type_inference.rs":"1efca8a095ffc899b7527bda6b9d9378c73d7283f8dceaa4819e8af599f8be21","src/cdsl/types.rs":"ff764c9e9c29a05677bff6164e7bc25a0c32655052d77ae580536abba8b1713b","src/cdsl/typevar.rs":"c7e80a3c52755f2d91fb5c3d18413b7c97777bd54d1aece8a17d1bbd9944c46a","src/cdsl/xform.rs":"55da0c3f2403147b535ab6ae5d69c623fbe839edecf2a3af1de84420cd58402d","src/default_map.rs":"101bb0282a124f9c921f6bd095f529e8753621450d783c3273b0b0394c2c5c03","src/error.rs":"e9b11b2feb2d867b94c8810fdc5a6c4e0d9131604a0bfa5340ff2639a55100b4","src/gen_binemit.rs":"515e243420b30d1e01f8ea630282d9b6d78a715e1951f3f20392e19a48164442","src/gen_encodings.rs":"f00cded6b68a9b48c9e3cd39a8b6f0ba136f4062c8f8666109158a72c62c3ed1","src/gen_inst.rs":"b275053977c0239211c1df35253154ba4dce2519f506088e71104de37d3db862","src/gen_legalizer.rs":"ea229ab9393cc5ba2242f626e74c624ea59314535e74b26602dafb8e96481a72","src/gen_registers.rs":"a904119ed803c9de24dedd15149a65337ffc168bb1d63df53d7fdebfb5f4b158","src/gen_settings.rs":"f3cc3d31f6cc898f30606caf084f0de220db2d3b1b5e5e4145fa7c9a9a1597e2","src/gen_types.rs":"f6c090e1646a43bf2fe81ae0a7029cc6f7dc6d43285368f56d86c35a21c469a6","src/isa/arm32/mod.rs":"8e09ec1b3caf2d22dce8517b37c356047bfce9a6dea712467d867ed05c4bedaf","src/isa/arm64/mod.rs":"b01f030925d3f2af37d7df1b4a800eb7f0d24f74a46e9154fd8b6752643eb2d5","src/isa/mod.rs":"136141f99f217ba42b9e3f7f47238ab19cc974bb3bef2e2df7f7b5a683989d46","src/isa/riscv/encodings.rs":"8abb1968d917588bc5fc5f5be6dd66bdec23ac456ba65f8138237c8e891e843c","src/isa/riscv/mod.rs":"a7b461a30bbfbc1e3b33645422ff40d5b1761c30cb5d4a8aa12e9a3b7f7aee51","src/isa/riscv/recipes.rs":"fd5a7418fa0d47cdf1b823b31553f1549c03e160ffffac9e22d611185774367e","src/isa/x86/encodings.rs":"3ebb8e638df80db4deb554bf79f4d74f1bb581b55daa631f3cb419f0fa29b7f5","src/isa/x86/instructions.rs":"3c1482583b031d2663b31ee8784f0cb61c8abef995afc7c8f8a6e7be010a2ba8","src/isa/x86/legalize.rs":"5b654c2410ab384cfb20815f1114af76a7967472a45b8d60232ddce9d9921682","src/isa/x86/mod.rs":"65953f998ff3fc3b333167e9979fc0f15f976b51ad75272ac19dcaad0981b371","src/isa/x86/opcodes.rs":"b54d7cd8590ef8cd866b169d50c291fa8b33d4de7c69bcb237e1c879873d08e0","src/isa/x86/recipes.rs":"2621264954661fd474024fc6a8f01aed9cc800aaab8273aede3bd36657851c40","src/isa/x86/registers.rs":"4be0a45d8acd465c31746b7976124025b06b453e3f6d587f93efb5af0e12b1a8","src/isa/x86/settings.rs":"49abb46533b3a5415cd033e0a98b5c9561e231f2dd9510d587dc69b204bb6706","src/lib.rs":"2491b0e74078914cb89d1778fa8174daf723fe76aaf7fed18741237d68f6df32","src/shared/entities.rs":"90f774a70e1c2a2e9a553c07a5e80e0fe54cf127434bd83e67274bba4e1a19ba","src/shared/formats.rs":"89ed4074f748637adf56b93ba952e398c45d43e6326d01676885939e3fe8bc4a","src/shared/immediates.rs":"e4a57657f6af9853794804eb41c01204a2c13a632f44f55d90e156a4b98c5f65","src/shared/instructions.rs":"f2b15219f21087dbe30198d40dc426decbe64decadd7efd9bf9f5e26272c72ef","src/shared/legalize.rs":"bc9c3292446c1d338df1c4ce19f3ac5482cfe582a04a5a1e82fc9aaa6aef25ea","src/shared/mod.rs":"c219625990bf15507ac1077b349ce20e5312d4e4707426183676d469e78792b7","src/shared/settings.rs":"2e791624b4e85f9e8adcee7169fe445ca8bcdc97d1da92c92ae9576988ab0470","src/shared/types.rs":"4702df132f4b5d70cc9411ec5221ba0b1bd4479252274e0223ae57b6d0331247","src/srcgen.rs":"dcfc159c8599270f17e6a978c4be255abca51556b5ef0da497faec4a4a1e62ce","src/unique_table.rs":"31aa54330ca4786af772d32e8cb6158b6504b88fa93fe177bf0c6cbe545a8d35"},"package":null}
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
[package]
|
||||
name = "cranelift-codegen-meta"
|
||||
authors = ["The Cranelift Project Developers"]
|
||||
version = "0.60.0"
|
||||
version = "0.62.0"
|
||||
description = "Metaprogram for cranelift-codegen code generator library"
|
||||
license = "Apache-2.0 WITH LLVM-exception"
|
||||
repository = "https://github.com/bytecodealliance/wasmtime"
|
||||
|
|
@ -9,8 +9,8 @@ readme = "README.md"
|
|||
edition = "2018"
|
||||
|
||||
[dependencies]
|
||||
cranelift-codegen-shared = { path = "../shared", version = "0.60.0" }
|
||||
cranelift-entity = { path = "../../entity", version = "0.60.0" }
|
||||
cranelift-codegen-shared = { path = "../shared", version = "0.62.0" }
|
||||
cranelift-entity = { path = "../../entity", version = "0.62.0" }
|
||||
|
||||
[badges]
|
||||
maintenance = { status = "experimental" }
|
||||
|
|
|
|||
|
|
@ -205,7 +205,8 @@ pub(crate) fn define(shared_defs: &SharedDefinitions, regs: &IsaRegs) -> RecipeG
|
|||
|
||||
recipes.push(EncodingRecipeBuilder::new("UJcall", &formats.call, 4).emit(
|
||||
r#"
|
||||
sink.reloc_external(Reloc::RiscvCall,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::RiscvCall,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
0);
|
||||
// rd=%x1 is the standard link register.
|
||||
|
|
|
|||
|
|
@ -156,7 +156,7 @@ impl PerCpuModeEncodings {
|
|||
self.enc64(inst.bind(I32), template.infer_rex());
|
||||
|
||||
// I64 on x86_64: REX.W set; REX.RXB determined at runtime from registers.
|
||||
self.enc64(inst.bind(I64), template.infer_rex().w());
|
||||
self.enc64(inst.bind(I64), template.rex().w());
|
||||
}
|
||||
|
||||
/// Adds I32/I64 encodings as appropriate for a typed instruction.
|
||||
|
|
@ -192,7 +192,7 @@ impl PerCpuModeEncodings {
|
|||
self.enc64(inst.bind(B32), template.infer_rex());
|
||||
|
||||
// B64 on x86_64: REX.W set; REX.RXB determined at runtime from registers.
|
||||
self.enc64(inst.bind(B64), template.infer_rex().w());
|
||||
self.enc64(inst.bind(B64), template.rex().w());
|
||||
}
|
||||
|
||||
/// Add encodings for `inst.i32` to X86_32.
|
||||
|
|
@ -313,10 +313,10 @@ impl PerCpuModeEncodings {
|
|||
}
|
||||
|
||||
/// Add two encodings for `inst`:
|
||||
/// - X86_32, dynamically infer the REX prefix.
|
||||
/// - X86_32, no REX prefix, since this is not valid in 32-bit mode.
|
||||
/// - X86_64, dynamically infer the REX prefix.
|
||||
fn enc_both_inferred(&mut self, inst: impl Clone + Into<InstSpec>, template: Template) {
|
||||
self.enc32(inst.clone(), template.infer_rex());
|
||||
self.enc32(inst.clone(), template.clone());
|
||||
self.enc64(inst, template.infer_rex());
|
||||
}
|
||||
fn enc_both_inferred_maybe_isap(
|
||||
|
|
@ -325,7 +325,7 @@ impl PerCpuModeEncodings {
|
|||
template: Template,
|
||||
isap: Option<SettingPredicateNumber>,
|
||||
) {
|
||||
self.enc32_maybe_isap(inst.clone(), template.infer_rex(), isap);
|
||||
self.enc32_maybe_isap(inst.clone(), template.clone(), isap);
|
||||
self.enc64_maybe_isap(inst, template.infer_rex(), isap);
|
||||
}
|
||||
|
||||
|
|
@ -1600,6 +1600,9 @@ fn define_simd(
|
|||
let regspill = shared.by_name("regspill");
|
||||
let sadd_sat = shared.by_name("sadd_sat");
|
||||
let scalar_to_vector = shared.by_name("scalar_to_vector");
|
||||
let sload8x8 = shared.by_name("sload8x8");
|
||||
let sload16x4 = shared.by_name("sload16x4");
|
||||
let sload32x2 = shared.by_name("sload32x2");
|
||||
let spill = shared.by_name("spill");
|
||||
let sqrt = shared.by_name("sqrt");
|
||||
let sshr_imm = shared.by_name("sshr_imm");
|
||||
|
|
@ -1607,6 +1610,9 @@ fn define_simd(
|
|||
let store = shared.by_name("store");
|
||||
let store_complex = shared.by_name("store_complex");
|
||||
let uadd_sat = shared.by_name("uadd_sat");
|
||||
let uload8x8 = shared.by_name("uload8x8");
|
||||
let uload16x4 = shared.by_name("uload16x4");
|
||||
let uload32x2 = shared.by_name("uload32x2");
|
||||
let ushr_imm = shared.by_name("ushr_imm");
|
||||
let usub_sat = shared.by_name("usub_sat");
|
||||
let vconst = shared.by_name("vconst");
|
||||
|
|
@ -1860,8 +1866,8 @@ fn define_simd(
|
|||
// Store
|
||||
let bound_store = store.bind(vector(ty, sse_vector_size)).bind(Any);
|
||||
e.enc_both_inferred(bound_store.clone(), rec_fst.opcodes(&MOVUPS_STORE));
|
||||
e.enc_both(bound_store.clone(), rec_fstDisp8.opcodes(&MOVUPS_STORE));
|
||||
e.enc_both(bound_store, rec_fstDisp32.opcodes(&MOVUPS_STORE));
|
||||
e.enc_both_inferred(bound_store.clone(), rec_fstDisp8.opcodes(&MOVUPS_STORE));
|
||||
e.enc_both_inferred(bound_store, rec_fstDisp32.opcodes(&MOVUPS_STORE));
|
||||
|
||||
// Store complex
|
||||
let bound_store_complex = store_complex.bind(vector(ty, sse_vector_size));
|
||||
|
|
@ -1881,8 +1887,8 @@ fn define_simd(
|
|||
// Load
|
||||
let bound_load = load.bind(vector(ty, sse_vector_size)).bind(Any);
|
||||
e.enc_both_inferred(bound_load.clone(), rec_fld.opcodes(&MOVUPS_LOAD));
|
||||
e.enc_both(bound_load.clone(), rec_fldDisp8.opcodes(&MOVUPS_LOAD));
|
||||
e.enc_both(bound_load, rec_fldDisp32.opcodes(&MOVUPS_LOAD));
|
||||
e.enc_both_inferred(bound_load.clone(), rec_fldDisp8.opcodes(&MOVUPS_LOAD));
|
||||
e.enc_both_inferred(bound_load, rec_fldDisp32.opcodes(&MOVUPS_LOAD));
|
||||
|
||||
// Load complex
|
||||
let bound_load_complex = load_complex.bind(vector(ty, sse_vector_size));
|
||||
|
|
@ -1926,6 +1932,24 @@ fn define_simd(
|
|||
e.enc_32_64_rec(bound_copy_nop, rec_stacknull, 0);
|
||||
}
|
||||
|
||||
// SIMD load extend
|
||||
for (inst, opcodes) in &[
|
||||
(uload8x8, &PMOVZXBW),
|
||||
(uload16x4, &PMOVZXWD),
|
||||
(uload32x2, &PMOVZXDQ),
|
||||
(sload8x8, &PMOVSXBW),
|
||||
(sload16x4, &PMOVSXWD),
|
||||
(sload32x2, &PMOVSXDQ),
|
||||
] {
|
||||
let isap = Some(use_sse41_simd);
|
||||
for recipe in &[rec_fld, rec_fldDisp8, rec_fldDisp32] {
|
||||
let inst = *inst;
|
||||
let template = recipe.opcodes(*opcodes);
|
||||
e.enc_both_inferred_maybe_isap(inst.clone().bind(I32), template.clone(), isap);
|
||||
e.enc64_maybe_isap(inst.bind(I64), template.infer_rex(), isap);
|
||||
}
|
||||
}
|
||||
|
||||
// SIMD integer addition
|
||||
for (ty, opcodes) in &[(I8, &PADDB), (I16, &PADDW), (I32, &PADDD), (I64, &PADDQ)] {
|
||||
let iadd = iadd.bind(vector(*ty, sse_vector_size));
|
||||
|
|
|
|||
|
|
@ -417,6 +417,30 @@ pub static PMINUD: [u8; 4] = [0x66, 0x0f, 0x38, 0x3b];
|
|||
/// xmm1 (SSE4.1).
|
||||
pub static PMINUW: [u8; 4] = [0x66, 0x0f, 0x38, 0x3a];
|
||||
|
||||
/// Sign extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit
|
||||
/// integers in xmm1 (SSE4.1).
|
||||
pub static PMOVSXBW: [u8; 4] = [0x66, 0x0f, 0x38, 0x20];
|
||||
|
||||
/// Sign extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit
|
||||
/// integers in xmm1 (SSE4.1).
|
||||
pub static PMOVSXWD: [u8; 4] = [0x66, 0x0f, 0x38, 0x23];
|
||||
|
||||
/// Sign extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit
|
||||
/// integers in xmm1.
|
||||
pub static PMOVSXDQ: [u8; 4] = [0x66, 0x0f, 0x38, 0x25];
|
||||
|
||||
/// Zero extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit
|
||||
/// integers in xmm1 (SSE4.1).
|
||||
pub static PMOVZXBW: [u8; 4] = [0x66, 0x0f, 0x38, 0x30];
|
||||
|
||||
/// Zero extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit
|
||||
/// integers in xmm1 (SSE4.1).
|
||||
pub static PMOVZXWD: [u8; 4] = [0x66, 0x0f, 0x38, 0x33];
|
||||
|
||||
/// Zero extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit
|
||||
/// integers in xmm1.
|
||||
pub static PMOVZXDQ: [u8; 4] = [0x66, 0x0f, 0x38, 0x35];
|
||||
|
||||
/// Multiply the packed signed word integers in xmm1 and xmm2/m128, and store the low 16 bits of
|
||||
/// the results in xmm1 (SSE2).
|
||||
pub static PMULLW: [u8; 3] = [0x66, 0x0f, 0xd5];
|
||||
|
|
|
|||
|
|
@ -335,6 +335,7 @@ impl<'builder> Template<'builder> {
|
|||
("Rex".to_string() + opcode, self.op_bytes.len() as u64 + 1)
|
||||
}
|
||||
RecipePrefixKind::InferRex => {
|
||||
assert_eq!(self.w_bit, 0, "A REX.W bit always requires a REX prefix; avoid using `infer_rex().w()` and use `rex().w()` instead.");
|
||||
// Hook up the right function for inferred compute_size().
|
||||
assert!(
|
||||
self.inferred_rex_compute_size.is_some(),
|
||||
|
|
@ -1008,7 +1009,7 @@ pub(crate) fn define<'shared>(
|
|||
))
|
||||
.emit(
|
||||
r#"
|
||||
{{PUT_OP}}(bits, rex2(in_reg0, out_reg0), sink);
|
||||
{{PUT_OP}}(bits, rex2(out_reg0, in_reg0), sink);
|
||||
modrm_rr(out_reg0, in_reg0, sink); // note the flipped register in the ModR/M byte
|
||||
let imm:i64 = lane.into();
|
||||
sink.put1(imm as u8);
|
||||
|
|
@ -1257,7 +1258,8 @@ pub(crate) fn define<'shared>(
|
|||
.emit(
|
||||
r#"
|
||||
{{PUT_OP}}(bits | (out_reg0 & 7), rex1(out_reg0), sink);
|
||||
sink.reloc_external(Reloc::Abs4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::Abs4,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
0);
|
||||
sink.put4(0);
|
||||
|
|
@ -1272,7 +1274,8 @@ pub(crate) fn define<'shared>(
|
|||
.emit(
|
||||
r#"
|
||||
{{PUT_OP}}(bits | (out_reg0 & 7), rex1(out_reg0), sink);
|
||||
sink.reloc_external(Reloc::Abs8,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::Abs8,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
0);
|
||||
sink.put8(0);
|
||||
|
|
@ -1287,7 +1290,8 @@ pub(crate) fn define<'shared>(
|
|||
.emit(
|
||||
r#"
|
||||
{{PUT_OP}}(bits | (out_reg0 & 7), rex1(out_reg0), sink);
|
||||
sink.reloc_external(Reloc::Abs4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::Abs4,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
0);
|
||||
// Write the immediate as `!0` for the benefit of BaldrMonkey.
|
||||
|
|
@ -1303,7 +1307,8 @@ pub(crate) fn define<'shared>(
|
|||
.emit(
|
||||
r#"
|
||||
{{PUT_OP}}(bits | (out_reg0 & 7), rex1(out_reg0), sink);
|
||||
sink.reloc_external(Reloc::Abs8,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::Abs8,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
0);
|
||||
// Write the immediate as `!0` for the benefit of BaldrMonkey.
|
||||
|
|
@ -1323,7 +1328,8 @@ pub(crate) fn define<'shared>(
|
|||
modrm_riprel(out_reg0, sink);
|
||||
// The addend adjusts for the difference between the end of the
|
||||
// instruction and the beginning of the immediate field.
|
||||
sink.reloc_external(Reloc::X86PCRel4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::X86PCRel4,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
-4);
|
||||
sink.put4(0);
|
||||
|
|
@ -1342,7 +1348,8 @@ pub(crate) fn define<'shared>(
|
|||
modrm_riprel(out_reg0, sink);
|
||||
// The addend adjusts for the difference between the end of the
|
||||
// instruction and the beginning of the immediate field.
|
||||
sink.reloc_external(Reloc::X86GOTPCRel4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::X86GOTPCRel4,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
-4);
|
||||
sink.put4(0);
|
||||
|
|
@ -1357,7 +1364,8 @@ pub(crate) fn define<'shared>(
|
|||
.emit(
|
||||
r#"
|
||||
{{PUT_OP}}(bits | (out_reg0 & 7), rex1(out_reg0), sink);
|
||||
sink.reloc_external(Reloc::Abs4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::Abs4,
|
||||
&func.global_values[global_value].symbol_name(),
|
||||
0);
|
||||
sink.put4(0);
|
||||
|
|
@ -1372,7 +1380,8 @@ pub(crate) fn define<'shared>(
|
|||
.emit(
|
||||
r#"
|
||||
{{PUT_OP}}(bits | (out_reg0 & 7), rex1(out_reg0), sink);
|
||||
sink.reloc_external(Reloc::Abs8,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::Abs8,
|
||||
&func.global_values[global_value].symbol_name(),
|
||||
0);
|
||||
sink.put8(0);
|
||||
|
|
@ -1390,7 +1399,8 @@ pub(crate) fn define<'shared>(
|
|||
modrm_rm(5, out_reg0, sink);
|
||||
// The addend adjusts for the difference between the end of the
|
||||
// instruction and the beginning of the immediate field.
|
||||
sink.reloc_external(Reloc::X86PCRel4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::X86PCRel4,
|
||||
&func.global_values[global_value].symbol_name(),
|
||||
-4);
|
||||
sink.put4(0);
|
||||
|
|
@ -1408,7 +1418,8 @@ pub(crate) fn define<'shared>(
|
|||
modrm_rm(5, out_reg0, sink);
|
||||
// The addend adjusts for the difference between the end of the
|
||||
// instruction and the beginning of the immediate field.
|
||||
sink.reloc_external(Reloc::X86GOTPCRel4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::X86GOTPCRel4,
|
||||
&func.global_values[global_value].symbol_name(),
|
||||
-4);
|
||||
sink.put4(0);
|
||||
|
|
@ -1604,7 +1615,7 @@ pub(crate) fn define<'shared>(
|
|||
);
|
||||
|
||||
// XX /r register-indirect store with 8-bit offset of FPR.
|
||||
recipes.add_template_recipe(
|
||||
recipes.add_template_inferred(
|
||||
EncodingRecipeBuilder::new("fstDisp8", &formats.store, 2)
|
||||
.operands_in(vec![fpr, gpr])
|
||||
.inst_predicate(has_small_offset)
|
||||
|
|
@ -1626,6 +1637,7 @@ pub(crate) fn define<'shared>(
|
|||
sink.put1(offset as u8);
|
||||
"#,
|
||||
),
|
||||
"size_plus_maybe_sib_inreg1_plus_rex_prefix_for_inreg0_inreg1",
|
||||
);
|
||||
|
||||
// XX /r register-indirect store with 32-bit offset.
|
||||
|
|
@ -1682,7 +1694,7 @@ pub(crate) fn define<'shared>(
|
|||
);
|
||||
|
||||
// XX /r register-indirect store with 32-bit offset of FPR.
|
||||
recipes.add_template_recipe(
|
||||
recipes.add_template_inferred(
|
||||
EncodingRecipeBuilder::new("fstDisp32", &formats.store, 5)
|
||||
.operands_in(vec![fpr, gpr])
|
||||
.clobbers_flags(false)
|
||||
|
|
@ -1703,6 +1715,7 @@ pub(crate) fn define<'shared>(
|
|||
sink.put4(offset as u32);
|
||||
"#,
|
||||
),
|
||||
"size_plus_maybe_sib_inreg1_plus_rex_prefix_for_inreg0_inreg1",
|
||||
);
|
||||
}
|
||||
|
||||
|
|
@ -2087,7 +2100,7 @@ pub(crate) fn define<'shared>(
|
|||
);
|
||||
|
||||
// XX /r float load with 8-bit offset.
|
||||
recipes.add_template_recipe(
|
||||
recipes.add_template_inferred(
|
||||
EncodingRecipeBuilder::new("fldDisp8", &formats.load, 2)
|
||||
.operands_in(vec![gpr])
|
||||
.operands_out(vec![fpr])
|
||||
|
|
@ -2110,6 +2123,7 @@ pub(crate) fn define<'shared>(
|
|||
sink.put1(offset as u8);
|
||||
"#,
|
||||
),
|
||||
"size_plus_maybe_sib_for_inreg_0_plus_rex_prefix_for_inreg0_outreg0",
|
||||
);
|
||||
|
||||
let has_big_offset =
|
||||
|
|
@ -2142,7 +2156,7 @@ pub(crate) fn define<'shared>(
|
|||
);
|
||||
|
||||
// XX /r float load with 32-bit offset.
|
||||
recipes.add_template_recipe(
|
||||
recipes.add_template_inferred(
|
||||
EncodingRecipeBuilder::new("fldDisp32", &formats.load, 5)
|
||||
.operands_in(vec![gpr])
|
||||
.operands_out(vec![fpr])
|
||||
|
|
@ -2165,6 +2179,7 @@ pub(crate) fn define<'shared>(
|
|||
sink.put4(offset as u32);
|
||||
"#,
|
||||
),
|
||||
"size_plus_maybe_sib_for_inreg_0_plus_rex_prefix_for_inreg0_outreg0",
|
||||
);
|
||||
}
|
||||
|
||||
|
|
@ -2397,10 +2412,12 @@ pub(crate) fn define<'shared>(
|
|||
{{PUT_OP}}(bits, BASE_REX, sink);
|
||||
// The addend adjusts for the difference between the end of the
|
||||
// instruction and the beginning of the immediate field.
|
||||
sink.reloc_external(Reloc::X86CallPCRel4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::X86CallPCRel4,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
-4);
|
||||
sink.put4(0);
|
||||
sink.add_call_site(opcode, func.srclocs[inst]);
|
||||
"#,
|
||||
),
|
||||
);
|
||||
|
|
@ -2410,10 +2427,12 @@ pub(crate) fn define<'shared>(
|
|||
r#"
|
||||
sink.trap(TrapCode::StackOverflow, func.srclocs[inst]);
|
||||
{{PUT_OP}}(bits, BASE_REX, sink);
|
||||
sink.reloc_external(Reloc::X86CallPLTRel4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::X86CallPLTRel4,
|
||||
&func.dfg.ext_funcs[func_ref].name,
|
||||
-4);
|
||||
sink.put4(0);
|
||||
sink.add_call_site(opcode, func.srclocs[inst]);
|
||||
"#,
|
||||
),
|
||||
);
|
||||
|
|
@ -2426,6 +2445,7 @@ pub(crate) fn define<'shared>(
|
|||
sink.trap(TrapCode::StackOverflow, func.srclocs[inst]);
|
||||
{{PUT_OP}}(bits, rex1(in_reg0), sink);
|
||||
modrm_r_bits(in_reg0, bits, sink);
|
||||
sink.add_call_site(opcode, func.srclocs[inst]);
|
||||
"#,
|
||||
),
|
||||
);
|
||||
|
|
@ -3315,7 +3335,8 @@ pub(crate) fn define<'shared>(
|
|||
const LEA: u8 = 0x8d;
|
||||
sink.put1(LEA); // lea
|
||||
modrm_riprel(0b111/*out_reg0*/, sink); // 0x3d
|
||||
sink.reloc_external(Reloc::ElfX86_64TlsGd,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::ElfX86_64TlsGd,
|
||||
&func.global_values[global_value].symbol_name(),
|
||||
-4);
|
||||
sink.put4(0);
|
||||
|
|
@ -3325,7 +3346,8 @@ pub(crate) fn define<'shared>(
|
|||
sink.put1(0x66); // data16
|
||||
sink.put1(0b01001000); // rex.w
|
||||
sink.put1(0xe8); // call
|
||||
sink.reloc_external(Reloc::X86CallPLTRel4,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::X86CallPLTRel4,
|
||||
&ExternalName::LibCall(LibCall::ElfTlsGetAddr),
|
||||
-4);
|
||||
sink.put4(0);
|
||||
|
|
@ -3346,7 +3368,8 @@ pub(crate) fn define<'shared>(
|
|||
sink.put1(0x48); // rex
|
||||
sink.put1(0x8b); // mov
|
||||
modrm_riprel(0b111/*out_reg0*/, sink); // 0x3d
|
||||
sink.reloc_external(Reloc::MachOX86_64Tlv,
|
||||
sink.reloc_external(func.srclocs[inst],
|
||||
Reloc::MachOX86_64Tlv,
|
||||
&func.global_values[global_value].symbol_name(),
|
||||
-4);
|
||||
sink.put4(0);
|
||||
|
|
|
|||
|
|
@ -1147,6 +1147,123 @@ pub(crate) fn define(
|
|||
.can_store(true),
|
||||
);
|
||||
|
||||
let I16x8 = &TypeVar::new(
|
||||
"I16x8",
|
||||
"A SIMD vector with exactly 8 lanes of 16-bit values",
|
||||
TypeSetBuilder::new()
|
||||
.ints(16..16)
|
||||
.simd_lanes(8..8)
|
||||
.includes_scalars(false)
|
||||
.build(),
|
||||
);
|
||||
let a = &Operand::new("a", I16x8).with_doc("Value loaded");
|
||||
|
||||
ig.push(
|
||||
Inst::new(
|
||||
"uload8x8",
|
||||
r#"
|
||||
Load an 8x8 vector (64 bits) from memory at ``p + Offset`` and zero-extend into an i16x8
|
||||
vector.
|
||||
"#,
|
||||
&formats.load,
|
||||
)
|
||||
.operands_in(vec![MemFlags, p, Offset])
|
||||
.operands_out(vec![a])
|
||||
.can_load(true),
|
||||
);
|
||||
|
||||
ig.push(
|
||||
Inst::new(
|
||||
"sload8x8",
|
||||
r#"
|
||||
Load an 8x8 vector (64 bits) from memory at ``p + Offset`` and sign-extend into an i16x8
|
||||
vector.
|
||||
"#,
|
||||
&formats.load,
|
||||
)
|
||||
.operands_in(vec![MemFlags, p, Offset])
|
||||
.operands_out(vec![a])
|
||||
.can_load(true),
|
||||
);
|
||||
|
||||
let I32x4 = &TypeVar::new(
|
||||
"I32x4",
|
||||
"A SIMD vector with exactly 4 lanes of 32-bit values",
|
||||
TypeSetBuilder::new()
|
||||
.ints(32..32)
|
||||
.simd_lanes(4..4)
|
||||
.includes_scalars(false)
|
||||
.build(),
|
||||
);
|
||||
let a = &Operand::new("a", I32x4).with_doc("Value loaded");
|
||||
|
||||
ig.push(
|
||||
Inst::new(
|
||||
"uload16x4",
|
||||
r#"
|
||||
Load an 16x4 vector (64 bits) from memory at ``p + Offset`` and zero-extend into an i32x4
|
||||
vector.
|
||||
"#,
|
||||
&formats.load,
|
||||
)
|
||||
.operands_in(vec![MemFlags, p, Offset])
|
||||
.operands_out(vec![a])
|
||||
.can_load(true),
|
||||
);
|
||||
|
||||
ig.push(
|
||||
Inst::new(
|
||||
"sload16x4",
|
||||
r#"
|
||||
Load a 16x4 vector (64 bits) from memory at ``p + Offset`` and sign-extend into an i32x4
|
||||
vector.
|
||||
"#,
|
||||
&formats.load,
|
||||
)
|
||||
.operands_in(vec![MemFlags, p, Offset])
|
||||
.operands_out(vec![a])
|
||||
.can_load(true),
|
||||
);
|
||||
|
||||
let I64x2 = &TypeVar::new(
|
||||
"I64x2",
|
||||
"A SIMD vector with exactly 2 lanes of 64-bit values",
|
||||
TypeSetBuilder::new()
|
||||
.ints(64..64)
|
||||
.simd_lanes(2..2)
|
||||
.includes_scalars(false)
|
||||
.build(),
|
||||
);
|
||||
let a = &Operand::new("a", I64x2).with_doc("Value loaded");
|
||||
|
||||
ig.push(
|
||||
Inst::new(
|
||||
"uload32x2",
|
||||
r#"
|
||||
Load an 32x2 vector (64 bits) from memory at ``p + Offset`` and zero-extend into an i64x2
|
||||
vector.
|
||||
"#,
|
||||
&formats.load,
|
||||
)
|
||||
.operands_in(vec![MemFlags, p, Offset])
|
||||
.operands_out(vec![a])
|
||||
.can_load(true),
|
||||
);
|
||||
|
||||
ig.push(
|
||||
Inst::new(
|
||||
"sload32x2",
|
||||
r#"
|
||||
Load a 32x2 vector (64 bits) from memory at ``p + Offset`` and sign-extend into an i64x2
|
||||
vector.
|
||||
"#,
|
||||
&formats.load,
|
||||
)
|
||||
.operands_in(vec![MemFlags, p, Offset])
|
||||
.operands_out(vec![a])
|
||||
.can_load(true),
|
||||
);
|
||||
|
||||
let x = &Operand::new("x", Mem).with_doc("Value to be stored");
|
||||
let a = &Operand::new("a", Mem).with_doc("Value loaded");
|
||||
let Offset =
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
{"files":{"Cargo.toml":"9b4276e6dafee6a97061c404a8418bf6bd683dd6cf4ae1997eafa990d2f20d6b","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"a410bc2f5dcbde499c0cd299c2620bc8111e3c5b3fccdd9e2d85caf3c24fdab3","src/condcodes.rs":"b8d433b2217b86e172d25b6c65a3ce0cc8ca221062cad1b28b0c78d2159fbda9","src/constant_hash.rs":"ffc619f45aad62c6fdcb83553a05879691a72e9a0103375b2d6cc12d52cf72d0","src/constants.rs":"fed03a10a6316e06aa174091db6e7d1fbb5f73c82c31193012ec5ab52f1c603a","src/isa/mod.rs":"428a950eca14acbe783899ccb1aecf15027f8cbe205578308ebde203d10535f3","src/isa/x86/encoding_bits.rs":"7e013fb804b13f9f83a0d517c6f5105856938d08ad378cc44a6fe6a59adef270","src/isa/x86/mod.rs":"01ef4e4d7437f938badbe2137892183c1ac684da0f68a5bec7e06aad34f43b9b","src/lib.rs":"91f26f998f11fb9cb74d2ec171424e29badd417beef023674850ace57149c656"},"package":null}
|
||||
{"files":{"Cargo.toml":"35beecf644d966a002873be06c3f087756b39bb9d206aa465d957df96b6d4304","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"a410bc2f5dcbde499c0cd299c2620bc8111e3c5b3fccdd9e2d85caf3c24fdab3","src/condcodes.rs":"b8d433b2217b86e172d25b6c65a3ce0cc8ca221062cad1b28b0c78d2159fbda9","src/constant_hash.rs":"ffc619f45aad62c6fdcb83553a05879691a72e9a0103375b2d6cc12d52cf72d0","src/constants.rs":"fed03a10a6316e06aa174091db6e7d1fbb5f73c82c31193012ec5ab52f1c603a","src/isa/mod.rs":"428a950eca14acbe783899ccb1aecf15027f8cbe205578308ebde203d10535f3","src/isa/x86/encoding_bits.rs":"7e013fb804b13f9f83a0d517c6f5105856938d08ad378cc44a6fe6a59adef270","src/isa/x86/mod.rs":"01ef4e4d7437f938badbe2137892183c1ac684da0f68a5bec7e06aad34f43b9b","src/lib.rs":"91f26f998f11fb9cb74d2ec171424e29badd417beef023674850ace57149c656"},"package":null}
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
[package]
|
||||
authors = ["The Cranelift Project Developers"]
|
||||
name = "cranelift-codegen-shared"
|
||||
version = "0.60.0"
|
||||
version = "0.62.0"
|
||||
description = "For code shared between cranelift-codegen-meta and cranelift-codegen"
|
||||
license = "Apache-2.0 WITH LLVM-exception"
|
||||
repository = "https://github.com/bytecodealliance/wasmtime"
|
||||
|
|
|
|||
Различия файлов скрыты, потому что одна или несколько строк слишком длинны
|
|
@ -1,7 +1,7 @@
|
|||
[package]
|
||||
authors = ["The Cranelift Project Developers"]
|
||||
name = "cranelift-codegen"
|
||||
version = "0.60.0"
|
||||
version = "0.62.0"
|
||||
description = "Low-level code generator library"
|
||||
license = "Apache-2.0 WITH LLVM-exception"
|
||||
documentation = "https://docs.rs/cranelift-codegen"
|
||||
|
|
@ -13,9 +13,9 @@ build = "build.rs"
|
|||
edition = "2018"
|
||||
|
||||
[dependencies]
|
||||
cranelift-codegen-shared = { path = "./shared", version = "0.60.0" }
|
||||
cranelift-entity = { path = "../entity", version = "0.60.0" }
|
||||
cranelift-bforest = { path = "../bforest", version = "0.60.0" }
|
||||
cranelift-codegen-shared = { path = "./shared", version = "0.62.0" }
|
||||
cranelift-entity = { path = "../entity", version = "0.62.0" }
|
||||
cranelift-bforest = { path = "../bforest", version = "0.62.0" }
|
||||
hashbrown = { version = "0.7", optional = true }
|
||||
target-lexicon = "0.10"
|
||||
log = { version = "0.4.6", default-features = false }
|
||||
|
|
@ -30,7 +30,7 @@ byteorder = { version = "1.3.2", default-features = false }
|
|||
# accomodated in `tests`.
|
||||
|
||||
[build-dependencies]
|
||||
cranelift-codegen-meta = { path = "meta", version = "0.60.0" }
|
||||
cranelift-codegen-meta = { path = "meta", version = "0.62.0" }
|
||||
|
||||
[features]
|
||||
default = ["std", "unwind"]
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
use super::{Addend, CodeInfo, CodeOffset, CodeSink, Reloc};
|
||||
use crate::binemit::stackmap::Stackmap;
|
||||
use crate::ir::entities::Value;
|
||||
use crate::ir::{ConstantOffset, ExternalName, Function, JumpTable, SourceLoc, TrapCode};
|
||||
use crate::ir::{ConstantOffset, ExternalName, Function, JumpTable, Opcode, SourceLoc, TrapCode};
|
||||
use crate::isa::TargetIsa;
|
||||
use core::ptr::write_unaligned;
|
||||
|
||||
|
|
@ -78,13 +78,24 @@ pub trait RelocSink {
|
|||
fn reloc_block(&mut self, _: CodeOffset, _: Reloc, _: CodeOffset);
|
||||
|
||||
/// Add a relocation referencing an external symbol at the current offset.
|
||||
fn reloc_external(&mut self, _: CodeOffset, _: Reloc, _: &ExternalName, _: Addend);
|
||||
fn reloc_external(
|
||||
&mut self,
|
||||
_: CodeOffset,
|
||||
_: SourceLoc,
|
||||
_: Reloc,
|
||||
_: &ExternalName,
|
||||
_: Addend,
|
||||
);
|
||||
|
||||
/// Add a relocation referencing a constant.
|
||||
fn reloc_constant(&mut self, _: CodeOffset, _: Reloc, _: ConstantOffset);
|
||||
|
||||
/// Add a relocation referencing a jump table.
|
||||
fn reloc_jt(&mut self, _: CodeOffset, _: Reloc, _: JumpTable);
|
||||
|
||||
/// Track a call site whose return address is the given CodeOffset, for the given opcode. Does
|
||||
/// nothing in general, only useful for certain embedders (SpiderMonkey).
|
||||
fn add_call_site(&mut self, _: Opcode, _: CodeOffset, _: SourceLoc) {}
|
||||
}
|
||||
|
||||
/// A trait for receiving trap codes and offsets.
|
||||
|
|
@ -132,9 +143,15 @@ impl<'a> CodeSink for MemoryCodeSink<'a> {
|
|||
self.relocs.reloc_block(ofs, rel, block_offset);
|
||||
}
|
||||
|
||||
fn reloc_external(&mut self, rel: Reloc, name: &ExternalName, addend: Addend) {
|
||||
fn reloc_external(
|
||||
&mut self,
|
||||
srcloc: SourceLoc,
|
||||
rel: Reloc,
|
||||
name: &ExternalName,
|
||||
addend: Addend,
|
||||
) {
|
||||
let ofs = self.offset();
|
||||
self.relocs.reloc_external(ofs, rel, name, addend);
|
||||
self.relocs.reloc_external(ofs, srcloc, rel, name, addend);
|
||||
}
|
||||
|
||||
fn reloc_constant(&mut self, rel: Reloc, constant_offset: ConstantOffset) {
|
||||
|
|
@ -170,6 +187,15 @@ impl<'a> CodeSink for MemoryCodeSink<'a> {
|
|||
let stackmap = Stackmap::from_values(&val_list, func, isa);
|
||||
self.stackmaps.add_stackmap(ofs, stackmap);
|
||||
}
|
||||
|
||||
fn add_call_site(&mut self, opcode: Opcode, loc: SourceLoc) {
|
||||
debug_assert!(
|
||||
opcode.is_call(),
|
||||
"adding call site info for a non-call instruction."
|
||||
);
|
||||
let ret_addr = self.offset();
|
||||
self.relocs.add_call_site(opcode, ret_addr, loc);
|
||||
}
|
||||
}
|
||||
|
||||
/// A `RelocSink` implementation that does nothing, which is convenient when
|
||||
|
|
@ -177,10 +203,18 @@ impl<'a> CodeSink for MemoryCodeSink<'a> {
|
|||
pub struct NullRelocSink {}
|
||||
|
||||
impl RelocSink for NullRelocSink {
|
||||
fn reloc_block(&mut self, _: u32, _: Reloc, _: u32) {}
|
||||
fn reloc_external(&mut self, _: u32, _: Reloc, _: &ExternalName, _: i64) {}
|
||||
fn reloc_block(&mut self, _: CodeOffset, _: Reloc, _: CodeOffset) {}
|
||||
fn reloc_external(
|
||||
&mut self,
|
||||
_: CodeOffset,
|
||||
_: SourceLoc,
|
||||
_: Reloc,
|
||||
_: &ExternalName,
|
||||
_: Addend,
|
||||
) {
|
||||
}
|
||||
fn reloc_constant(&mut self, _: CodeOffset, _: Reloc, _: ConstantOffset) {}
|
||||
fn reloc_jt(&mut self, _: u32, _: Reloc, _: JumpTable) {}
|
||||
fn reloc_jt(&mut self, _: CodeOffset, _: Reloc, _: JumpTable) {}
|
||||
}
|
||||
|
||||
/// A `TrapSink` implementation that does nothing, which is convenient when
|
||||
|
|
|
|||
|
|
@ -16,7 +16,9 @@ pub use self::relaxation::relax_branches;
|
|||
pub use self::shrink::shrink_instructions;
|
||||
pub use self::stackmap::Stackmap;
|
||||
use crate::ir::entities::Value;
|
||||
use crate::ir::{ConstantOffset, ExternalName, Function, Inst, JumpTable, SourceLoc, TrapCode};
|
||||
use crate::ir::{
|
||||
ConstantOffset, ExternalName, Function, Inst, JumpTable, Opcode, SourceLoc, TrapCode,
|
||||
};
|
||||
use crate::isa::TargetIsa;
|
||||
pub use crate::regalloc::RegDiversions;
|
||||
use core::fmt;
|
||||
|
|
@ -140,7 +142,7 @@ pub trait CodeSink {
|
|||
fn reloc_block(&mut self, _: Reloc, _: CodeOffset);
|
||||
|
||||
/// Add a relocation referencing an external symbol plus the addend at the current offset.
|
||||
fn reloc_external(&mut self, _: Reloc, _: &ExternalName, _: Addend);
|
||||
fn reloc_external(&mut self, _: SourceLoc, _: Reloc, _: &ExternalName, _: Addend);
|
||||
|
||||
/// Add a relocation referencing a constant.
|
||||
fn reloc_constant(&mut self, _: Reloc, _: ConstantOffset);
|
||||
|
|
@ -162,6 +164,11 @@ pub trait CodeSink {
|
|||
|
||||
/// Add a stackmap at the current code offset.
|
||||
fn add_stackmap(&mut self, _: &[Value], _: &Function, _: &dyn TargetIsa);
|
||||
|
||||
/// Add a call site for a call with the given opcode, returning at the current offset.
|
||||
fn add_call_site(&mut self, _: Opcode, _: SourceLoc) {
|
||||
// Default implementation doesn't need to do anything.
|
||||
}
|
||||
}
|
||||
|
||||
/// Type of the frame unwind information.
|
||||
|
|
|
|||
|
|
@ -74,6 +74,12 @@ mod riscv;
|
|||
#[cfg(feature = "x86")]
|
||||
mod x86;
|
||||
|
||||
#[cfg(all(feature = "x86", feature = "unwind"))]
|
||||
/// Expose the register-mapping functionality necessary for exception handling, debug, etc.
|
||||
pub mod fde {
|
||||
pub use super::x86::map_reg;
|
||||
}
|
||||
|
||||
#[cfg(feature = "arm32")]
|
||||
mod arm32;
|
||||
|
||||
|
|
|
|||
|
|
@ -74,10 +74,15 @@ fn evex2(rm: RegUnit, reg: RegUnit) -> u8 {
|
|||
0x00 | r_ | (b << 1) | (x << 2) | (r << 3)
|
||||
}
|
||||
|
||||
/// Determines whether a REX prefix should be emitted.
|
||||
/// Determines whether a REX prefix should be emitted. A REX byte always has 0100 in bits 7:4; bits
|
||||
/// 3:0 correspond to WRXB. W allows certain instructions to declare a 64-bit operand size; because
|
||||
/// [needs_rex] is only used by [infer_rex] and we prevent [infer_rex] from using [w] in
|
||||
/// [Template::build], we do not need to check again whether [w] forces an inferred REX prefix--it
|
||||
/// always does and should be encoded like `.rex().w()`. The RXB are extension of ModR/M or SIB
|
||||
/// fields; see section 2.2.1.2 in the Intel Software Development Manual.
|
||||
#[inline]
|
||||
fn needs_rex(bits: u16, rex: u8) -> bool {
|
||||
rex != BASE_REX || EncodingBits::from(bits).rex_w() == 1
|
||||
fn needs_rex(rex: u8) -> bool {
|
||||
rex != BASE_REX
|
||||
}
|
||||
|
||||
// Emit a REX prefix.
|
||||
|
|
@ -107,7 +112,7 @@ fn put_rexop1<CS: CodeSink + ?Sized>(bits: u16, rex: u8, sink: &mut CS) {
|
|||
/// Emit a single-byte opcode with inferred REX prefix.
|
||||
fn put_dynrexop1<CS: CodeSink + ?Sized>(bits: u16, rex: u8, sink: &mut CS) {
|
||||
debug_assert_eq!(bits & 0x0f00, 0, "Invalid encoding bits for DynRexOp1*");
|
||||
if needs_rex(bits, rex) {
|
||||
if needs_rex(rex) {
|
||||
rex_prefix(bits, rex, sink);
|
||||
}
|
||||
sink.put1(bits as u8);
|
||||
|
|
@ -136,7 +141,7 @@ fn put_dynrexop2<CS: CodeSink + ?Sized>(bits: u16, rex: u8, sink: &mut CS) {
|
|||
0x0400,
|
||||
"Invalid encoding bits for DynRexOp2*"
|
||||
);
|
||||
if needs_rex(bits, rex) {
|
||||
if needs_rex(rex) {
|
||||
rex_prefix(bits, rex, sink);
|
||||
}
|
||||
sink.put1(0x0f);
|
||||
|
|
@ -190,7 +195,7 @@ fn put_dynrexmp2<CS: CodeSink + ?Sized>(bits: u16, rex: u8, sink: &mut CS) {
|
|||
);
|
||||
let enc = EncodingBits::from(bits);
|
||||
sink.put1(PREFIX[(enc.pp() - 1) as usize]);
|
||||
if needs_rex(bits, rex) {
|
||||
if needs_rex(rex) {
|
||||
rex_prefix(bits, rex, sink);
|
||||
}
|
||||
sink.put1(0x0f);
|
||||
|
|
@ -228,7 +233,7 @@ fn put_dynrexmp3<CS: CodeSink + ?Sized>(bits: u16, rex: u8, sink: &mut CS) {
|
|||
);
|
||||
let enc = EncodingBits::from(bits);
|
||||
sink.put1(PREFIX[(enc.pp() - 1) as usize]);
|
||||
if needs_rex(bits, rex) {
|
||||
if needs_rex(rex) {
|
||||
rex_prefix(bits, rex, sink);
|
||||
}
|
||||
sink.put1(0x0f);
|
||||
|
|
|
|||
|
|
@ -16,8 +16,6 @@ use crate::isa::{self, TargetIsa};
|
|||
use crate::predicates;
|
||||
use crate::regalloc::RegDiversions;
|
||||
|
||||
use cranelift_codegen_shared::isa::x86::EncodingBits;
|
||||
|
||||
include!(concat!(env!("OUT_DIR"), "/encoding-x86.rs"));
|
||||
include!(concat!(env!("OUT_DIR"), "/legalize-x86.rs"));
|
||||
|
||||
|
|
@ -132,13 +130,28 @@ fn size_plus_maybe_sib_or_offset_inreg1_plus_rex_prefix_for_inreg0_inreg1(
|
|||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(0, inst, divert, func, is_extended_reg)
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(0, inst, divert, func, is_extended_reg)
|
||||
|| test_input(1, inst, divert, func, is_extended_reg);
|
||||
size_plus_maybe_sib_or_offset_for_inreg_1(sizing, enc, inst, divert, func)
|
||||
+ if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
/// Calculates the size while inferring if the first and second input registers (inreg0, inreg1)
|
||||
/// require a dynamic REX prefix and if the second input register (inreg1) requires a SIB.
|
||||
fn size_plus_maybe_sib_inreg1_plus_rex_prefix_for_inreg0_inreg1(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(0, inst, divert, func, is_extended_reg)
|
||||
|| test_input(1, inst, divert, func, is_extended_reg);
|
||||
size_plus_maybe_sib_for_inreg_1(sizing, enc, inst, divert, func) + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
/// Calculates the size while inferring if the first input register (inreg0) and first output
|
||||
/// register (outreg0) require a dynamic REX and if the first input register (inreg0) requires a
|
||||
/// SIB or offset.
|
||||
|
|
@ -149,13 +162,29 @@ fn size_plus_maybe_sib_or_offset_for_inreg_0_plus_rex_prefix_for_inreg0_outreg0(
|
|||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(0, inst, divert, func, is_extended_reg)
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(0, inst, divert, func, is_extended_reg)
|
||||
|| test_result(0, inst, divert, func, is_extended_reg);
|
||||
size_plus_maybe_sib_or_offset_for_inreg_0(sizing, enc, inst, divert, func)
|
||||
+ if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
/// Calculates the size while inferring if the first input register (inreg0) and first output
|
||||
/// register (outreg0) require a dynamic REX and if the first input register (inreg0) requires a
|
||||
/// SIB.
|
||||
fn size_plus_maybe_sib_for_inreg_0_plus_rex_prefix_for_inreg0_outreg0(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(0, inst, divert, func, is_extended_reg)
|
||||
|| test_result(0, inst, divert, func, is_extended_reg);
|
||||
size_plus_maybe_sib_for_inreg_0(sizing, enc, inst, divert, func) + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
/// Infers whether a dynamic REX prefix will be emitted, for use with one input reg.
|
||||
///
|
||||
/// A REX prefix is known to be emitted if either:
|
||||
|
|
@ -163,39 +192,39 @@ fn size_plus_maybe_sib_or_offset_for_inreg_0_plus_rex_prefix_for_inreg0_outreg0(
|
|||
/// 2. Registers are used that require REX.R or REX.B bits for encoding.
|
||||
fn size_with_inferred_rex_for_inreg0(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
_enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(0, inst, divert, func, is_extended_reg);
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(0, inst, divert, func, is_extended_reg);
|
||||
sizing.base_size + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
/// Infers whether a dynamic REX prefix will be emitted, based on the second operand.
|
||||
fn size_with_inferred_rex_for_inreg1(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
_enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(1, inst, divert, func, is_extended_reg);
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(1, inst, divert, func, is_extended_reg);
|
||||
sizing.base_size + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
/// Infers whether a dynamic REX prefix will be emitted, based on the third operand.
|
||||
fn size_with_inferred_rex_for_inreg2(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
_: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(2, inst, divert, func, is_extended_reg);
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(2, inst, divert, func, is_extended_reg);
|
||||
sizing.base_size + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
|
|
@ -206,13 +235,13 @@ fn size_with_inferred_rex_for_inreg2(
|
|||
/// 2. Registers are used that require REX.R or REX.B bits for encoding.
|
||||
fn size_with_inferred_rex_for_inreg0_inreg1(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
_enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(0, inst, divert, func, is_extended_reg)
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(0, inst, divert, func, is_extended_reg)
|
||||
|| test_input(1, inst, divert, func, is_extended_reg);
|
||||
sizing.base_size + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
|
@ -221,13 +250,13 @@ fn size_with_inferred_rex_for_inreg0_inreg1(
|
|||
/// input register and a single output register.
|
||||
fn size_with_inferred_rex_for_inreg0_outreg0(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
_enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(0, inst, divert, func, is_extended_reg)
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(0, inst, divert, func, is_extended_reg)
|
||||
|| test_result(0, inst, divert, func, is_extended_reg);
|
||||
sizing.base_size + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
|
@ -235,13 +264,13 @@ fn size_with_inferred_rex_for_inreg0_outreg0(
|
|||
/// Infers whether a dynamic REX prefix will be emitted, based on a single output register.
|
||||
fn size_with_inferred_rex_for_outreg0(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
_enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_result(0, inst, divert, func, is_extended_reg);
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_result(0, inst, divert, func, is_extended_reg);
|
||||
sizing.base_size + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
||||
|
|
@ -250,13 +279,13 @@ fn size_with_inferred_rex_for_outreg0(
|
|||
/// CMOV uses 3 inputs, with the REX is inferred from reg1 and reg2.
|
||||
fn size_with_inferred_rex_for_cmov(
|
||||
sizing: &RecipeSizing,
|
||||
enc: Encoding,
|
||||
_enc: Encoding,
|
||||
inst: Inst,
|
||||
divert: &RegDiversions,
|
||||
func: &Function,
|
||||
) -> u8 {
|
||||
let needs_rex = (EncodingBits::from(enc.bits()).rex_w() != 0)
|
||||
|| test_input(1, inst, divert, func, is_extended_reg)
|
||||
// No need to check for REX.W in `needs_rex` because `infer_rex().w()` is not allowed.
|
||||
let needs_rex = test_input(1, inst, divert, func, is_extended_reg)
|
||||
|| test_input(2, inst, divert, func, is_extended_reg);
|
||||
sizing.base_size + if needs_rex { 1 } else { 0 }
|
||||
}
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@ use gimli::write::{
|
|||
FrameDescriptionEntry, FrameTable, Result, Writer,
|
||||
};
|
||||
use gimli::{Encoding, Format, LittleEndian, Register, X86_64};
|
||||
use thiserror::Error;
|
||||
|
||||
pub type FDERelocEntry = (FrameUnwindOffset, Reloc);
|
||||
|
||||
|
|
@ -74,8 +75,15 @@ fn return_address_reg(isa: &dyn TargetIsa) -> Register {
|
|||
X86_64::RA
|
||||
}
|
||||
|
||||
fn map_reg(isa: &dyn TargetIsa, reg: RegUnit) -> Register {
|
||||
assert!(isa.name() == "x86" && isa.pointer_bits() == 64);
|
||||
/// Map Cranelift registers to their corresponding Gimli registers.
|
||||
pub fn map_reg(
|
||||
isa: &dyn TargetIsa,
|
||||
reg: RegUnit,
|
||||
) -> core::result::Result<Register, RegisterMappingError> {
|
||||
if isa.name() != "x86" || isa.pointer_bits() != 64 {
|
||||
return Err(RegisterMappingError::UnsupportedArchitecture);
|
||||
}
|
||||
|
||||
// Mapping from https://github.com/bytecodealliance/cranelift/pull/902 by @iximeow
|
||||
const X86_GP_REG_MAP: [gimli::Register; 16] = [
|
||||
X86_64::RAX,
|
||||
|
|
@ -113,19 +121,30 @@ fn map_reg(isa: &dyn TargetIsa, reg: RegUnit) -> Register {
|
|||
X86_64::XMM14,
|
||||
X86_64::XMM15,
|
||||
];
|
||||
|
||||
let reg_info = isa.register_info();
|
||||
let bank = reg_info.bank_containing_regunit(reg).unwrap();
|
||||
let bank = reg_info
|
||||
.bank_containing_regunit(reg)
|
||||
.ok_or_else(|| RegisterMappingError::MissingBank)?;
|
||||
match bank.name {
|
||||
"IntRegs" => {
|
||||
// x86 GP registers have a weird mapping to DWARF registers, so we use a
|
||||
// lookup table.
|
||||
X86_GP_REG_MAP[(reg - bank.first_unit) as usize]
|
||||
Ok(X86_GP_REG_MAP[(reg - bank.first_unit) as usize])
|
||||
}
|
||||
"FloatRegs" => X86_XMM_REG_MAP[(reg - bank.first_unit) as usize],
|
||||
_ => {
|
||||
panic!("unsupported register bank: {}", bank.name);
|
||||
"FloatRegs" => Ok(X86_XMM_REG_MAP[(reg - bank.first_unit) as usize]),
|
||||
_ => Err(RegisterMappingError::UnsupportedRegisterBank(bank.name)),
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Error, Debug)]
|
||||
pub enum RegisterMappingError {
|
||||
#[error("unable to find bank for register info")]
|
||||
MissingBank,
|
||||
#[error("register mapping is currently only implemented for x86_64")]
|
||||
UnsupportedArchitecture,
|
||||
#[error("unsupported register bank: {0}")]
|
||||
UnsupportedRegisterBank(&'static str),
|
||||
}
|
||||
|
||||
fn to_cfi(
|
||||
|
|
@ -136,7 +155,7 @@ fn to_cfi(
|
|||
) -> Option<CallFrameInstruction> {
|
||||
Some(match change {
|
||||
FrameLayoutChange::CallFrameAddressAt { reg, offset } => {
|
||||
let mapped = map_reg(isa, *reg);
|
||||
let mapped = map_reg(isa, *reg).expect("a register mapping from cranelift to gimli");
|
||||
let offset = (*offset) as i32;
|
||||
if mapped != *cfa_def_reg && offset != *cfa_def_offset {
|
||||
*cfa_def_reg = mapped;
|
||||
|
|
@ -155,7 +174,7 @@ fn to_cfi(
|
|||
FrameLayoutChange::RegAt { reg, cfa_offset } => {
|
||||
assert!(cfa_offset % -8 == 0);
|
||||
let cfa_offset = *cfa_offset as i32;
|
||||
let mapped = map_reg(isa, *reg);
|
||||
let mapped = map_reg(isa, *reg).expect("a register mapping from cranelift to gimli");
|
||||
CallFrameInstruction::Offset(mapped, cfa_offset)
|
||||
}
|
||||
FrameLayoutChange::ReturnAddressAt { cfa_offset } => {
|
||||
|
|
|
|||
|
|
@ -10,6 +10,9 @@ pub mod settings;
|
|||
#[cfg(feature = "unwind")]
|
||||
mod unwind;
|
||||
|
||||
#[cfg(feature = "unwind")]
|
||||
pub use fde::map_reg;
|
||||
|
||||
use super::super::settings as shared_settings;
|
||||
#[cfg(feature = "testing_hooks")]
|
||||
use crate::binemit::CodeSink;
|
||||
|
|
|
|||
|
|
@ -902,8 +902,8 @@ fn branch_order(pos: &mut FuncCursor, cfg: &mut ControlFlowGraph, block: Block,
|
|||
_ => return,
|
||||
};
|
||||
|
||||
let cond_args = { cond_inst_args.as_slice(&pos.func.dfg.value_lists).to_vec() };
|
||||
let term_args = { term_inst_args.as_slice(&pos.func.dfg.value_lists).to_vec() };
|
||||
let cond_args = cond_inst_args.as_slice(&pos.func.dfg.value_lists).to_vec();
|
||||
let term_args = term_inst_args.as_slice(&pos.func.dfg.value_lists).to_vec();
|
||||
|
||||
match kind {
|
||||
BranchOrderKind::BrnzToBrz(cond_arg) => {
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
{"files":{"Cargo.toml":"0a7762f80abf6e2dbe73b7020fdbea138e6dab10809b15dc6a08249d58c3c422","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"96ceffbfd88fb06e3b41aa4d3087cffbbf8441d04eba7ab09662a72ab600a321","src/boxed_slice.rs":"69d539b72460c0aba1d30e0b72efb0c29d61558574d751c784794e14abf41352","src/iter.rs":"4a4d3309fe9aad14fd7702f02459f4277b4ddb50dba700e58dcc75665ffebfb3","src/keys.rs":"b8c2fba26dee15bf3d1880bb2b41e8d66fe1428d242ee6d9fd30ee94bbd0407d","src/lib.rs":"f6d738a46f1dca8b0c82a5910d86cd572a3585ab7ef9f73dac96962529069190","src/list.rs":"4bf609eb7cc7c000c18da746596d5fcc67eece3f919ee2d76e19f6ac371640d1","src/map.rs":"546b36be4cbbd2423bacbed69cbe114c63538c3f635e15284ab8e4223e717705","src/packed_option.rs":"dccb3dd6fc87eba0101de56417f21cab67a4394831df9fa41e3bbddb70cdf694","src/primary.rs":"30d5e2ab8427fd2b2c29da395812766049e3c40845cc887af3ee233dba91a063","src/set.rs":"b040054b8baa0599e64df9ee841640688e2a73b6eabbdc5a4f15334412db052a","src/sparse.rs":"536e31fdcf64450526f5e5b85e97406c26b998bc7e0d8161b6b449c24265449f"},"package":null}
|
||||
{"files":{"Cargo.toml":"b598da46e55aafd9d05c0d90bda8819edcb593141d1992c21b44639910d12981","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"96ceffbfd88fb06e3b41aa4d3087cffbbf8441d04eba7ab09662a72ab600a321","src/boxed_slice.rs":"69d539b72460c0aba1d30e0b72efb0c29d61558574d751c784794e14abf41352","src/iter.rs":"4a4d3309fe9aad14fd7702f02459f4277b4ddb50dba700e58dcc75665ffebfb3","src/keys.rs":"b8c2fba26dee15bf3d1880bb2b41e8d66fe1428d242ee6d9fd30ee94bbd0407d","src/lib.rs":"f6d738a46f1dca8b0c82a5910d86cd572a3585ab7ef9f73dac96962529069190","src/list.rs":"4bf609eb7cc7c000c18da746596d5fcc67eece3f919ee2d76e19f6ac371640d1","src/map.rs":"546b36be4cbbd2423bacbed69cbe114c63538c3f635e15284ab8e4223e717705","src/packed_option.rs":"dccb3dd6fc87eba0101de56417f21cab67a4394831df9fa41e3bbddb70cdf694","src/primary.rs":"30d5e2ab8427fd2b2c29da395812766049e3c40845cc887af3ee233dba91a063","src/set.rs":"b040054b8baa0599e64df9ee841640688e2a73b6eabbdc5a4f15334412db052a","src/sparse.rs":"536e31fdcf64450526f5e5b85e97406c26b998bc7e0d8161b6b449c24265449f"},"package":null}
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
[package]
|
||||
authors = ["The Cranelift Project Developers"]
|
||||
name = "cranelift-entity"
|
||||
version = "0.60.0"
|
||||
version = "0.62.0"
|
||||
description = "Data structures using entity references as mapping keys"
|
||||
license = "Apache-2.0 WITH LLVM-exception"
|
||||
documentation = "https://docs.rs/cranelift-entity"
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
{"files":{"Cargo.toml":"569136ca3728e465c6ea2d3e5d40226a6518566e17293d2e6f6194593ae3d783","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"dea43e8044284df50f8b8772e9b48ba8b109b45c74111ff73619775d57ad8d67","src/frontend.rs":"af0955c23a5462cc6d4a94c61ac1af5b7546a3d560e91d448452fe5c454d5da6","src/lib.rs":"5197f467d1625ee2b117a168f4b1886b4b69d4250faea6618360a5adc70b4e0c","src/ssa.rs":"339421ee9427ee7017939ca53b7b357f82af79c8a929aeb26fb6165b95f47e93","src/switch.rs":"6b7f97799e251f2b4ae6a9892fb911375e2dc9faa5d53ff93ba08988141f1f5b","src/variable.rs":"399437bd7d2ac11a7a748bad7dd1f6dac58824d374ec318f36367a9d077cc225"},"package":null}
|
||||
{"files":{"Cargo.toml":"0773fd1bf0dd78967f755538d2c62279eae3ce4bc442e2a21b953d9ab039d0b9","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"dea43e8044284df50f8b8772e9b48ba8b109b45c74111ff73619775d57ad8d67","src/frontend.rs":"579d9821aec76570b774c572e2ae0c1b8bc78f112ef2a83027051217f6bb31e4","src/lib.rs":"5197f467d1625ee2b117a168f4b1886b4b69d4250faea6618360a5adc70b4e0c","src/ssa.rs":"0cd620e4d9fbc5e249b782d8d22e8d112a70c0700b5dd312c92ef47a5c5280da","src/switch.rs":"6b7f97799e251f2b4ae6a9892fb911375e2dc9faa5d53ff93ba08988141f1f5b","src/variable.rs":"399437bd7d2ac11a7a748bad7dd1f6dac58824d374ec318f36367a9d077cc225"},"package":null}
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
[package]
|
||||
authors = ["The Cranelift Project Developers"]
|
||||
name = "cranelift-frontend"
|
||||
version = "0.60.0"
|
||||
version = "0.62.0"
|
||||
description = "Cranelift IR builder helper"
|
||||
license = "Apache-2.0 WITH LLVM-exception"
|
||||
documentation = "https://docs.rs/cranelift-frontend"
|
||||
|
|
@ -11,7 +11,7 @@ readme = "README.md"
|
|||
edition = "2018"
|
||||
|
||||
[dependencies]
|
||||
cranelift-codegen = { path = "../codegen", version = "0.60.0", default-features = false }
|
||||
cranelift-codegen = { path = "../codegen", version = "0.62.0", default-features = false }
|
||||
target-lexicon = "0.10"
|
||||
log = { version = "0.4.6", default-features = false }
|
||||
hashbrown = { version = "0.7", optional = true }
|
||||
|
|
|
|||
|
|
@ -1229,6 +1229,53 @@ block0:
|
|||
);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn undef_vector_vars() {
|
||||
let mut sig = Signature::new(CallConv::SystemV);
|
||||
sig.returns.push(AbiParam::new(I8X16));
|
||||
sig.returns.push(AbiParam::new(B8X16));
|
||||
sig.returns.push(AbiParam::new(F32X4));
|
||||
|
||||
let mut fn_ctx = FunctionBuilderContext::new();
|
||||
let mut func = Function::with_name_signature(ExternalName::testcase("sample"), sig);
|
||||
{
|
||||
let mut builder = FunctionBuilder::new(&mut func, &mut fn_ctx);
|
||||
|
||||
let block0 = builder.create_block();
|
||||
let a = Variable::new(0);
|
||||
let b = Variable::new(1);
|
||||
let c = Variable::new(2);
|
||||
builder.declare_var(a, I8X16);
|
||||
builder.declare_var(b, B8X16);
|
||||
builder.declare_var(c, F32X4);
|
||||
builder.switch_to_block(block0);
|
||||
|
||||
let a = builder.use_var(a);
|
||||
let b = builder.use_var(b);
|
||||
let c = builder.use_var(c);
|
||||
builder.ins().return_(&[a, b, c]);
|
||||
|
||||
builder.seal_all_blocks();
|
||||
builder.finalize();
|
||||
}
|
||||
|
||||
assert_eq!(
|
||||
func.display(None).to_string(),
|
||||
"function %sample() -> i8x16, b8x16, f32x4 system_v {
|
||||
block0:
|
||||
v5 = f32const 0.0
|
||||
v6 = splat.f32x4 v5
|
||||
v2 -> v6
|
||||
v4 = vconst.b8x16 0x00
|
||||
v1 -> v4
|
||||
v3 = vconst.i8x16 0x00
|
||||
v0 -> v3
|
||||
return v0, v1, v2
|
||||
}
|
||||
"
|
||||
);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_greatest_divisible_power_of_two() {
|
||||
assert_eq!(64, greatest_divisible_power_of_two(64));
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
|
||||
use crate::Variable;
|
||||
use alloc::vec::Vec;
|
||||
use core::convert::TryInto;
|
||||
use core::mem;
|
||||
use cranelift_codegen::cursor::{Cursor, FuncCursor};
|
||||
use cranelift_codegen::entity::SecondaryMap;
|
||||
|
|
@ -185,10 +186,13 @@ fn emit_zero(ty: Type, mut cur: FuncCursor) -> Value {
|
|||
cur.ins().null(ty)
|
||||
} else if ty.is_vector() {
|
||||
let scalar_ty = ty.lane_type();
|
||||
if scalar_ty.is_int() {
|
||||
cur.ins().iconst(ty, 0)
|
||||
} else if scalar_ty.is_bool() {
|
||||
cur.ins().bconst(ty, false)
|
||||
if scalar_ty.is_int() || scalar_ty.is_bool() {
|
||||
let zero = cur.func.dfg.constants.insert(
|
||||
core::iter::repeat(0)
|
||||
.take(ty.bytes().try_into().unwrap())
|
||||
.collect(),
|
||||
);
|
||||
cur.ins().vconst(ty, zero)
|
||||
} else if scalar_ty == F32 {
|
||||
let scalar = cur.ins().f32const(Ieee32::with_bits(0));
|
||||
cur.ins().splat(ty, scalar)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
{"files":{"Cargo.toml":"fbabc7ff07bf6a0c7c4ea8b723ae2eb86ee78ce51aa37c41201b98d0064b7db2","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"cce724251d4abc08c6492e1e25c138ab5a0d11e9ac90bc573652b18e034f56ed","src/code_translator.rs":"984f937da07895b5a34106d78762c937879174c9c88105addbc68799211f6a34","src/environ/dummy.rs":"49bce7a8eb9f21a61c12db537b51ab6bdb3d0e1eb6253084268256d96cae68a5","src/environ/mod.rs":"b6f33f619090ff497b4e22150d77a290f259716374ac2e377b73c47cd1dafe85","src/environ/spec.rs":"3a1543f99bff340c7f6bbe3f7cb8e8ec829e4139957f3c578d5b03e29df50f9e","src/func_translator.rs":"a165063eafedbb8e6b632996f747eeb49a3d6f8a70cab6d741abfc4fd9af892d","src/lib.rs":"05b9994c062faf2065046d1e4d7caffb26823816f367d77ede6918e24fcfa6b0","src/module_translator.rs":"bcdf5a84226b726a73f4be0acb0318ca89c82584460101378e73021d85bd4485","src/sections_translator.rs":"8c4c24308332c63d16fcf19693a7ecff2239e73b4752b0d3830b273fabcee9f1","src/state/func_state.rs":"b114522784984a7cc26a3549c7c17f842885e1232254de81d938f9d155f95aa6","src/state/mod.rs":"20014cb93615467b4d20321b52f67f66040417efcaa739a4804093bb559eed19","src/state/module_state.rs":"2f299b043deb806b48583fe54bbb46708f7d8a1454b7be0eb285568064e5a7f9","src/translation_utils.rs":"cd3ab5f994e02d49baa47148b66599d37f8156cd657b61ae68aefefa32a9d806","tests/wasm_testsuite.rs":"730304f139371e5ef3fd913ec271fc4db181869b447c6ed26c54313b5c31495c"},"package":null}
|
||||
{"files":{"Cargo.toml":"e927f5353af12ad52c5eb349db2a62c275ec49616c7109553258d367d8118ee1","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"cce724251d4abc08c6492e1e25c138ab5a0d11e9ac90bc573652b18e034f56ed","src/code_translator.rs":"575fe0fe427dcc5405faf449924fe457cd8a938f86d6fd853e1536427a096dfd","src/environ/dummy.rs":"49bce7a8eb9f21a61c12db537b51ab6bdb3d0e1eb6253084268256d96cae68a5","src/environ/mod.rs":"b6f33f619090ff497b4e22150d77a290f259716374ac2e377b73c47cd1dafe85","src/environ/spec.rs":"3a1543f99bff340c7f6bbe3f7cb8e8ec829e4139957f3c578d5b03e29df50f9e","src/func_translator.rs":"a165063eafedbb8e6b632996f747eeb49a3d6f8a70cab6d741abfc4fd9af892d","src/lib.rs":"05b9994c062faf2065046d1e4d7caffb26823816f367d77ede6918e24fcfa6b0","src/module_translator.rs":"bcdf5a84226b726a73f4be0acb0318ca89c82584460101378e73021d85bd4485","src/sections_translator.rs":"8c4c24308332c63d16fcf19693a7ecff2239e73b4752b0d3830b273fabcee9f1","src/state/func_state.rs":"b114522784984a7cc26a3549c7c17f842885e1232254de81d938f9d155f95aa6","src/state/mod.rs":"20014cb93615467b4d20321b52f67f66040417efcaa739a4804093bb559eed19","src/state/module_state.rs":"2f299b043deb806b48583fe54bbb46708f7d8a1454b7be0eb285568064e5a7f9","src/translation_utils.rs":"cd3ab5f994e02d49baa47148b66599d37f8156cd657b61ae68aefefa32a9d806","tests/wasm_testsuite.rs":"730304f139371e5ef3fd913ec271fc4db181869b447c6ed26c54313b5c31495c"},"package":null}
|
||||
|
|
@ -1,8 +1,9 @@
|
|||
[package]
|
||||
name = "cranelift-wasm"
|
||||
version = "0.60.0"
|
||||
version = "0.62.0"
|
||||
authors = ["The Cranelift Project Developers"]
|
||||
description = "Translator from WebAssembly to Cranelift IR"
|
||||
documentation = "https://docs.rs/cranelift-wasm"
|
||||
repository = "https://github.com/bytecodealliance/wasmtime"
|
||||
license = "Apache-2.0 WITH LLVM-exception"
|
||||
categories = ["no-std", "wasm"]
|
||||
|
|
@ -12,9 +13,9 @@ edition = "2018"
|
|||
|
||||
[dependencies]
|
||||
wasmparser = { version = "0.51.0", default-features = false }
|
||||
cranelift-codegen = { path = "../codegen", version = "0.60.0", default-features = false }
|
||||
cranelift-entity = { path = "../entity", version = "0.60.0" }
|
||||
cranelift-frontend = { path = "../frontend", version = "0.60.0", default-features = false }
|
||||
cranelift-codegen = { path = "../codegen", version = "0.62.0", default-features = false }
|
||||
cranelift-entity = { path = "../entity", version = "0.62.0" }
|
||||
cranelift-frontend = { path = "../frontend", version = "0.62.0", default-features = false }
|
||||
hashbrown = { version = "0.7", optional = true }
|
||||
log = { version = "0.4.6", default-features = false }
|
||||
serde = { version = "1.0.94", features = ["derive"], optional = true }
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@ use crate::translation_utils::{FuncIndex, GlobalIndex, MemoryIndex, SignatureInd
|
|||
use crate::wasm_unsupported;
|
||||
use core::{i32, u32};
|
||||
use cranelift_codegen::ir::condcodes::{FloatCC, IntCC};
|
||||
use cranelift_codegen::ir::immediates::Offset32;
|
||||
use cranelift_codegen::ir::types::*;
|
||||
use cranelift_codegen::ir::{
|
||||
self, ConstantData, InstBuilder, JumpTableData, MemFlags, Value, ValueLabel,
|
||||
|
|
@ -651,6 +652,48 @@ pub fn translate_operator<FE: FuncEnvironment + ?Sized>(
|
|||
} => {
|
||||
translate_load(*offset, ir::Opcode::Load, I8X16, builder, state, environ)?;
|
||||
}
|
||||
Operator::I16x8Load8x8S {
|
||||
memarg: MemoryImmediate { flags: _, offset },
|
||||
} => {
|
||||
let (flags, base, offset) = prepare_load(*offset, builder, state, environ)?;
|
||||
let loaded = builder.ins().sload8x8(flags, base, offset);
|
||||
state.push1(loaded);
|
||||
}
|
||||
Operator::I16x8Load8x8U {
|
||||
memarg: MemoryImmediate { flags: _, offset },
|
||||
} => {
|
||||
let (flags, base, offset) = prepare_load(*offset, builder, state, environ)?;
|
||||
let loaded = builder.ins().uload8x8(flags, base, offset);
|
||||
state.push1(loaded);
|
||||
}
|
||||
Operator::I32x4Load16x4S {
|
||||
memarg: MemoryImmediate { flags: _, offset },
|
||||
} => {
|
||||
let (flags, base, offset) = prepare_load(*offset, builder, state, environ)?;
|
||||
let loaded = builder.ins().sload16x4(flags, base, offset);
|
||||
state.push1(loaded);
|
||||
}
|
||||
Operator::I32x4Load16x4U {
|
||||
memarg: MemoryImmediate { flags: _, offset },
|
||||
} => {
|
||||
let (flags, base, offset) = prepare_load(*offset, builder, state, environ)?;
|
||||
let loaded = builder.ins().uload16x4(flags, base, offset);
|
||||
state.push1(loaded);
|
||||
}
|
||||
Operator::I64x2Load32x2S {
|
||||
memarg: MemoryImmediate { flags: _, offset },
|
||||
} => {
|
||||
let (flags, base, offset) = prepare_load(*offset, builder, state, environ)?;
|
||||
let loaded = builder.ins().sload32x2(flags, base, offset);
|
||||
state.push1(loaded);
|
||||
}
|
||||
Operator::I64x2Load32x2U {
|
||||
memarg: MemoryImmediate { flags: _, offset },
|
||||
} => {
|
||||
let (flags, base, offset) = prepare_load(*offset, builder, state, environ)?;
|
||||
let loaded = builder.ins().uload32x2(flags, base, offset);
|
||||
state.push1(loaded);
|
||||
}
|
||||
/****************************** Store instructions ***********************************
|
||||
* Wasm specifies an integer alignment flag but we drop it in Cranelift.
|
||||
* The memory base address is provided by the environment.
|
||||
|
|
@ -1518,13 +1561,7 @@ pub fn translate_operator<FE: FuncEnvironment + ?Sized>(
|
|||
| Operator::I32x4WidenLowI16x8S { .. }
|
||||
| Operator::I32x4WidenHighI16x8S { .. }
|
||||
| Operator::I32x4WidenLowI16x8U { .. }
|
||||
| Operator::I32x4WidenHighI16x8U { .. }
|
||||
| Operator::I16x8Load8x8S { .. }
|
||||
| Operator::I16x8Load8x8U { .. }
|
||||
| Operator::I32x4Load16x4S { .. }
|
||||
| Operator::I32x4Load16x4U { .. }
|
||||
| Operator::I64x2Load32x2S { .. }
|
||||
| Operator::I64x2Load32x2U { .. } => {
|
||||
| Operator::I32x4WidenHighI16x8U { .. } => {
|
||||
return Err(wasm_unsupported!("proposed SIMD operator {:?}", op));
|
||||
}
|
||||
};
|
||||
|
|
@ -1696,6 +1733,27 @@ fn get_heap_addr(
|
|||
}
|
||||
}
|
||||
|
||||
/// Prepare for a load; factors out common functionality between load and load_extend operations.
|
||||
fn prepare_load<FE: FuncEnvironment + ?Sized>(
|
||||
offset: u32,
|
||||
builder: &mut FunctionBuilder,
|
||||
state: &mut FuncTranslationState,
|
||||
environ: &mut FE,
|
||||
) -> WasmResult<(MemFlags, Value, Offset32)> {
|
||||
let addr32 = state.pop1();
|
||||
|
||||
// We don't yet support multiple linear memories.
|
||||
let heap = state.get_heap(builder.func, 0, environ)?;
|
||||
let (base, offset) = get_heap_addr(heap, addr32, offset, environ.pointer_type(), builder);
|
||||
|
||||
// Note that we don't set `is_aligned` here, even if the load instruction's
|
||||
// alignment immediate says it's aligned, because WebAssembly's immediate
|
||||
// field is just a hint, while Cranelift's aligned flag needs a guarantee.
|
||||
let flags = MemFlags::new();
|
||||
|
||||
Ok((flags, base, offset.into()))
|
||||
}
|
||||
|
||||
/// Translate a load instruction.
|
||||
fn translate_load<FE: FuncEnvironment + ?Sized>(
|
||||
offset: u32,
|
||||
|
|
@ -1705,17 +1763,8 @@ fn translate_load<FE: FuncEnvironment + ?Sized>(
|
|||
state: &mut FuncTranslationState,
|
||||
environ: &mut FE,
|
||||
) -> WasmResult<()> {
|
||||
let addr32 = state.pop1();
|
||||
// We don't yet support multiple linear memories.
|
||||
let heap = state.get_heap(builder.func, 0, environ)?;
|
||||
let (base, offset) = get_heap_addr(heap, addr32, offset, environ.pointer_type(), builder);
|
||||
// Note that we don't set `is_aligned` here, even if the load instruction's
|
||||
// alignment immediate says it's aligned, because WebAssembly's immediate
|
||||
// field is just a hint, while Cranelift's aligned flag needs a guarantee.
|
||||
let flags = MemFlags::new();
|
||||
let (load, dfg) = builder
|
||||
.ins()
|
||||
.Load(opcode, result_ty, flags, offset.into(), base);
|
||||
let (flags, base, offset) = prepare_load(offset, builder, state, environ)?;
|
||||
let (load, dfg) = builder.ins().Load(opcode, result_ty, flags, offset, base);
|
||||
state.push1(dfg.first_result(load));
|
||||
Ok(())
|
||||
}
|
||||
|
|
|
|||
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