From 174b6a987467e87cc102df47fdf6bcc127a81e3f Mon Sep 17 00:00:00 2001 From: "nnethercote@mozilla.com" Date: Fri, 19 Jun 2009 10:20:26 +0100 Subject: [PATCH] remove LIR_calli and LIR_fcalli (492478, r=edwsmith,jorendorff). --- js/src/nanojit/Assembler.cpp | 6 ------ js/src/nanojit/LIR.cpp | 22 ++------------------- js/src/nanojit/LIR.h | 10 ++-------- js/src/nanojit/LIRopcode.tbl | 16 +++++++-------- js/src/nanojit/NativeSparc.cpp | 24 +++++------------------ js/src/nanojit/Nativei386.cpp | 36 +++++----------------------------- 6 files changed, 22 insertions(+), 92 deletions(-) diff --git a/js/src/nanojit/Assembler.cpp b/js/src/nanojit/Assembler.cpp index 5a426f6413c6..37483d421701 100644 --- a/js/src/nanojit/Assembler.cpp +++ b/js/src/nanojit/Assembler.cpp @@ -1382,12 +1382,10 @@ namespace nanojit } case LIR_fcall: - case LIR_fcalli: #if defined NANOJIT_64BIT case LIR_callh: #endif case LIR_call: - case LIR_calli: { countlir_call(); Register rr = UnknownReg; @@ -1899,10 +1897,6 @@ namespace nanojit break; } } - if (isIndirect()) { - // add one more arg for indirect call address - argc++; - } return argc; } diff --git a/js/src/nanojit/LIR.cpp b/js/src/nanojit/LIR.cpp index 53d3cf7f6441..c7b6eed1ab96 100644 --- a/js/src/nanojit/LIR.cpp +++ b/js/src/nanojit/LIR.cpp @@ -364,9 +364,7 @@ namespace nanojit case LIR_callh: #endif case LIR_call: - case LIR_fcall: - case LIR_calli: - case LIR_fcalli: { + case LIR_fcall: { int argc = ((LInsp)i)->argc(); uintptr_t prev = i - sizeof(LIns) - argc*sizeof(LInsp); NanoAssert( samepage(i, prev) ); @@ -400,7 +398,6 @@ namespace nanojit case LIR_fdiv: case LIR_fneg: case LIR_fcall: - case LIR_fcalli: case LIR_i2f: case LIR_u2f: return true; @@ -1034,10 +1031,9 @@ namespace nanojit LIns* LirBufWriter::insCall(const CallInfo *ci, LInsp args[]) { static const LOpcode k_callmap[] = { LIR_call, LIR_fcall, LIR_call, LIR_callh }; - static const LOpcode k_callimap[] = { LIR_calli, LIR_fcalli, LIR_calli, LIR_skip }; uint32_t argt = ci->_argtypes; - LOpcode op = (ci->isIndirect() ? k_callimap : k_callmap)[argt & 3]; + LOpcode op = k_callmap[argt & 3]; NanoAssert(op != LIR_skip); // LIR_skip here is just an error condition ArgSize sizes[MAXARGS]; @@ -1733,20 +1729,6 @@ namespace nanojit sprintf(s, ")"); break; } - case LIR_fcalli: - case LIR_calli: { - int32_t argc = i->argc(); - sprintf(s, "%s = [%s] ( ", formatRef(i), formatRef(i->arg(argc-1))); - s += strlen(s); - argc--; - for (int32_t j=argc-1; j >= 0; j--) { - s += strlen(s); - sprintf(s, "%s ",formatRef(i->arg(j))); - } - s += strlen(s); - sprintf(s, ")"); - break; - } case LIR_param: { uint32_t arg = i->imm8(); diff --git a/js/src/nanojit/LIR.h b/js/src/nanojit/LIR.h index 189c2a5e2f1d..cd21985a24f9 100644 --- a/js/src/nanojit/LIR.h +++ b/js/src/nanojit/LIR.h @@ -118,14 +118,8 @@ namespace nanojit uint32_t FASTCALL _count_args(uint32_t mask) const; uint32_t get_sizes(ArgSize*) const; - inline bool isInterface() const { - return _address == 2 || _address == 3; /* hack! */ - } - inline bool isIndirect() const { - return _address < 256; - } inline uint32_t FASTCALL count_args() const { - return _count_args(_ARGSIZE_MASK_ANY) + isIndirect(); + return _count_args(_ARGSIZE_MASK_ANY); } inline uint32_t FASTCALL count_iargs() const { return _count_args(_ARGSIZE_MASK_INT); @@ -301,7 +295,7 @@ namespace nanojit bool isCmp() const; bool isCall() const { LOpcode op = LOpcode(firstWord.code & ~LIR64); - return op == LIR_call || op == LIR_calli; + return op == LIR_call; } bool isStore() const { LOpcode op = LOpcode(firstWord.code & ~LIR64); diff --git a/js/src/nanojit/LIRopcode.tbl b/js/src/nanojit/LIRopcode.tbl index 20d5b5900230..a98156f07e4b 100644 --- a/js/src/nanojit/LIRopcode.tbl +++ b/js/src/nanojit/LIRopcode.tbl @@ -62,24 +62,24 @@ /* special operations (must be 0..N) */ OPDEF(start, 0, 0) -OPDEF(unused0a, 1, 0) +OPDEF(unused1, 1, 0) OPDEF(skip, 2, 0) -OPDEF(unused0b, 3, 0) -OPDEF(unused0c, 4, 0) +OPDEF(unused3, 3, 0) +OPDEF(unused4, 4, 0) -OPDEF(unused1, 5, 2) -OPDEF(unused2, 6, 2) +OPDEF(unused5, 5, 2) +OPDEF(unused6, 6, 2) /* non-pure operations */ OPDEF(addp, 7, 2) OPDEF(param, 8, 0) -OPDEF(unused4b, 9, 2) +OPDEF(unused9, 9, 2) OPDEF(ld, 10, 2) // 32-bit load OPDEF(alloc, 11, 0) // alloca some stack space OPDEF(sti, 12, 2) // 32-bit store OPDEF(ret, 13, 1) OPDEF(live, 14, 1) // extend live range of reference -OPDEF(calli, 15, 0) // indirect call +OPDEF(unused15, 15, 0) // indirect call OPDEF(call, 16, 0) // subroutine call returning a 32-bit value /* guards */ @@ -195,8 +195,8 @@ OPDEF64(stqi, LIR_sti, 2) // quad store OPDEF64(fret, LIR_ret, 1) OPDEF64(unused14_64, 14, 2) +OPDEF64(unused15_64, 15, 2) -OPDEF64(fcalli, LIR_calli, 0) OPDEF64(fcall, LIR_call, 0) // subroutine call returning quad OPDEF64(unused17_64, 17, 2) diff --git a/js/src/nanojit/NativeSparc.cpp b/js/src/nanojit/NativeSparc.cpp index f33c76818bd4..fc6415ce0a5a 100644 --- a/js/src/nanojit/NativeSparc.cpp +++ b/js/src/nanojit/NativeSparc.cpp @@ -147,25 +147,11 @@ namespace nanojit ArgSize sizes[10]; uint32_t argc = call->get_sizes(sizes); - if (ins->isop(LIR_call) || ins->isop(LIR_fcall)) { - verbose_only(if (_verbose) - outputf(" %p:", _nIns); - ) - CALL(call); - } - else { - argc--; - Register r = findSpecificRegFor(ins->arg(argc), I0); - NanoAssert(ins->isop(LIR_calli) || ins->isop(LIR_fcalli)); - JMPL(G0, I0, 15); - } - - bool imt = call->isInterface(); - - if(imt) { - argc--; - findSpecificRegFor(ins->arg(argc), O3); - } + NanoAssert(ins->isop(LIR_call) || ins->isop(LIR_fcall)); + verbose_only(if (_verbose) + outputf(" %p:", _nIns); + ) + CALL(call); uint32_t GPRIndex = O0; uint32_t offset = kLinkageAreaSize; // start of parameters stack postion. diff --git a/js/src/nanojit/Nativei386.cpp b/js/src/nanojit/Nativei386.cpp index d1b8c58bd991..234ebf6f1ace 100644 --- a/js/src/nanojit/Nativei386.cpp +++ b/js/src/nanojit/Nativei386.cpp @@ -171,11 +171,7 @@ namespace nanojit const CallInfo* call = ins->callInfo(); // must be signed, not unsigned uint32_t iargs = call->count_iargs(); - int32_t fargs = call->count_args() - iargs - call->isIndirect(); - - bool imt = call->isInterface(); - if (imt) - iargs --; + int32_t fargs = call->count_args() - iargs; uint32_t max_regs = max_abi_regs[call->_abi]; if (max_regs > iargs) @@ -205,19 +201,8 @@ namespace nanojit } } - bool indirect = false; - if (ins->isop(LIR_call) || ins->isop(LIR_fcall)) { - CALL(call); - } - else { - // indirect call. x86 Calling conventions don't use EAX as an - // argument, and do use EAX as a return value. We need a register - // for the address to call, so we use EAX since it will always be - // available - NanoAssert(ins->isop(LIR_calli) || ins->isop(LIR_fcalli)); - CALLr(call, EAX); - indirect = true; - } + NanoAssert(ins->isop(LIR_call) || ins->isop(LIR_fcall)); + CALL(call); // make sure fpu stack is empty before call (restoreCallerSaved) NanoAssert(_allocator.isFree(FST0)); @@ -228,17 +213,6 @@ namespace nanojit ArgSize sizes[2*MAXARGS]; uint32_t argc = call->get_sizes(sizes); - if (indirect) { - argc--; - asm_arg(ARGSIZE_LO, ins->arg(argc), EAX); - } - - if (imt) { - // interface thunk calling convention: put iid in EDX - NanoAssert(call->_abi == ABI_CDECL); - argc--; - asm_arg(ARGSIZE_LO, ins->arg(argc), EDX); - } for(uint32_t i=0; i < argc; i++) { @@ -361,10 +335,10 @@ namespace nanojit { uint32_t op = i->opcode(); int prefer = allow; - if (op == LIR_call || op == LIR_calli) { + if (op == LIR_call) { prefer &= rmask(retRegs[0]); } - else if (op == LIR_fcall || op == LIR_fcalli) { + else if (op == LIR_fcall) { prefer &= rmask(FST0); } else if (op == LIR_param) {