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@ -1,753 +0,0 @@
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From a1e0363c7402f7aa58e24e0e6dfa447ebabc1910 Mon Sep 17 00:00:00 2001
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From: serge-sans-paille <sguelton@redhat.com>
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Date: Wed, 30 Sep 2020 11:35:00 +0200
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Subject: [PATCH] Fix limit behavior of dynamic alloca
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When the allocation size is 0, we shouldn't probe. Within [1, PAGE_SIZE], we
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should probe once etc.
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This fixes https://bugs.llvm.org/show_bug.cgi?id=47657
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Differential Revision: https://reviews.llvm.org/D88548
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(cherry picked from commit 9573c9f2a363da71b2c07a3add4e52721e6028a0)
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Also contains the patches:
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https://github.com/llvm/llvm-project/commit/aac36687f7978f33751daf2870b5c812124ebfaf
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https://github.com/llvm/llvm-project/commit/bbe6cbbed8c7460a7e8477373b9250543362e771
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These 3 patches have been merged in the 11 branch
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and should be part of the 11.0.1 release
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Index: llvm-toolchain-11-11.0.0/llvm/lib/Target/X86/X86FrameLowering.cpp
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===================================================================
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--- llvm-toolchain-11-11.0.0.orig/llvm/lib/Target/X86/X86FrameLowering.cpp
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+++ llvm-toolchain-11-11.0.0/llvm/lib/Target/X86/X86FrameLowering.cpp
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@@ -586,29 +586,55 @@ void X86FrameLowering::emitStackProbeInl
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const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
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uint64_t ProbeChunk = StackProbeSize * 8;
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+ uint64_t MaxAlign =
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+ TRI->needsStackRealignment(MF) ? calculateMaxStackAlign(MF) : 0;
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+
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// Synthesize a loop or unroll it, depending on the number of iterations.
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+ // BuildStackAlignAND ensures that only MaxAlign % StackProbeSize bits left
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+ // between the unaligned rsp and current rsp
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if (Offset > ProbeChunk) {
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- emitStackProbeInlineGenericLoop(MF, MBB, MBBI, DL, Offset);
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+ emitStackProbeInlineGenericLoop(MF, MBB, MBBI, DL, Offset,
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+ MaxAlign % StackProbeSize);
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} else {
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- emitStackProbeInlineGenericBlock(MF, MBB, MBBI, DL, Offset);
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+ emitStackProbeInlineGenericBlock(MF, MBB, MBBI, DL, Offset,
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+ MaxAlign % StackProbeSize);
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}
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}
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void X86FrameLowering::emitStackProbeInlineGenericBlock(
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MachineFunction &MF, MachineBasicBlock &MBB,
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- MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
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- uint64_t Offset) const {
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+ MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset,
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+ uint64_t AlignOffset) const {
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const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
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const X86TargetLowering &TLI = *STI.getTargetLowering();
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const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, Offset);
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const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
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const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
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+
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uint64_t CurrentOffset = 0;
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- // 0 Thanks to return address being saved on the stack
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- uint64_t CurrentProbeOffset = 0;
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- // For the first N - 1 pages, just probe. I tried to take advantage of
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+ assert(AlignOffset < StackProbeSize);
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+
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+ // If the offset is so small it fits within a page, there's nothing to do.
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+ if (StackProbeSize < Offset + AlignOffset) {
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+
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+ MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
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+ .addReg(StackPtr)
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+ .addImm(StackProbeSize - AlignOffset)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+ MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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+
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+ addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MovMIOpc))
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+ .setMIFlag(MachineInstr::FrameSetup),
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+ StackPtr, false, 0)
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+ .addImm(0)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+ NumFrameExtraProbe++;
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+ CurrentOffset = StackProbeSize - AlignOffset;
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+ }
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+
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+ // For the next N - 1 pages, just probe. I tried to take advantage of
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// natural probes but it implies much more logic and there was very few
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// interesting natural probes to interleave.
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while (CurrentOffset + StackProbeSize < Offset) {
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@@ -626,9 +652,9 @@ void X86FrameLowering::emitStackProbeInl
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.setMIFlag(MachineInstr::FrameSetup);
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NumFrameExtraProbe++;
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CurrentOffset += StackProbeSize;
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- CurrentProbeOffset += StackProbeSize;
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}
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+ // No need to probe the tail, it is smaller than a Page.
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uint64_t ChunkSize = Offset - CurrentOffset;
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MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
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.addReg(StackPtr)
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@@ -639,8 +665,8 @@ void X86FrameLowering::emitStackProbeInl
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void X86FrameLowering::emitStackProbeInlineGenericLoop(
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MachineFunction &MF, MachineBasicBlock &MBB,
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- MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
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- uint64_t Offset) const {
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+ MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset,
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+ uint64_t AlignOffset) const {
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assert(Offset && "null offset");
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const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
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@@ -648,6 +674,26 @@ void X86FrameLowering::emitStackProbeInl
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const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
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const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
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+ if (AlignOffset) {
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+ if (AlignOffset < StackProbeSize) {
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+ // Perform a first smaller allocation followed by a probe.
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+ const unsigned SUBOpc = getSUBriOpcode(Uses64BitFramePtr, AlignOffset);
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+ MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(SUBOpc), StackPtr)
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+ .addReg(StackPtr)
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+ .addImm(AlignOffset)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+ MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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+
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+ addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MovMIOpc))
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+ .setMIFlag(MachineInstr::FrameSetup),
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+ StackPtr, false, 0)
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+ .addImm(0)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+ NumFrameExtraProbe++;
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+ Offset -= AlignOffset;
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+ }
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+ }
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+
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// Synthesize a loop
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NumFrameLoopProbe++;
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const BasicBlock *LLVM_BB = MBB.getBasicBlock();
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@@ -666,8 +712,8 @@ void X86FrameLowering::emitStackProbeInl
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// save loop bound
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{
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- const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, Offset);
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- BuildMI(MBB, MBBI, DL, TII.get(Opc), FinalStackProbed)
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+ const unsigned SUBOpc = getSUBriOpcode(Uses64BitFramePtr, Offset);
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+ BuildMI(MBB, MBBI, DL, TII.get(SUBOpc), FinalStackProbed)
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.addReg(FinalStackProbed)
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.addImm(Offset / StackProbeSize * StackProbeSize)
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.setMIFlag(MachineInstr::FrameSetup);
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@@ -675,8 +721,8 @@ void X86FrameLowering::emitStackProbeInl
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// allocate a page
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{
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- const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, StackProbeSize);
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- BuildMI(testMBB, DL, TII.get(Opc), StackPtr)
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+ const unsigned SUBOpc = getSUBriOpcode(Uses64BitFramePtr, StackProbeSize);
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+ BuildMI(testMBB, DL, TII.get(SUBOpc), StackPtr)
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.addReg(StackPtr)
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.addImm(StackProbeSize)
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.setMIFlag(MachineInstr::FrameSetup);
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@@ -1052,13 +1098,149 @@ void X86FrameLowering::BuildStackAlignAN
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uint64_t MaxAlign) const {
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uint64_t Val = -MaxAlign;
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unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
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- MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
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- .addReg(Reg)
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- .addImm(Val)
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- .setMIFlag(MachineInstr::FrameSetup);
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- // The EFLAGS implicit def is dead.
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- MI->getOperand(3).setIsDead();
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+ MachineFunction &MF = *MBB.getParent();
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+ const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
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+ const X86TargetLowering &TLI = *STI.getTargetLowering();
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+ const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
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+ const bool EmitInlineStackProbe = TLI.hasInlineStackProbe(MF);
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+
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+ // We want to make sure that (in worst case) less than StackProbeSize bytes
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+ // are not probed after the AND. This assumption is used in
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+ // emitStackProbeInlineGeneric.
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+ if (Reg == StackPtr && EmitInlineStackProbe && MaxAlign >= StackProbeSize) {
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+ {
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+ NumFrameLoopProbe++;
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+ MachineBasicBlock *entryMBB =
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+ MF.CreateMachineBasicBlock(MBB.getBasicBlock());
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+ MachineBasicBlock *headMBB =
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+ MF.CreateMachineBasicBlock(MBB.getBasicBlock());
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+ MachineBasicBlock *bodyMBB =
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+ MF.CreateMachineBasicBlock(MBB.getBasicBlock());
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+ MachineBasicBlock *footMBB =
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+ MF.CreateMachineBasicBlock(MBB.getBasicBlock());
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+
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+ MachineFunction::iterator MBBIter = MBB.getIterator();
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+ MF.insert(MBBIter, entryMBB);
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+ MF.insert(MBBIter, headMBB);
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+ MF.insert(MBBIter, bodyMBB);
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+ MF.insert(MBBIter, footMBB);
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+ const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
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+ Register FinalStackProbed = Uses64BitFramePtr ? X86::R11 : X86::R11D;
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+
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+ // Setup entry block
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+ {
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+
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+ entryMBB->splice(entryMBB->end(), &MBB, MBB.begin(), MBBI);
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+ BuildMI(entryMBB, DL, TII.get(TargetOpcode::COPY), FinalStackProbed)
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+ .addReg(StackPtr)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+ MachineInstr *MI =
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+ BuildMI(entryMBB, DL, TII.get(AndOp), FinalStackProbed)
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+ .addReg(FinalStackProbed)
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+ .addImm(Val)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+
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+ // The EFLAGS implicit def is dead.
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+ MI->getOperand(3).setIsDead();
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+
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+ BuildMI(entryMBB, DL,
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+ TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))
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+ .addReg(FinalStackProbed)
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+ .addReg(StackPtr)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+ BuildMI(entryMBB, DL, TII.get(X86::JCC_1))
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+ .addMBB(&MBB)
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+ .addImm(X86::COND_E)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+ entryMBB->addSuccessor(headMBB);
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+ entryMBB->addSuccessor(&MBB);
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+ }
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+
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+ // Loop entry block
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+
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+ {
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+ const unsigned SUBOpc =
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+ getSUBriOpcode(Uses64BitFramePtr, StackProbeSize);
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+ BuildMI(headMBB, DL, TII.get(SUBOpc), StackPtr)
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+ .addReg(StackPtr)
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+ .addImm(StackProbeSize)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+
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+ BuildMI(headMBB, DL,
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+ TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))
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+ .addReg(FinalStackProbed)
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+ .addReg(StackPtr)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+
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+ // jump
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+ BuildMI(headMBB, DL, TII.get(X86::JCC_1))
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+ .addMBB(footMBB)
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+ .addImm(X86::COND_B)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+
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+ headMBB->addSuccessor(bodyMBB);
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+ headMBB->addSuccessor(footMBB);
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+ }
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+
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+ // setup loop body
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+ {
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+ addRegOffset(BuildMI(bodyMBB, DL, TII.get(MovMIOpc))
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+ .setMIFlag(MachineInstr::FrameSetup),
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+ StackPtr, false, 0)
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+ .addImm(0)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+
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+ const unsigned SUBOpc =
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+ getSUBriOpcode(Uses64BitFramePtr, StackProbeSize);
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+ BuildMI(bodyMBB, DL, TII.get(SUBOpc), StackPtr)
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+ .addReg(StackPtr)
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+ .addImm(StackProbeSize)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+
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+ // cmp with stack pointer bound
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+ BuildMI(bodyMBB, DL,
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+ TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))
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+ .addReg(FinalStackProbed)
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+ .addReg(StackPtr)
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+ .setMIFlag(MachineInstr::FrameSetup);
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+
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+ // jump
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+ BuildMI(bodyMBB, DL, TII.get(X86::JCC_1))
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+ .addMBB(bodyMBB)
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+ .addImm(X86::COND_B)
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+ .setMIFlag(MachineInstr::FrameSetup);
|
|
|
|
|
+ bodyMBB->addSuccessor(bodyMBB);
|
|
|
|
|
+ bodyMBB->addSuccessor(footMBB);
|
|
|
|
|
+ }
|
|
|
|
|
+
|
|
|
|
|
+ // setup loop footer
|
|
|
|
|
+ {
|
|
|
|
|
+ BuildMI(footMBB, DL, TII.get(TargetOpcode::COPY), StackPtr)
|
|
|
|
|
+ .addReg(FinalStackProbed)
|
|
|
|
|
+ .setMIFlag(MachineInstr::FrameSetup);
|
|
|
|
|
+ addRegOffset(BuildMI(footMBB, DL, TII.get(MovMIOpc))
|
|
|
|
|
+ .setMIFlag(MachineInstr::FrameSetup),
|
|
|
|
|
+ StackPtr, false, 0)
|
|
|
|
|
+ .addImm(0)
|
|
|
|
|
+ .setMIFlag(MachineInstr::FrameSetup);
|
|
|
|
|
+ footMBB->addSuccessor(&MBB);
|
|
|
|
|
+ }
|
|
|
|
|
+
|
|
|
|
|
+ recomputeLiveIns(*headMBB);
|
|
|
|
|
+ recomputeLiveIns(*bodyMBB);
|
|
|
|
|
+ recomputeLiveIns(*footMBB);
|
|
|
|
|
+ recomputeLiveIns(MBB);
|
|
|
|
|
+ }
|
|
|
|
|
+ } else {
|
|
|
|
|
+ MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
|
|
|
|
|
+ .addReg(Reg)
|
|
|
|
|
+ .addImm(Val)
|
|
|
|
|
+ .setMIFlag(MachineInstr::FrameSetup);
|
|
|
|
|
+
|
|
|
|
|
+ // The EFLAGS implicit def is dead.
|
|
|
|
|
+ MI->getOperand(3).setIsDead();
|
|
|
|
|
+ }
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool X86FrameLowering::has128ByteRedZone(const MachineFunction& MF) const {
|
|
|
|
|
Index: llvm-toolchain-11-11.0.0/llvm/lib/Target/X86/X86FrameLowering.h
|
|
|
|
|
===================================================================
|
|
|
|
|
--- llvm-toolchain-11-11.0.0.orig/llvm/lib/Target/X86/X86FrameLowering.h
|
|
|
|
|
+++ llvm-toolchain-11-11.0.0/llvm/lib/Target/X86/X86FrameLowering.h
|
|
|
|
|
@@ -213,14 +213,14 @@ private:
|
|
|
|
|
void emitStackProbeInlineGenericBlock(MachineFunction &MF,
|
|
|
|
|
MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
- const DebugLoc &DL,
|
|
|
|
|
- uint64_t Offset) const;
|
|
|
|
|
+ const DebugLoc &DL, uint64_t Offset,
|
|
|
|
|
+ uint64_t Align) const;
|
|
|
|
|
|
|
|
|
|
void emitStackProbeInlineGenericLoop(MachineFunction &MF,
|
|
|
|
|
MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
- const DebugLoc &DL,
|
|
|
|
|
- uint64_t Offset) const;
|
|
|
|
|
+ const DebugLoc &DL, uint64_t Offset,
|
|
|
|
|
+ uint64_t Align) const;
|
|
|
|
|
|
|
|
|
|
/// Emit a stub to later inline the target stack probe.
|
|
|
|
|
MachineInstr *emitStackProbeInlineStub(MachineFunction &MF,
|
|
|
|
|
Index: llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-large-large-align.ll
|
|
|
|
|
===================================================================
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-large-large-align.ll
|
|
|
|
|
@@ -0,0 +1,88 @@
|
|
|
|
|
+; RUN: llc < %s | FileCheck %s
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
|
|
|
|
+target triple = "x86_64-unknown-linux-gnu"
|
|
|
|
|
+
|
|
|
|
|
+define i32 @foo_noprotect() local_unnamed_addr {
|
|
|
|
|
+; CHECK-LABEL: foo_noprotect:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: andq $-4096, %rsp # imm = 0xF000
|
|
|
|
|
+; CHECK-NEXT: subq $73728, %rsp # imm = 0x12000
|
|
|
|
|
+; CHECK-NEXT: movl $1, 392(%rsp)
|
|
|
|
|
+; CHECK-NEXT: movl $1, 28792(%rsp)
|
|
|
|
|
+; CHECK-NEXT: movl (%rsp), %eax
|
|
|
|
|
+; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i64 18000, align 4096
|
|
|
|
|
+ %b0 = getelementptr inbounds i32, i32* %a, i64 98
|
|
|
|
|
+ %b1 = getelementptr inbounds i32, i32* %a, i64 7198
|
|
|
|
|
+ store volatile i32 1, i32* %b0
|
|
|
|
|
+ store volatile i32 1, i32* %b1
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ ret i32 %c
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+define i32 @foo_protect() local_unnamed_addr #0 {
|
|
|
|
|
+; CHECK-LABEL: foo_protect:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: andq $-4096, %r11 # imm = 0xF000
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: je .LBB1_4
|
|
|
|
|
+; CHECK-NEXT:# %bb.1:
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: jb .LBB1_3
|
|
|
|
|
+; CHECK-NEXT:.LBB1_2: # =>This Inner Loop Header: Depth=1
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: jb .LBB1_2
|
|
|
|
|
+; CHECK-NEXT:.LBB1_3:
|
|
|
|
|
+; CHECK-NEXT: movq %r11, %rsp
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT:.LBB1_4:
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: subq $73728, %r11 # imm = 0x12000
|
|
|
|
|
+; CHECK-NEXT:.LBB1_5: # =>This Inner Loop Header: Depth=1
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: cmpq %r11, %rsp
|
|
|
|
|
+; CHECK-NEXT: jne .LBB1_5
|
|
|
|
|
+; CHECK-NEXT:# %bb.6:
|
|
|
|
|
+; CHECK-NEXT: movl $1, 392(%rsp)
|
|
|
|
|
+; CHECK-NEXT: movl $1, 28792(%rsp)
|
|
|
|
|
+; CHECK-NEXT: movl (%rsp), %eax
|
|
|
|
|
+; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i64 18000, align 4096
|
|
|
|
|
+ %b0 = getelementptr inbounds i32, i32* %a, i64 98
|
|
|
|
|
+ %b1 = getelementptr inbounds i32, i32* %a, i64 7198
|
|
|
|
|
+ store volatile i32 1, i32* %b0
|
|
|
|
|
+ store volatile i32 1, i32* %b1
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ ret i32 %c
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+attributes #0 = {"probe-stack"="inline-asm"}
|
|
|
|
|
Index: llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-no-free-probe.ll
|
|
|
|
|
===================================================================
|
|
|
|
|
--- llvm-toolchain-11-11.0.0.orig/llvm/test/CodeGen/X86/stack-clash-no-free-probe.ll
|
|
|
|
|
+++ /dev/null
|
|
|
|
|
@@ -1,27 +0,0 @@
|
|
|
|
|
-; RUN: llc < %s | FileCheck %s
|
|
|
|
|
-
|
|
|
|
|
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
|
|
|
|
-target triple = "x86_64-unknown-linux-gnu"
|
|
|
|
|
-
|
|
|
|
|
-define i32 @foo(i64 %i) local_unnamed_addr #0 {
|
|
|
|
|
-; CHECK-LABEL: foo:
|
|
|
|
|
-; CHECK: # %bb.0:
|
|
|
|
|
-; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
-; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
-; CHECK-NEXT: subq $3784, %rsp # imm = 0xEC8
|
|
|
|
|
-; CHECK-NEXT: .cfi_def_cfa_offset 7888
|
|
|
|
|
-; CHECK-NEXT: movl $1, -128(%rsp,%rdi,4)
|
|
|
|
|
-; CHECK-NEXT: movl -128(%rsp), %eax
|
|
|
|
|
-; CHECK-NEXT: addq $7880, %rsp # imm = 0x1EC8
|
|
|
|
|
-; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
|
|
|
-; CHECK-NEXT: retq
|
|
|
|
|
-
|
|
|
|
|
- %a = alloca i32, i32 2000, align 16
|
|
|
|
|
- %b = getelementptr inbounds i32, i32* %a, i64 %i
|
|
|
|
|
- store volatile i32 1, i32* %b
|
|
|
|
|
- %c = load volatile i32, i32* %a
|
|
|
|
|
- ret i32 %c
|
|
|
|
|
-}
|
|
|
|
|
-
|
|
|
|
|
-attributes #0 = {"probe-stack"="inline-asm"}
|
|
|
|
|
-
|
|
|
|
|
Index: llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
|
|
|
|
|
===================================================================
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
|
|
|
|
|
@@ -0,0 +1,135 @@
|
|
|
|
|
+; RUN: llc < %s | FileCheck %s
|
|
|
|
|
+
|
|
|
|
|
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
|
|
|
|
+target triple = "x86_64-unknown-linux-gnu"
|
|
|
|
|
+
|
|
|
|
|
+; | case1 | alloca + align < probe_size
|
|
|
|
|
+define i32 @foo1(i64 %i) local_unnamed_addr #0 {
|
|
|
|
|
+; CHECK-LABEL: foo1:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: andq $-64, %rsp
|
|
|
|
|
+; CHECK-NEXT: subq $832, %rsp # imm = 0x340
|
|
|
|
|
+; CHECK-NEXT: movl $1, (%rsp,%rdi,4)
|
|
|
|
|
+; CHECK-NEXT: movl (%rsp), %eax
|
|
|
|
|
+; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i32 200, align 64
|
|
|
|
|
+ %b = getelementptr inbounds i32, i32* %a, i64 %i
|
|
|
|
|
+ store volatile i32 1, i32* %b
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ ret i32 %c
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+; | case2 | alloca > probe_size, align > probe_size
|
|
|
|
|
+define i32 @foo2(i64 %i) local_unnamed_addr #0 {
|
|
|
|
|
+; CHECK-LABEL: foo2:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: andq $-2048, %rsp # imm = 0xF800
|
|
|
|
|
+; CHECK-NEXT: subq $2048, %rsp # imm = 0x800
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: subq $2048, %rsp # imm = 0x800
|
|
|
|
|
+; CHECK-NEXT: movl $1, (%rsp,%rdi,4)
|
|
|
|
|
+; CHECK-NEXT: movl (%rsp), %eax
|
|
|
|
|
+; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i32 2000, align 2048
|
|
|
|
|
+ %b = getelementptr inbounds i32, i32* %a, i64 %i
|
|
|
|
|
+ store volatile i32 1, i32* %b
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ ret i32 %c
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+; | case3 | alloca < probe_size, align < probe_size, alloca + align > probe_size
|
|
|
|
|
+define i32 @foo3(i64 %i) local_unnamed_addr #0 {
|
|
|
|
|
+; CHECK-LABEL: foo3:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: andq $-1024, %rsp # imm = 0xFC00
|
|
|
|
|
+; CHECK-NEXT: subq $3072, %rsp # imm = 0xC00
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: subq $1024, %rsp # imm = 0x400
|
|
|
|
|
+; CHECK-NEXT: movl $1, (%rsp,%rdi,4)
|
|
|
|
|
+; CHECK-NEXT: movl (%rsp), %eax
|
|
|
|
|
+; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i32 1000, align 1024
|
|
|
|
|
+ %b = getelementptr inbounds i32, i32* %a, i64 %i
|
|
|
|
|
+ store volatile i32 1, i32* %b
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ ret i32 %c
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+; | case4 | alloca + probe_size < probe_size, followed by dynamic alloca
|
|
|
|
|
+define i32 @foo4(i64 %i) local_unnamed_addr #0 {
|
|
|
|
|
+; CHECK-LABEL: foo4:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: pushq %rbx
|
|
|
|
|
+; CHECK-NEXT: andq $-64, %rsp
|
|
|
|
|
+; CHECK-NEXT: subq $896, %rsp # imm = 0x380
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbx
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbx, -24
|
|
|
|
|
+; CHECK-NEXT: movl $1, (%rbx,%rdi,4)
|
|
|
|
|
+; CHECK-NEXT: movl (%rbx), %ecx
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rax
|
|
|
|
|
+; CHECK-NEXT: leaq 15(,%rcx,4), %rcx
|
|
|
|
|
+; CHECK-NEXT: andq $-16, %rcx
|
|
|
|
|
+; CHECK-NEXT: subq %rcx, %rax
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %rax
|
|
|
|
|
+; CHECK-NEXT: jge .LBB3_3
|
|
|
|
|
+; CHECK-NEXT:.LBB3_2: # =>This Inner Loop Header: Depth=1
|
|
|
|
|
+; CHECK-NEXT: xorq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %rax
|
|
|
|
|
+; CHECK-NEXT: jl .LBB3_2
|
|
|
|
|
+; CHECK-NEXT:.LBB3_3:
|
|
|
|
|
+; CHECK-NEXT: andq $-64, %rax
|
|
|
|
|
+; CHECK-NEXT: movq %rax, %rsp
|
|
|
|
|
+; CHECK-NEXT: movl (%rax), %eax
|
|
|
|
|
+; CHECK-NEXT: leaq -8(%rbp), %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbx
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i32 200, align 64
|
|
|
|
|
+ %b = getelementptr inbounds i32, i32* %a, i64 %i
|
|
|
|
|
+ store volatile i32 1, i32* %b
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ %d = alloca i32, i32 %c, align 64
|
|
|
|
|
+ %e = load volatile i32, i32* %d
|
|
|
|
|
+ ret i32 %e
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+attributes #0 = {"probe-stack"="inline-asm"}
|
|
|
|
|
+
|
|
|
|
|
Index: llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-small-large-align.ll
|
|
|
|
|
===================================================================
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-small-large-align.ll
|
|
|
|
|
@@ -0,0 +1,83 @@
|
|
|
|
|
+; RUN: llc < %s | FileCheck %s
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
|
|
|
|
+target triple = "x86_64-unknown-linux-gnu"
|
|
|
|
|
+
|
|
|
|
|
+define i32 @foo_noprotect() local_unnamed_addr {
|
|
|
|
|
+; CHECK-LABEL: foo_noprotect:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: andq $-65536, %rsp
|
|
|
|
|
+; CHECK-NEXT: subq $65536, %rsp
|
|
|
|
|
+; CHECK-NEXT: movl $1, 392(%rsp)
|
|
|
|
|
+; CHECK-NEXT: movl (%rsp), %eax
|
|
|
|
|
+; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i64 100, align 65536
|
|
|
|
|
+ %b = getelementptr inbounds i32, i32* %a, i64 98
|
|
|
|
|
+ store volatile i32 1, i32* %b
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ ret i32 %c
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+define i32 @foo_protect() local_unnamed_addr #0 {
|
|
|
|
|
+; CHECK-LABEL: foo_protect:
|
|
|
|
|
+; CHECK: # %bb.0:
|
|
|
|
|
+; CHECK-NEXT: pushq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
|
|
|
+; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa_register %rbp
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: andq $-65536, %r11 # imm = 0xFFFF0000
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: je .LBB1_4
|
|
|
|
|
+; CHECK-NEXT:# %bb.1:
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: jb .LBB1_3
|
|
|
|
|
+; CHECK-NEXT:.LBB1_2: # =>This Inner Loop Header: Depth=1
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: cmpq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: jb .LBB1_2
|
|
|
|
|
+; CHECK-NEXT:.LBB1_3:
|
|
|
|
|
+; CHECK-NEXT: movq %r11, %rsp
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT:.LBB1_4:
|
|
|
|
|
+; CHECK-NEXT: movq %rsp, %r11
|
|
|
|
|
+; CHECK-NEXT: subq $65536, %r11 # imm = 0x10000
|
|
|
|
|
+; CHECK-NEXT:.LBB1_5: # =>This Inner Loop Header: Depth=1
|
|
|
|
|
+; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
+; CHECK-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-NEXT: cmpq %r11, %rsp
|
|
|
|
|
+; CHECK-NEXT: jne .LBB1_5
|
|
|
|
|
+; CHECK-NEXT:# %bb.6:
|
|
|
|
|
+; CHECK-NEXT: movl $1, 392(%rsp)
|
|
|
|
|
+; CHECK-NEXT: movl (%rsp), %eax
|
|
|
|
|
+; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
+; CHECK-NEXT: popq %rbp
|
|
|
|
|
+; CHECK-NEXT: .cfi_def_cfa %rsp, 8
|
|
|
|
|
+; CHECK-NEXT: retq
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+ %a = alloca i32, i64 100, align 65536
|
|
|
|
|
+ %b = getelementptr inbounds i32, i32* %a, i64 98
|
|
|
|
|
+ store volatile i32 1, i32* %b
|
|
|
|
|
+ %c = load volatile i32, i32* %a
|
|
|
|
|
+ ret i32 %c
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+attributes #0 = {"probe-stack"="inline-asm"}
|
|
|
|
|
Index: llvm-toolchain-11-11.0.0/llvm/lib/Target/X86/X86ISelLowering.cpp
|
|
|
|
|
===================================================================
|
|
|
|
|
--- llvm-toolchain-11-11.0.0.orig/llvm/lib/Target/X86/X86ISelLowering.cpp
|
|
|
|
|
+++ llvm-toolchain-11-11.0.0/llvm/lib/Target/X86/X86ISelLowering.cpp
|
|
|
|
|
@@ -31876,7 +31876,7 @@ X86TargetLowering::EmitLoweredProbedAllo
|
|
|
|
|
|
|
|
|
|
BuildMI(testMBB, DL, TII->get(X86::JCC_1))
|
|
|
|
|
.addMBB(tailMBB)
|
|
|
|
|
- .addImm(X86::COND_L);
|
|
|
|
|
+ .addImm(X86::COND_GE);
|
|
|
|
|
testMBB->addSuccessor(blockMBB);
|
|
|
|
|
testMBB->addSuccessor(tailMBB);
|
|
|
|
|
|
|
|
|
|
@@ -31892,9 +31892,9 @@ X86TargetLowering::EmitLoweredProbedAllo
|
|
|
|
|
//
|
|
|
|
|
// The property we want to enforce is to never have more than [page alloc] between two probes.
|
|
|
|
|
|
|
|
|
|
- const unsigned MovMIOpc =
|
|
|
|
|
- TFI.Uses64BitFramePtr ? X86::MOV64mi32 : X86::MOV32mi;
|
|
|
|
|
- addRegOffset(BuildMI(blockMBB, DL, TII->get(MovMIOpc)), physSPReg, false, 0)
|
|
|
|
|
+ const unsigned XORMIOpc =
|
|
|
|
|
+ TFI.Uses64BitFramePtr ? X86::XOR64mi8 : X86::XOR32mi8;
|
|
|
|
|
+ addRegOffset(BuildMI(blockMBB, DL, TII->get(XORMIOpc)), physSPReg, false, 0)
|
|
|
|
|
.addImm(0);
|
|
|
|
|
|
|
|
|
|
BuildMI(blockMBB, DL,
|
|
|
|
|
Index: llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
|
|
|
|
|
===================================================================
|
|
|
|
|
--- llvm-toolchain-11-11.0.0.orig/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
|
|
|
|
|
+++ llvm-toolchain-11-11.0.0/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
|
|
|
|
|
@@ -24,12 +24,12 @@ attributes #0 = {"probe-stack"="inline-
|
|
|
|
|
; CHECK-X86-64-NEXT: andq $-16, %rcx
|
|
|
|
|
; CHECK-X86-64-NEXT: subq %rcx, %rax
|
|
|
|
|
; CHECK-X86-64-NEXT: cmpq %rsp, %rax
|
|
|
|
|
-; CHECK-X86-64-NEXT: jl .LBB0_3
|
|
|
|
|
+; CHECK-X86-64-NEXT: jge .LBB0_3
|
|
|
|
|
; CHECK-X86-64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
|
|
|
|
|
-; CHECK-X86-64-NEXT: movq $0, (%rsp)
|
|
|
|
|
+; CHECK-X86-64-NEXT: xorq $0, (%rsp)
|
|
|
|
|
; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000
|
|
|
|
|
; CHECK-X86-64-NEXT: cmpq %rsp, %rax
|
|
|
|
|
-; CHECK-X86-64-NEXT: jge .LBB0_2
|
|
|
|
|
+; CHECK-X86-64-NEXT: jl .LBB0_2
|
|
|
|
|
; CHECK-X86-64-NEXT: .LBB0_3:
|
|
|
|
|
; CHECK-X86-64-NEXT: movq %rax, %rsp
|
|
|
|
|
; CHECK-X86-64-NEXT: movl $1, 4792(%rax)
|
|
|
|
|
@@ -54,12 +54,12 @@ attributes #0 = {"probe-stack"="inline-
|
|
|
|
|
; CHECK-X86-32-NEXT: andl $-16, %ecx
|
|
|
|
|
; CHECK-X86-32-NEXT: subl %ecx, %eax
|
|
|
|
|
; CHECK-X86-32-NEXT: cmpl %esp, %eax
|
|
|
|
|
-; CHECK-X86-32-NEXT: jl .LBB0_3
|
|
|
|
|
+; CHECK-X86-32-NEXT: jge .LBB0_3
|
|
|
|
|
; CHECK-X86-32-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
|
|
|
|
|
-; CHECK-X86-32-NEXT: movl $0, (%esp)
|
|
|
|
|
+; CHECK-X86-32-NEXT: xorl $0, (%esp)
|
|
|
|
|
; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000
|
|
|
|
|
; CHECK-X86-32-NEXT: cmpl %esp, %eax
|
|
|
|
|
-; CHECK-X86-32-NEXT: jge .LBB0_2
|
|
|
|
|
+; CHECK-X86-32-NEXT: jl .LBB0_2
|
|
|
|
|
; CHECK-X86-32-NEXT: .LBB0_3:
|
|
|
|
|
; CHECK-X86-32-NEXT: movl %eax, %esp
|
|
|
|
|
; CHECK-X86-32-NEXT: movl $1, 4792(%eax)
|