зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1438727: [Part 16] Support shifts in CacheIR r=tcampbell
--HG-- extra : rebase_source : 1d2ec177ccb644debbe9aef7067b94374a2f0900
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@ -177,6 +177,9 @@ warmup(funURsh1, [[1,1,0], [5,1,2], [63,31,0], [4294967295,2147483647,1], [-2,10
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var funURsh2 = (a, b) => { return a >>> b; }
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warmup(funURsh2, [[true,1,0], [5,true,2], [63,false,63], [false, 20, 0]]);
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//URsh Int32
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var funURsh3 = (a, b) => { return a >>> b; }
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warmup(funURsh3, [[4294967295, 0, 4294967295]]);
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// Other Test cases that Have been useful:
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for (var k=0; k < 30; k++) {
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@ -4959,6 +4959,9 @@ DoCacheIRBinaryArithFallback(JSContext* cx, BaselineFrame* frame, ICBinaryArith_
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case JSOP_MUL:
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case JSOP_DIV:
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case JSOP_MOD:
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case JSOP_URSH:
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case JSOP_RSH:
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case JSOP_LSH:
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break;
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default:
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return false; // Fallback to shared IC.
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@ -5208,15 +5208,7 @@ BinaryArithIRGenerator::tryAttachDouble()
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bool
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BinaryArithIRGenerator::tryAttachInt32()
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{
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if (op_ != JSOP_ADD && op_ != JSOP_SUB &&
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op_ != JSOP_BITOR && op_ != JSOP_BITAND &&
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op_ != JSOP_BITXOR && op_ != JSOP_MUL &&
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op_ != JSOP_DIV && op_ != JSOP_MOD)
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{
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return false;
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}
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if (!lhs_.isInt32() || !rhs_.isInt32())
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if (!lhs_.isInt32() || !rhs_.isInt32() || op_ == JSOP_POW)
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return false;
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ValOperandId lhsId(writer.setInputOperandId(0));
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@ -5258,6 +5250,18 @@ BinaryArithIRGenerator::tryAttachInt32()
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writer.int32BitAndResult(lhsIntId, rhsIntId);
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trackAttached("BinaryArith.Int32.BitAnd");
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break;
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case JSOP_LSH:
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writer.int32LeftShiftResult(lhsIntId, rhsIntId);
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trackAttached("BinaryArith.Int32.LeftShift");
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break;
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case JSOP_RSH:
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writer.int32RightShiftResult(lhsIntId, rhsIntId);
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trackAttached("BinaryArith.Int32.RightShift");
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break;
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case JSOP_URSH:
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writer.int32URightShiftResult(lhsIntId, rhsIntId, res_.isDouble());
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trackAttached("BinaryArith.Int32.UnsignedRightShift");
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break;
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default:
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MOZ_CRASH("Unhandled op in tryAttachInt32");
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}
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@ -5316,6 +5320,18 @@ BinaryArithIRGenerator::tryAttachBooleanWithInt32()
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writer.int32BitAndResult(lhsIntId, rhsIntId);
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trackAttached("BinaryArith.BooleanInt32.BitAnd");
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break;
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case JSOP_LSH:
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writer.int32LeftShiftResult(lhsIntId, rhsIntId);
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trackAttached("BinaryArith.BooleanInt32.LeftShift");
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break;
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case JSOP_RSH:
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writer.int32RightShiftResult(lhsIntId, rhsIntId);
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trackAttached("BinaryArith.BooleanInt32.RightShift");
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break;
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case JSOP_URSH:
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writer.int32URightShiftResult(lhsIntId, rhsIntId, res_.isDouble());
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trackAttached("BinaryArith.BooleanInt32.UnsignedRightShift");
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break;
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default:
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MOZ_CRASH("Unhandled op in tryAttachInt32");
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}
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@ -305,6 +305,9 @@ extern const char* CacheKindNames[];
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_(Int32BitOrResult) \
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_(Int32BitXorResult) \
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_(Int32BitAndResult) \
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_(Int32LeftShiftResult) \
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_(Int32RightShiftResult) \
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_(Int32URightShiftResult) \
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_(Int32NotResult) \
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_(Int32NegationResult) \
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_(DoubleNegationResult) \
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@ -1063,6 +1066,19 @@ class MOZ_RAII CacheIRWriter : public JS::CustomAutoRooter
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writeOpWithOperandId(CacheOp::Int32BitAndResult, lhs);
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writeOperandId(rhs);
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}
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void int32LeftShiftResult(Int32OperandId lhs, Int32OperandId rhs) {
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writeOpWithOperandId(CacheOp::Int32LeftShiftResult, lhs);
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writeOperandId(rhs);
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}
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void int32RightShiftResult(Int32OperandId lhs, Int32OperandId rhs) {
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writeOpWithOperandId(CacheOp::Int32RightShiftResult, lhs);
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writeOperandId(rhs);
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}
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void int32URightShiftResult(Int32OperandId lhs, Int32OperandId rhs, bool allowDouble) {
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writeOpWithOperandId(CacheOp::Int32URightShiftResult, lhs);
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writeOperandId(rhs);
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buffer_.writeByte(uint32_t(allowDouble));
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}
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void int32NotResult(Int32OperandId id) {
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writeOpWithOperandId(CacheOp::Int32NotResult, id);
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}
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@ -2202,8 +2202,72 @@ CacheIRCompiler::emitInt32BitAndResult()
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return true;
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}
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bool
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CacheIRCompiler::emitInt32LeftShiftResult()
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{
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AutoOutputRegister output(*this);
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Register lhs = allocator.useRegister(masm, reader.int32OperandId());
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Register rhs = allocator.useRegister(masm, reader.int32OperandId());
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//Mask shift amount as specified by 12.9.3.1 Step 7
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masm.and32(Imm32(0x1F), rhs);
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masm.flexibleLshift32(rhs, lhs);
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EmitStoreResult(masm, lhs, JSVAL_TYPE_INT32, output);
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return true;
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}
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bool
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CacheIRCompiler::emitInt32RightShiftResult()
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{
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AutoOutputRegister output(*this);
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Register lhs = allocator.useRegister(masm, reader.int32OperandId());
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Register rhs = allocator.useRegister(masm, reader.int32OperandId());
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//Mask shift amount as specified by 12.9.4.1 Step 7
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masm.and32(Imm32(0x1F), rhs);
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masm.flexibleRshift32Arithmetic(rhs, lhs);
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EmitStoreResult(masm, lhs, JSVAL_TYPE_INT32, output);
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return true;
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}
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bool
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CacheIRCompiler::emitInt32URightShiftResult()
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{
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AutoOutputRegister output(*this);
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Register lhs = allocator.useRegister(masm, reader.int32OperandId());
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Register rhs = allocator.useRegister(masm, reader.int32OperandId());
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bool allowDouble = reader.readBool();
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FailurePath* failure;
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if (!addFailurePath(&failure))
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return false;
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//Mask shift amount as specified by 12.9.4.1 Step 7
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masm.and32(Imm32(0x1F), rhs);
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masm.flexibleRshift32(rhs, lhs);
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Label intDone,floatDone;
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if (allowDouble) {
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Label toUint;
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masm.branchTest32(Assembler::Signed, lhs, lhs, &toUint);
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masm.jump(&intDone);
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masm.bind(&toUint);
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masm.convertUInt32ToDouble(lhs, ScratchDoubleReg);
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masm.boxDouble(ScratchDoubleReg, output.valueReg(), ScratchDoubleReg);
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masm.jump(&floatDone);
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} else {
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masm.branchTest32(Assembler::Signed, lhs, lhs, failure->label());
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}
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masm.bind(&intDone);
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EmitStoreResult(masm, lhs, JSVAL_TYPE_INT32, output);
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masm.bind(&floatDone);
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return true;
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}
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bool
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CacheIRCompiler::emitInt32NegationResult()
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{
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@ -65,6 +65,9 @@ namespace jit {
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_(Int32BitOrResult) \
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_(Int32BitXorResult) \
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_(Int32BitAndResult) \
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_(Int32LeftShiftResult) \
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_(Int32RightShiftResult) \
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_(Int32URightShiftResult) \
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_(Int32NegationResult) \
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_(Int32NotResult) \
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_(DoubleNegationResult) \
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