Bug 969375 - MIPS port: Added MacroAssembler-mips files. r=froydnj,nbp

js/src/jit/mips/Assembler-mips.cpp

@@ -565,9 +565,9 @@ Assembler::as_bal(BOffImm16 off)
 }
 
 InstImm
-Assembler::getBranchCode(bool isCall)
+Assembler::getBranchCode(JumpOrCall jumpOrCall)
 {
-    if (isCall)
+    if (jumpOrCall == BranchIsCall)
         return InstImm(op_regimm, zero, rt_bgezal, BOffImm16(0));
 
     return InstImm(op_beq, zero, zero, BOffImm16(0));
@@ -608,10 +608,10 @@ Assembler::getBranchCode(Register s, Condition c)
 }
 
 InstImm
-Assembler::getBranchCode(bool testTrue, FPConditionBit fcc)
+Assembler::getBranchCode(FloatTestKind testKind, FPConditionBit fcc)
 {
     JS_ASSERT(!(fcc && FccMask));
-    uint32_t rtField = ((testTrue ? 1 : 0) | (fcc << FccShift)) << RTShift;
+    uint32_t rtField = ((testKind == TestForTrue ? 1 : 0) | (fcc << FccShift)) << RTShift;
 
     return InstImm(op_cop1, rs_bc1, rtField, BOffImm16(0));
 }
@@ -1172,100 +1172,61 @@ Assembler::as_sqrtd(FloatRegister fd, FloatRegister fs)
 
 // FP compare instructions
 BufferOffset
-Assembler::as_cfs(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_cf(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_f_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_f_fmt).encode());
 }
 
 BufferOffset
-Assembler::as_cuns(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_cun(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_un_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_un_fmt).encode());
 }
 
 BufferOffset
-Assembler::as_ceqs(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_ceq(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_eq_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_eq_fmt).encode());
 }
 
 BufferOffset
-Assembler::as_cueqs(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_cueq(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_ueq_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_ueq_fmt).encode());
 }
 
 BufferOffset
-Assembler::as_colts(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_colt(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_olt_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_olt_fmt).encode());
 }
 
 BufferOffset
-Assembler::as_cults(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_cult(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_ult_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_ult_fmt).encode());
 }
 
 BufferOffset
-Assembler::as_coles(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_cole(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_ole_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_ole_fmt).encode());
 }
 
 BufferOffset
-Assembler::as_cules(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
+Assembler::as_cule(FloatFormat fmt, FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
 {
-    return writeInst(InstReg(op_cop1, rs_s, ft, fs, fcc << FccShift, ff_c_ule_fmt).encode());
+    RSField rs = fmt == DoubleFloat ? rs_d : rs_s;
+    return writeInst(InstReg(op_cop1, rs, ft, fs, fcc << FccShift, ff_c_ule_fmt).encode());
 }
 
-BufferOffset
-Assembler::as_cfd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_f_fmt).encode());
-}
-
-BufferOffset
-Assembler::as_cund(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_un_fmt).encode());
-}
-
-BufferOffset
-Assembler::as_ceqd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_eq_fmt).encode());
-}
-
-BufferOffset
-Assembler::as_cueqd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_ueq_fmt).encode());
-}
-
-BufferOffset
-Assembler::as_coltd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_olt_fmt).encode());
-}
-
-BufferOffset
-Assembler::as_cultd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_ult_fmt).encode());
-}
-
-BufferOffset
-Assembler::as_coled(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_ole_fmt).encode());
-}
-
-BufferOffset
-Assembler::as_culed(FloatRegister fs, FloatRegister ft, FPConditionBit fcc)
-{
-    return writeInst(InstReg(op_cop1, rs_d, ft, fs, fcc << FccShift, ff_c_ule_fmt).encode());
-}
 
 void
 Assembler::bind(Label *label, BufferOffset boff)

js/src/jit/mips/Assembler-mips.h

@@ -617,6 +617,21 @@ class Assembler
         FCC7
     };
 
+    enum FloatFormat {
+        SingleFloat,
+        DoubleFloat
+    };
+
+    enum JumpOrCall {
+        BranchIsJump,
+        BranchIsCall
+    };
+
+    enum FloatTestKind {
+        TestForTrue,
+        TestForFalse
+    };
+
     // :( this should be protected, but since CodeGenerator
     // wants to use it, It needs to go out here :(
 
@@ -750,10 +765,10 @@ class Assembler
     // Branch and jump instructions
     BufferOffset as_bal(BOffImm16 off);
 
-    InstImm getBranchCode(bool isCall);
+    InstImm getBranchCode(JumpOrCall jumpOrCall);
     InstImm getBranchCode(Register s, Register t, Condition c);
     InstImm getBranchCode(Register s, Condition c);
-    InstImm getBranchCode(bool testTrue, FPConditionBit fcc);
+    InstImm getBranchCode(FloatTestKind testKind, FPConditionBit fcc);
 
     BufferOffset as_j(JOffImm26 off);
     BufferOffset as_jal(JOffImm26 off);
@@ -895,24 +910,22 @@ class Assembler
     BufferOffset as_sqrtd(FloatRegister fd, FloatRegister fs);
 
     // FP compare instructions
-    BufferOffset as_cfs(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_cuns(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_ceqs(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_cueqs(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_colts(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_cults(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_coles(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_cules(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-
-    BufferOffset as_cfd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_cund(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_ceqd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_cueqd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_coltd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_cultd(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_coled(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-    BufferOffset as_culed(FloatRegister fs, FloatRegister ft, FPConditionBit fcc = FCC0);
-
+    BufferOffset as_cf(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                       FPConditionBit fcc = FCC0);
+    BufferOffset as_cun(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                        FPConditionBit fcc = FCC0);
+    BufferOffset as_ceq(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                        FPConditionBit fcc = FCC0);
+    BufferOffset as_cueq(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                         FPConditionBit fcc = FCC0);
+    BufferOffset as_colt(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                         FPConditionBit fcc = FCC0);
+    BufferOffset as_cult(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                         FPConditionBit fcc = FCC0);
+    BufferOffset as_cole(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                         FPConditionBit fcc = FCC0);
+    BufferOffset as_cule(FloatFormat fmt, FloatRegister fs, FloatRegister ft,
+                         FPConditionBit fcc = FCC0);
 
     // label operations
     void bind(Label *label, BufferOffset boff = BufferOffset());