Bug 518491 - NJ merge: Assembler bits and pieces. r=graydon.

js/src/nanojit/Assembler.h

@@ -273,7 +273,6 @@ namespace nanojit
             void        asm_spilli(LInsp i, bool pop);
             void        asm_spill(Register rr, int d, bool pop, bool quad);
             void        asm_load64(LInsp i);
-            void        asm_pusharg(LInsp p);
             void        asm_ret(LInsp p);
             void        asm_quad(LInsp i);
             void        asm_fcond(LInsp i);
@@ -284,7 +283,6 @@ namespace nanojit
             void        asm_cmov(LInsp i);
             void        asm_param(LInsp i);
             void        asm_int(LInsp i);
-            void        asm_short(LInsp i);
             void        asm_qlo(LInsp i);
             void        asm_qhi(LInsp i);
             void        asm_fneg(LInsp ins);
@@ -295,7 +293,6 @@ namespace nanojit
             Register    asm_prep_fcall(Reservation *rR, LInsp ins);
             void        asm_nongp_copy(Register r, Register s);
             void        asm_call(LInsp);
-            void        asm_arg(ArgSize, LInsp, Register);
             Register    asm_binop_rhs_reg(LInsp ins);
             NIns*       asm_branch(bool branchOnFalse, LInsp cond, NIns* targ);
             void        asm_switch(LIns* ins, NIns* target);

js/src/nanojit/NativeARM.cpp

@@ -554,18 +554,6 @@ Assembler::genEpilogue()
     return _nIns;
 }
 
-/*
- * This should never be called; ARM only uses the longer form.
- * TODO: We should delete this as it is never called from outside this file. It
- * should be declared in the DECLARE_PLATFORM_ASSEMBLER block of each native
- * back-end where required.
- */
-void
-Assembler::asm_arg(ArgSize sz, LInsp p, Register r)
-{
-    NanoAssert(0);
-}
-
 /*
  * asm_arg will encode the specified argument according to the current ABI, and
  * will update r and stkd as appropriate so that the next argument can be

js/src/nanojit/Nativei386.cpp

@@ -406,7 +406,6 @@ namespace nanojit
         else if (i->isop(LIR_param) && i->paramKind() == 0 &&
             (arg = i->paramArg()) >= (abi_regcount = max_abi_regs[_thisfrag->lirbuf->abi])) {
             // incoming arg is on stack, can restore it from there instead of spilling
-            NanoAssert(0);
             if (!i->getArIndex()) {
                 i->markAsClear();
             }
@@ -840,7 +839,7 @@ namespace nanojit
             }
             break;
         case LIR_add:
-        case LIR_iaddp:
+        case LIR_addp:
             if (lhs->isop(LIR_alloc) && rhs->isconst()) {
                 // add alloc+const, use lea
                 Register rr = prepResultReg(ins, allow);
@@ -1169,6 +1168,13 @@ namespace nanojit
                     // 1.0 is extremely frequent and worth special-casing!
                     static const double k_ONE = 1.0;
                     LDSDm(rr, &k_ONE);
+                } else if (d && d == (int)d) {
+                    // can fit in 32bits? then use cvt which is faster
+                    Register gr = registerAlloc(GpRegs);
+                    SSE_CVTSI2SD(rr, gr);
+                    SSE_XORPDr(rr,rr);  // zero rr to ensure no dependency stalls
+                    LDi(gr, (int)d);
+                    _allocator.addFree(gr);
                 } else {
                     findMemFor(ins);
                     const int d = disp(ins);

js/src/nanojit/Nativei386.h

@@ -175,8 +175,10 @@ namespace nanojit
         void nativePageSetup();\
         void underrunProtect(int);\
         void asm_farg(LInsp);\
-        void asm_cmp(LIns *cond);\
+        void asm_arg(ArgSize, LIns*, Register);\
+        void asm_pusharg(LInsp);\
         void asm_fcmp(LIns *cond); \
+        void asm_cmp(LIns *cond); \
         void asm_div_mod(LIns *cond);
 
     #define swapptrs()  { NIns* _tins = _nIns; _nIns=_nExitIns; _nExitIns=_tins; }