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Bug 1046585 part 8 - Move X86Assembler.h and AssemblerBuffer.h into jit/. r=sunfish 

--HG--
rename : js/src/assembler/assembler/AssemblerBuffer.h => js/src/jit/shared/AssemblerBuffer-x86-shared.h
rename : js/src/assembler/assembler/X86Assembler.h => js/src/jit/shared/BaseAssembler-x86-shared.h
This commit is contained in:
Jan de Mooij 2014-08-19 14:34:45 +02:00
Родитель 7b93647b9a
Коммит 2d00f5ff97
16 изменённых файлов: 276 добавлений и 271 удалений
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16
js/src/asmjs/AsmJSModule.cpp
Просмотреть файл

@ -760,11 +760,11 @@ AsmJSModule::initHeap(Handle<ArrayBufferObject*> heap, JSContext *cx)
for (unsigned i = 0; i < heapAccesses_.length(); i++) {
const jit::AsmJSHeapAccess &access = heapAccesses_[i];
if (access.hasLengthCheck())
JSC::X86Assembler::setPointer(access.patchLengthAt(code_), heapLength);
X86Assembler::setPointer(access.patchLengthAt(code_), heapLength);
void *addr = access.patchOffsetAt(code_);
uint32_t disp = reinterpret_cast<uint32_t>(JSC::X86Assembler::getPointer(addr));
uint32_t disp = reinterpret_cast<uint32_t>(X86Assembler::getPointer(addr));
JS_ASSERT(disp <= INT32_MAX);
JSC::X86Assembler::setPointer(addr, (void *)(heapOffset + disp));
X86Assembler::setPointer(addr, (void *)(heapOffset + disp));
}
#elif defined(JS_CODEGEN_X64)
int32_t heapLength = int32_t(intptr_t(heap->byteLength()));
@ -777,7 +777,7 @@ AsmJSModule::initHeap(Handle<ArrayBufferObject*> heap, JSContext *cx)
for (size_t i = 0; i < heapAccesses_.length(); i++) {
const jit::AsmJSHeapAccess &access = heapAccesses_[i];
if (access.hasLengthCheck())
JSC::X86Assembler::setInt32(access.patchLengthAt(code_), heapLength);
X86Assembler::setInt32(access.patchLengthAt(code_), heapLength);
}
#elif defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_MIPS)
uint32_t heapLength = heap->byteLength();
@ -825,9 +825,9 @@ AsmJSModule::restoreToInitialState(uint8_t *prevCode, ArrayBufferObject *maybePr
for (unsigned i = 0; i < heapAccesses_.length(); i++) {
const jit::AsmJSHeapAccess &access = heapAccesses_[i];
void *addr = access.patchOffsetAt(code_);
uint8_t *ptr = reinterpret_cast<uint8_t*>(JSC::X86Assembler::getPointer(addr));
uint8_t *ptr = reinterpret_cast<uint8_t*>(X86Assembler::getPointer(addr));
JS_ASSERT(ptr >= ptrBase);
JSC::X86Assembler::setPointer(addr, (void *)(ptr - ptrBase));
X86Assembler::setPointer(addr, (void *)(ptr - ptrBase));
}
#endif
}
@ -1601,7 +1601,7 @@ AsmJSModule::setProfilingEnabled(bool enabled, JSContext *cx)
uint8_t *callerRetAddr = code_ + cs.returnAddressOffset();
#if defined(JS_CODEGEN_X86) || defined(JS_CODEGEN_X64)
void *callee = JSC::X86Assembler::getRel32Target(callerRetAddr);
void *callee = X86Assembler::getRel32Target(callerRetAddr);
#elif defined(JS_CODEGEN_ARM)
uint8_t *caller = callerRetAddr - 4;
Instruction *callerInsn = reinterpret_cast<Instruction*>(caller);
@ -1629,7 +1629,7 @@ AsmJSModule::setProfilingEnabled(bool enabled, JSContext *cx)
uint8_t *newCallee = enabled ? profilingEntry : entry;
#if defined(JS_CODEGEN_X86) || defined(JS_CODEGEN_X64)
JSC::X86Assembler::setRel32(callerRetAddr, newCallee);
X86Assembler::setRel32(callerRetAddr, newCallee);
#elif defined(JS_CODEGEN_ARM)
new (caller) InstBLImm(BOffImm(newCallee - caller), Assembler::Always);
#elif defined(JS_CODEGEN_MIPS)

128
js/src/asmjs/AsmJSSignalHandlers.cpp
Просмотреть файл

@ -383,42 +383,42 @@ SetRegisterToCoercedUndefined(CONTEXT *context, bool isFloat32, AnyRegister reg)
{
if (reg.isFloat()) {
switch (reg.fpu().code()) {
case JSC::X86Registers::xmm0: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 0)); break;
case JSC::X86Registers::xmm1: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 1)); break;
case JSC::X86Registers::xmm2: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 2)); break;
case JSC::X86Registers::xmm3: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 3)); break;
case JSC::X86Registers::xmm4: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 4)); break;
case JSC::X86Registers::xmm5: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 5)); break;
case JSC::X86Registers::xmm6: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 6)); break;
case JSC::X86Registers::xmm7: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 7)); break;
case JSC::X86Registers::xmm8: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 8)); break;
case JSC::X86Registers::xmm9: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 9)); break;
case JSC::X86Registers::xmm10: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 10)); break;
case JSC::X86Registers::xmm11: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 11)); break;
case JSC::X86Registers::xmm12: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 12)); break;
case JSC::X86Registers::xmm13: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 13)); break;
case JSC::X86Registers::xmm14: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 14)); break;
case JSC::X86Registers::xmm15: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 15)); break;
case X86Registers::xmm0: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 0)); break;
case X86Registers::xmm1: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 1)); break;
case X86Registers::xmm2: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 2)); break;
case X86Registers::xmm3: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 3)); break;
case X86Registers::xmm4: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 4)); break;
case X86Registers::xmm5: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 5)); break;
case X86Registers::xmm6: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 6)); break;
case X86Registers::xmm7: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 7)); break;
case X86Registers::xmm8: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 8)); break;
case X86Registers::xmm9: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 9)); break;
case X86Registers::xmm10: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 10)); break;
case X86Registers::xmm11: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 11)); break;
case X86Registers::xmm12: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 12)); break;
case X86Registers::xmm13: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 13)); break;
case X86Registers::xmm14: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 14)); break;
case X86Registers::xmm15: SetXMMRegToNaN(isFloat32, &XMM_sig(context, 15)); break;
default: MOZ_CRASH();
}
} else {
switch (reg.gpr().code()) {
case JSC::X86Registers::eax: RAX_sig(context) = 0; break;
case JSC::X86Registers::ecx: RCX_sig(context) = 0; break;
case JSC::X86Registers::edx: RDX_sig(context) = 0; break;
case JSC::X86Registers::ebx: RBX_sig(context) = 0; break;
case JSC::X86Registers::esp: RSP_sig(context) = 0; break;
case JSC::X86Registers::ebp: RBP_sig(context) = 0; break;
case JSC::X86Registers::esi: RSI_sig(context) = 0; break;
case JSC::X86Registers::edi: RDI_sig(context) = 0; break;
case JSC::X86Registers::r8: R8_sig(context) = 0; break;
case JSC::X86Registers::r9: R9_sig(context) = 0; break;
case JSC::X86Registers::r10: R10_sig(context) = 0; break;
case JSC::X86Registers::r11: R11_sig(context) = 0; break;
case JSC::X86Registers::r12: R12_sig(context) = 0; break;
case JSC::X86Registers::r13: R13_sig(context) = 0; break;
case JSC::X86Registers::r14: R14_sig(context) = 0; break;
case JSC::X86Registers::r15: R15_sig(context) = 0; break;
case X86Registers::eax: RAX_sig(context) = 0; break;
case X86Registers::ecx: RCX_sig(context) = 0; break;
case X86Registers::edx: RDX_sig(context) = 0; break;
case X86Registers::ebx: RBX_sig(context) = 0; break;
case X86Registers::esp: RSP_sig(context) = 0; break;
case X86Registers::ebp: RBP_sig(context) = 0; break;
case X86Registers::esi: RSI_sig(context) = 0; break;
case X86Registers::edi: RDI_sig(context) = 0; break;
case X86Registers::r8: R8_sig(context) = 0; break;
case X86Registers::r9: R9_sig(context) = 0; break;
case X86Registers::r10: R10_sig(context) = 0; break;
case X86Registers::r11: R11_sig(context) = 0; break;
case X86Registers::r12: R12_sig(context) = 0; break;
case X86Registers::r13: R13_sig(context) = 0; break;
case X86Registers::r14: R14_sig(context) = 0; break;
case X86Registers::r15: R15_sig(context) = 0; break;
default: MOZ_CRASH();
}
}
@ -554,22 +554,22 @@ SetRegisterToCoercedUndefined(mach_port_t rtThread, x86_thread_state64_t &state,
bool f32 = heapAccess.isFloat32Load();
switch (heapAccess.loadedReg().fpu().code()) {
case JSC::X86Registers::xmm0: SetXMMRegToNaN(f32, &fstate.__fpu_xmm0); break;
case JSC::X86Registers::xmm1: SetXMMRegToNaN(f32, &fstate.__fpu_xmm1); break;
case JSC::X86Registers::xmm2: SetXMMRegToNaN(f32, &fstate.__fpu_xmm2); break;
case JSC::X86Registers::xmm3: SetXMMRegToNaN(f32, &fstate.__fpu_xmm3); break;
case JSC::X86Registers::xmm4: SetXMMRegToNaN(f32, &fstate.__fpu_xmm4); break;
case JSC::X86Registers::xmm5: SetXMMRegToNaN(f32, &fstate.__fpu_xmm5); break;
case JSC::X86Registers::xmm6: SetXMMRegToNaN(f32, &fstate.__fpu_xmm6); break;
case JSC::X86Registers::xmm7: SetXMMRegToNaN(f32, &fstate.__fpu_xmm7); break;
case JSC::X86Registers::xmm8: SetXMMRegToNaN(f32, &fstate.__fpu_xmm8); break;
case JSC::X86Registers::xmm9: SetXMMRegToNaN(f32, &fstate.__fpu_xmm9); break;
case JSC::X86Registers::xmm10: SetXMMRegToNaN(f32, &fstate.__fpu_xmm10); break;
case JSC::X86Registers::xmm11: SetXMMRegToNaN(f32, &fstate.__fpu_xmm11); break;
case JSC::X86Registers::xmm12: SetXMMRegToNaN(f32, &fstate.__fpu_xmm12); break;
case JSC::X86Registers::xmm13: SetXMMRegToNaN(f32, &fstate.__fpu_xmm13); break;
case JSC::X86Registers::xmm14: SetXMMRegToNaN(f32, &fstate.__fpu_xmm14); break;
case JSC::X86Registers::xmm15: SetXMMRegToNaN(f32, &fstate.__fpu_xmm15); break;
case X86Registers::xmm0: SetXMMRegToNaN(f32, &fstate.__fpu_xmm0); break;
case X86Registers::xmm1: SetXMMRegToNaN(f32, &fstate.__fpu_xmm1); break;
case X86Registers::xmm2: SetXMMRegToNaN(f32, &fstate.__fpu_xmm2); break;
case X86Registers::xmm3: SetXMMRegToNaN(f32, &fstate.__fpu_xmm3); break;
case X86Registers::xmm4: SetXMMRegToNaN(f32, &fstate.__fpu_xmm4); break;
case X86Registers::xmm5: SetXMMRegToNaN(f32, &fstate.__fpu_xmm5); break;
case X86Registers::xmm6: SetXMMRegToNaN(f32, &fstate.__fpu_xmm6); break;
case X86Registers::xmm7: SetXMMRegToNaN(f32, &fstate.__fpu_xmm7); break;
case X86Registers::xmm8: SetXMMRegToNaN(f32, &fstate.__fpu_xmm8); break;
case X86Registers::xmm9: SetXMMRegToNaN(f32, &fstate.__fpu_xmm9); break;
case X86Registers::xmm10: SetXMMRegToNaN(f32, &fstate.__fpu_xmm10); break;
case X86Registers::xmm11: SetXMMRegToNaN(f32, &fstate.__fpu_xmm11); break;
case X86Registers::xmm12: SetXMMRegToNaN(f32, &fstate.__fpu_xmm12); break;
case X86Registers::xmm13: SetXMMRegToNaN(f32, &fstate.__fpu_xmm13); break;
case X86Registers::xmm14: SetXMMRegToNaN(f32, &fstate.__fpu_xmm14); break;
case X86Registers::xmm15: SetXMMRegToNaN(f32, &fstate.__fpu_xmm15); break;
default: MOZ_CRASH();
}
@ -578,22 +578,22 @@ SetRegisterToCoercedUndefined(mach_port_t rtThread, x86_thread_state64_t &state,
return false;
} else {
switch (heapAccess.loadedReg().gpr().code()) {
case JSC::X86Registers::eax: state.__rax = 0; break;
case JSC::X86Registers::ecx: state.__rcx = 0; break;
case JSC::X86Registers::edx: state.__rdx = 0; break;
case JSC::X86Registers::ebx: state.__rbx = 0; break;
case JSC::X86Registers::esp: state.__rsp = 0; break;
case JSC::X86Registers::ebp: state.__rbp = 0; break;
case JSC::X86Registers::esi: state.__rsi = 0; break;
case JSC::X86Registers::edi: state.__rdi = 0; break;
case JSC::X86Registers::r8: state.__r8 = 0; break;
case JSC::X86Registers::r9: state.__r9 = 0; break;
case JSC::X86Registers::r10: state.__r10 = 0; break;
case JSC::X86Registers::r11: state.__r11 = 0; break;
case JSC::X86Registers::r12: state.__r12 = 0; break;
case JSC::X86Registers::r13: state.__r13 = 0; break;
case JSC::X86Registers::r14: state.__r14 = 0; break;
case JSC::X86Registers::r15: state.__r15 = 0; break;
case X86Registers::eax: state.__rax = 0; break;
case X86Registers::ecx: state.__rcx = 0; break;
case X86Registers::edx: state.__rdx = 0; break;
case X86Registers::ebx: state.__rbx = 0; break;
case X86Registers::esp: state.__rsp = 0; break;
case X86Registers::ebp: state.__rbp = 0; break;
case X86Registers::esi: state.__rsi = 0; break;
case X86Registers::edi: state.__rdi = 0; break;
case X86Registers::r8: state.__r8 = 0; break;
case X86Registers::r9: state.__r9 = 0; break;
case X86Registers::r10: state.__r10 = 0; break;
case X86Registers::r11: state.__r11 = 0; break;
case X86Registers::r12: state.__r12 = 0; break;
case X86Registers::r13: state.__r13 = 0; break;
case X86Registers::r14: state.__r14 = 0; break;
case X86Registers::r15: state.__r15 = 0; break;
default: MOZ_CRASH();
}
}

2
js/src/assembler/assembler/MacroAssemblerX86Common.h
Просмотреть файл

@ -30,7 +30,7 @@
#ifndef assembler_assembler_MacroAssemblerX86Common_h
#define assembler_assembler_MacroAssemblerX86Common_h
#include "assembler/assembler/X86Assembler.h"
#include "jit/shared/BaseAssembler-x86-shared.h"
namespace JSC {

2
js/src/jit/shared/Assembler-x86-shared.cpp
Просмотреть файл

@ -43,7 +43,7 @@ TraceDataRelocations(JSTracer *trc, uint8_t *buffer, CompactBufferReader &reader
{
while (reader.more()) {
size_t offset = reader.readUnsigned();
void **ptr = JSC::X86Assembler::getPointerRef(buffer + offset);
void **ptr = X86Assembler::getPointerRef(buffer + offset);
#ifdef JS_PUNBOX64
// All pointers on x64 will have the top bits cleared. If those bits

74
js/src/jit/shared/Assembler-x86-shared.h
Просмотреть файл

@ -10,8 +10,8 @@
#include <cstddef>
#include "assembler/assembler/MacroAssemblerX86Common.h"
#include "assembler/assembler/X86Assembler.h"
#include "jit/shared/Assembler-shared.h"
#include "jit/shared/BaseAssembler-x86-shared.h"
namespace js {
namespace jit {
@ -69,7 +69,7 @@ class Operand
{ }
explicit Operand(AbsoluteAddress address)
: kind_(MEM_ADDRESS32),
disp_(JSC::X86Assembler::addressImmediate(address.addr))
disp_(X86Assembler::addressImmediate(address.addr))
{ }
Address toAddress() const {
@ -161,30 +161,30 @@ class AssemblerX86Shared : public AssemblerShared
}
protected:
JSC::X86Assembler masm;
X86Assembler masm;
typedef JSC::X86Assembler::JmpSrc JmpSrc;
typedef JSC::X86Assembler::JmpDst JmpDst;
typedef X86Assembler::JmpSrc JmpSrc;
typedef X86Assembler::JmpDst JmpDst;
public:
enum Condition {
Equal = JSC::X86Assembler::ConditionE,
NotEqual = JSC::X86Assembler::ConditionNE,
Above = JSC::X86Assembler::ConditionA,
AboveOrEqual = JSC::X86Assembler::ConditionAE,
Below = JSC::X86Assembler::ConditionB,
BelowOrEqual = JSC::X86Assembler::ConditionBE,
GreaterThan = JSC::X86Assembler::ConditionG,
GreaterThanOrEqual = JSC::X86Assembler::ConditionGE,
LessThan = JSC::X86Assembler::ConditionL,
LessThanOrEqual = JSC::X86Assembler::ConditionLE,
Overflow = JSC::X86Assembler::ConditionO,
Signed = JSC::X86Assembler::ConditionS,
NotSigned = JSC::X86Assembler::ConditionNS,
Zero = JSC::X86Assembler::ConditionE,
NonZero = JSC::X86Assembler::ConditionNE,
Parity = JSC::X86Assembler::ConditionP,
NoParity = JSC::X86Assembler::ConditionNP
Equal = X86Assembler::ConditionE,
NotEqual = X86Assembler::ConditionNE,
Above = X86Assembler::ConditionA,
AboveOrEqual = X86Assembler::ConditionAE,
Below = X86Assembler::ConditionB,
BelowOrEqual = X86Assembler::ConditionBE,
GreaterThan = X86Assembler::ConditionG,
GreaterThanOrEqual = X86Assembler::ConditionGE,
LessThan = X86Assembler::ConditionL,
LessThanOrEqual = X86Assembler::ConditionLE,
Overflow = X86Assembler::ConditionO,
Signed = X86Assembler::ConditionS,
NotSigned = X86Assembler::ConditionNS,
Zero = X86Assembler::ConditionE,
NonZero = X86Assembler::ConditionNE,
Parity = X86Assembler::ConditionP,
NoParity = X86Assembler::ConditionNP
};
// If this bit is set, the ucomisd operands have to be inverted.
@ -683,7 +683,7 @@ class AssemblerX86Shared : public AssemblerShared
protected:
JmpSrc jSrc(Condition cond, Label *label) {
JmpSrc j = masm.jCC(static_cast<JSC::X86Assembler::Condition>(cond));
JmpSrc j = masm.jCC(static_cast<X86Assembler::Condition>(cond));
if (label->bound()) {
// The jump can be immediately patched to the correct destination.
masm.linkJump(j, JmpDst(label->offset()));
@ -722,7 +722,7 @@ class AssemblerX86Shared : public AssemblerShared
}
JmpSrc jSrc(Condition cond, RepatchLabel *label) {
JmpSrc j = masm.jCC(static_cast<JSC::X86Assembler::Condition>(cond));
JmpSrc j = masm.jCC(static_cast<X86Assembler::Condition>(cond));
if (label->bound()) {
// The jump can be immediately patched to the correct destination.
masm.linkJump(j, JmpDst(label->offset()));
@ -768,12 +768,12 @@ class AssemblerX86Shared : public AssemblerShared
}
void cmpEAX(Label *label) { cmpSrc(label); }
void bind(Label *label) {
JSC::X86Assembler::JmpDst dst(masm.label());
X86Assembler::JmpDst dst(masm.label());
if (label->used()) {
bool more;
JSC::X86Assembler::JmpSrc jmp(label->offset());
X86Assembler::JmpSrc jmp(label->offset());
do {
JSC::X86Assembler::JmpSrc next;
X86Assembler::JmpSrc next;
more = masm.nextJump(jmp, &next);
masm.linkJump(jmp, dst);
jmp = next;
@ -782,9 +782,9 @@ class AssemblerX86Shared : public AssemblerShared
label->bind(dst.offset());
}
void bind(RepatchLabel *label) {
JSC::X86Assembler::JmpDst dst(masm.label());
X86Assembler::JmpDst dst(masm.label());
if (label->used()) {
JSC::X86Assembler::JmpSrc jmp(label->offset());
X86Assembler::JmpSrc jmp(label->offset());
masm.linkJump(jmp, dst);
}
label->bind(dst.offset());
@ -797,9 +797,9 @@ class AssemblerX86Shared : public AssemblerShared
void retarget(Label *label, Label *target) {
if (label->used()) {
bool more;
JSC::X86Assembler::JmpSrc jmp(label->offset());
X86Assembler::JmpSrc jmp(label->offset());
do {
JSC::X86Assembler::JmpSrc next;
X86Assembler::JmpSrc next;
more = masm.nextJump(jmp, &next);
if (target->bound()) {
@ -821,15 +821,15 @@ class AssemblerX86Shared : public AssemblerShared
if (label->used()) {
intptr_t src = label->offset();
do {
intptr_t next = reinterpret_cast<intptr_t>(JSC::X86Assembler::getPointer(raw + src));
JSC::X86Assembler::setPointer(raw + src, address);
intptr_t next = reinterpret_cast<intptr_t>(X86Assembler::getPointer(raw + src));
X86Assembler::setPointer(raw + src, address);
src = next;
} while (src != AbsoluteLabel::INVALID_OFFSET);
}
label->bind();
}
// See Bind and JSC::X86Assembler::setPointer.
// See Bind and X86Assembler::setPointer.
size_t labelOffsetToPatchOffset(size_t offset) {
return offset - sizeof(void*);
}
@ -962,7 +962,7 @@ class AssemblerX86Shared : public AssemblerShared
masm.cmpw_rr(lhs.code(), rhs.code());
}
void setCC(Condition cond, Register r) {
masm.setCC_r(static_cast<JSC::X86Assembler::Condition>(cond), r.code());
masm.setCC_r(static_cast<X86Assembler::Condition>(cond), r.code());
}
void testb(Register lhs, Register rhs) {
JS_ASSERT(GeneralRegisterSet(Registers::SingleByteRegs).has(lhs));
@ -1755,13 +1755,13 @@ class AssemblerX86Shared : public AssemblerShared
masm.sqrtss_rr(src.code(), dest.code());
}
void roundsd(FloatRegister src, FloatRegister dest,
JSC::X86Assembler::RoundingMode mode)
X86Assembler::RoundingMode mode)
{
JS_ASSERT(HasSSE41());
masm.roundsd_rr(src.code(), dest.code(), mode);
}
void roundss(FloatRegister src, FloatRegister dest,
JSC::X86Assembler::RoundingMode mode)
X86Assembler::RoundingMode mode)
{
JS_ASSERT(HasSSE41());
masm.roundss_rr(src.code(), dest.code(), mode);

14
js/src/assembler/assembler/AssemblerBuffer.h → js/src/jit/shared/AssemblerBuffer-x86-shared.h
Просмотреть файл

@ -27,12 +27,12 @@
*
* ***** END LICENSE BLOCK ***** */
#ifndef assembler_assembler_AssemblerBuffer_h
#define assembler_assembler_AssemblerBuffer_h
#ifndef jit_shared_AssemblerBuffer_x86_shared_h
#define jit_shared_AssemblerBuffer_x86_shared_h
#include <string.h>
#include <limits.h>
#include <stdarg.h>
#include <string.h>
#include "jsfriendapi.h"
#include "jsopcode.h"
@ -50,7 +50,8 @@
__FILE__, __LINE__); \
} while (0)
namespace JSC {
namespace js {
namespace jit {
class AssemblerBuffer {
static const size_t inlineCapacity = 256;
@ -323,6 +324,7 @@ namespace JSC {
}
};
} // namespace JSC
} // namespace jit
} // namespace js
#endif /* assembler_assembler_AssemblerBuffer_h */
#endif /* jit_shared_AssemblerBuffer_x86_shared_h */

15
js/src/assembler/assembler/X86Assembler.h → js/src/jit/shared/BaseAssembler-x86-shared.h
Просмотреть файл

@ -27,15 +27,17 @@
*
* ***** END LICENSE BLOCK ***** */
#ifndef assembler_assembler_X86Assembler_h
#define assembler_assembler_X86Assembler_h
#ifndef jit_shared_BaseAssembler_x86_shared_h
#define jit_shared_BaseAssembler_x86_shared_h
#include <stdarg.h>
#include "assembler/assembler/AssemblerBuffer.h"
#include "jit/shared/AssemblerBuffer-x86-shared.h"
#include "js/Vector.h"
namespace JSC {
namespace js {
namespace jit {
inline bool CAN_SIGN_EXTEND_8_32(int32_t value) { return value == (int32_t)(signed char)value; }
inline bool CAN_ZERO_EXTEND_8_32(int32_t value) { return value == (int32_t)(unsigned char)value; }
@ -4443,6 +4445,7 @@ private:
} m_formatter;
};
} // namespace JSC
} // namespace jit
} // namespace js
#endif /* assembler_assembler_X86Assembler_h */
#endif /* jit_shared_BaseAssembler_x86_shared_h */

12
js/src/jit/shared/CodeGenerator-x86-shared.cpp
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@ -1584,7 +1584,7 @@ CodeGeneratorX86Shared::visitFloor(LFloor *lir)
return false;
// Round toward -Infinity.
masm.roundsd(input, scratch, JSC::X86Assembler::RoundDown);
masm.roundsd(input, scratch, X86Assembler::RoundDown);
if (!bailoutCvttsd2si(scratch, output, lir->snapshot()))
return false;
@ -1647,7 +1647,7 @@ CodeGeneratorX86Shared::visitFloorF(LFloorF *lir)
return false;
// Round toward -Infinity.
masm.roundss(input, scratch, JSC::X86Assembler::RoundDown);
masm.roundss(input, scratch, X86Assembler::RoundDown);
if (!bailoutCvttss2si(scratch, output, lir->snapshot()))
return false;
@ -1718,7 +1718,7 @@ CodeGeneratorX86Shared::visitCeil(LCeil *lir)
// x <= -1 or x > -0
masm.bind(&lessThanMinusOne);
// Round toward +Infinity.
masm.roundsd(input, scratch, JSC::X86Assembler::RoundUp);
masm.roundsd(input, scratch, X86Assembler::RoundUp);
return bailoutCvttsd2si(scratch, output, lir->snapshot());
}
@ -1774,7 +1774,7 @@ CodeGeneratorX86Shared::visitCeilF(LCeilF *lir)
// x <= -1 or x > -0
masm.bind(&lessThanMinusOne);
// Round toward +Infinity.
masm.roundss(input, scratch, JSC::X86Assembler::RoundUp);
masm.roundss(input, scratch, X86Assembler::RoundUp);
return bailoutCvttss2si(scratch, output, lir->snapshot());
}
@ -1845,7 +1845,7 @@ CodeGeneratorX86Shared::visitRound(LRound *lir)
// Add 0.5 and round toward -Infinity. The result is stored in the temp
// register (currently contains 0.5).
masm.addsd(input, temp);
masm.roundsd(temp, scratch, JSC::X86Assembler::RoundDown);
masm.roundsd(temp, scratch, X86Assembler::RoundDown);
// Truncate.
if (!bailoutCvttsd2si(scratch, output, lir->snapshot()))
@ -1927,7 +1927,7 @@ CodeGeneratorX86Shared::visitRoundF(LRoundF *lir)
// Add 0.5 and round toward -Infinity. The result is stored in the temp
// register (currently contains 0.5).
masm.addss(input, temp);
masm.roundss(temp, scratch, JSC::X86Assembler::RoundDown);
masm.roundss(temp, scratch, X86Assembler::RoundDown);
// Truncate.
if (!bailoutCvttss2si(scratch, output, lir->snapshot()))

2
js/src/jit/shared/MacroAssembler-x86-shared.h
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@ -195,7 +195,7 @@ class MacroAssemblerX86Shared : public Assembler
}
void atomic_cmpxchg32(Register src, const Operand &addr, Register dest) {
// %eax must be explicitly provided for calling clarity.
MOZ_ASSERT(dest.code() == JSC::X86Registers::eax);
MOZ_ASSERT(dest.code() == X86Registers::eax);
lock_cmpxchg32(src, addr);
}

80
js/src/jit/x64/Architecture-x64.h
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@ -7,7 +7,7 @@
#ifndef jit_x64_Architecture_x64_h
#define jit_x64_Architecture_x64_h
#include "assembler/assembler/X86Assembler.h"
#include "jit/shared/BaseAssembler-x86-shared.h"
namespace js {
namespace jit {
@ -26,7 +26,7 @@ static const uint32_t ShadowStackSpace = 0;
class Registers {
public:
typedef JSC::X86Registers::RegisterID Code;
typedef X86Registers::RegisterID Code;
typedef uint32_t SetType;
static uint32_t SetSize(SetType x) {
static_assert(sizeof(SetType) == 4, "SetType must be 32 bits");
@ -54,8 +54,8 @@ class Registers {
return Invalid;
}
static const Code StackPointer = JSC::X86Registers::esp;
static const Code Invalid = JSC::X86Registers::invalid_reg;
static const Code StackPointer = X86Registers::esp;
static const Code Invalid = X86Registers::invalid_reg;
static const uint32_t Total = 16;
static const uint32_t TotalPhys = 16;
@ -65,46 +65,46 @@ class Registers {
static const uint32_t ArgRegMask =
# if !defined(_WIN64)
(1 << JSC::X86Registers::edi) |
(1 << JSC::X86Registers::esi) |
(1 << X86Registers::edi) |
(1 << X86Registers::esi) |
# endif
(1 << JSC::X86Registers::edx) |
(1 << JSC::X86Registers::ecx) |
(1 << JSC::X86Registers::r8) |
(1 << JSC::X86Registers::r9);
(1 << X86Registers::edx) |
(1 << X86Registers::ecx) |
(1 << X86Registers::r8) |
(1 << X86Registers::r9);
static const uint32_t VolatileMask =
(1 << JSC::X86Registers::eax) |
(1 << JSC::X86Registers::ecx) |
(1 << JSC::X86Registers::edx) |
(1 << X86Registers::eax) |
(1 << X86Registers::ecx) |
(1 << X86Registers::edx) |
# if !defined(_WIN64)
(1 << JSC::X86Registers::esi) |
(1 << JSC::X86Registers::edi) |
(1 << X86Registers::esi) |
(1 << X86Registers::edi) |
# endif
(1 << JSC::X86Registers::r8) |
(1 << JSC::X86Registers::r9) |
(1 << JSC::X86Registers::r10) |
(1 << JSC::X86Registers::r11);
(1 << X86Registers::r8) |
(1 << X86Registers::r9) |
(1 << X86Registers::r10) |
(1 << X86Registers::r11);
static const uint32_t NonVolatileMask =
(1 << JSC::X86Registers::ebx) |
(1 << X86Registers::ebx) |
#if defined(_WIN64)
(1 << JSC::X86Registers::esi) |
(1 << JSC::X86Registers::edi) |
(1 << X86Registers::esi) |
(1 << X86Registers::edi) |
#endif
(1 << JSC::X86Registers::ebp) |
(1 << JSC::X86Registers::r12) |
(1 << JSC::X86Registers::r13) |
(1 << JSC::X86Registers::r14) |
(1 << JSC::X86Registers::r15);
(1 << X86Registers::ebp) |
(1 << X86Registers::r12) |
(1 << X86Registers::r13) |
(1 << X86Registers::r14) |
(1 << X86Registers::r15);
static const uint32_t WrapperMask = VolatileMask;
static const uint32_t SingleByteRegs = VolatileMask | NonVolatileMask;
static const uint32_t NonAllocatableMask =
(1 << JSC::X86Registers::esp) |
(1 << JSC::X86Registers::r11); // This is ScratchReg.
(1 << X86Registers::esp) |
(1 << X86Registers::r11); // This is ScratchReg.
// Registers that can be allocated without being saved, generally.
static const uint32_t TempMask = VolatileMask & ~NonAllocatableMask;
@ -113,11 +113,11 @@ class Registers {
// Registers returned from a JS -> JS call.
static const uint32_t JSCallMask =
(1 << JSC::X86Registers::ecx);
(1 << X86Registers::ecx);
// Registers returned from a JS -> C call.
static const uint32_t CallMask =
(1 << JSC::X86Registers::eax);
(1 << X86Registers::eax);
};
// Smallest integer type that can hold a register bitmask.
@ -125,7 +125,7 @@ typedef uint16_t PackedRegisterMask;
class FloatRegisters {
public:
typedef JSC::X86Registers::XMMRegisterID Code;
typedef X86Registers::XMMRegisterID Code;
typedef uint32_t SetType;
static const char *GetName(Code code) {
static const char * const Names[] = { "xmm0", "xmm1", "xmm2", "xmm3",
@ -143,7 +143,7 @@ class FloatRegisters {
return Invalid;
}
static const Code Invalid = JSC::X86Registers::invalid_xmm;
static const Code Invalid = X86Registers::invalid_xmm;
static const uint32_t Total = 16;
static const uint32_t TotalPhys = 16;
@ -154,12 +154,12 @@ class FloatRegisters {
static const uint32_t AllDoubleMask = AllMask;
static const uint32_t VolatileMask =
#if defined(_WIN64)
(1 << JSC::X86Registers::xmm0) |
(1 << JSC::X86Registers::xmm1) |
(1 << JSC::X86Registers::xmm2) |
(1 << JSC::X86Registers::xmm3) |
(1 << JSC::X86Registers::xmm4) |
(1 << JSC::X86Registers::xmm5);
(1 << X86Registers::xmm0) |
(1 << X86Registers::xmm1) |
(1 << X86Registers::xmm2) |
(1 << X86Registers::xmm3) |
(1 << X86Registers::xmm4) |
(1 << X86Registers::xmm5);
#else
AllMask;
#endif
@ -169,7 +169,7 @@ class FloatRegisters {
static const uint32_t WrapperMask = VolatileMask;
static const uint32_t NonAllocatableMask =
(1 << JSC::X86Registers::xmm15); // This is ScratchFloatReg.
(1 << X86Registers::xmm15); // This is ScratchFloatReg.
static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;

12
js/src/jit/x64/Assembler-x64.cpp
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@ -190,8 +190,8 @@ Assembler::executableCopy(uint8_t *buffer)
// to jump to a different code block.
continue;
}
if (JSC::X86Assembler::canRelinkJump(src, rp.target)) {
JSC::X86Assembler::setRel32(src, rp.target);
if (X86Assembler::canRelinkJump(src, rp.target)) {
X86Assembler::setRel32(src, rp.target);
} else {
// An extended jump table must exist, and its offset must be in
// range.
@ -200,11 +200,11 @@ Assembler::executableCopy(uint8_t *buffer)
// Patch the jump to go to the extended jump entry.
uint8_t *entry = buffer + extendedJumpTable_ + i * SizeOfJumpTableEntry;
JSC::X86Assembler::setRel32(src, entry);
X86Assembler::setRel32(src, entry);
// Now patch the pointer, note that we need to align it to
// *after* the extended jump, i.e. after the 64-bit immedate.
JSC::X86Assembler::repatchPointer(entry + SizeOfExtendedJump, rp.target);
X86Assembler::repatchPointer(entry + SizeOfExtendedJump, rp.target);
}
}
}
@ -242,13 +242,13 @@ class RelocationIterator
JitCode *
Assembler::CodeFromJump(JitCode *code, uint8_t *jump)
{
uint8_t *target = (uint8_t *)JSC::X86Assembler::getRel32Target(jump);
uint8_t *target = (uint8_t *)X86Assembler::getRel32Target(jump);
if (target >= code->raw() && target < code->raw() + code->instructionsSize()) {
// This jump is within the code buffer, so it has been redirected to
// the extended jump table.
JS_ASSERT(target + SizeOfJumpTableEntry <= code->raw() + code->instructionsSize());
target = (uint8_t *)JSC::X86Assembler::getPointer(target + SizeOfExtendedJump);
target = (uint8_t *)X86Assembler::getPointer(target + SizeOfExtendedJump);
}
return JitCode::FromExecutable(target);

76
js/src/jit/x64/Assembler-x64.h
Просмотреть файл

@ -16,39 +16,39 @@
namespace js {
namespace jit {
static MOZ_CONSTEXPR_VAR Register rax = { JSC::X86Registers::eax };
static MOZ_CONSTEXPR_VAR Register rbx = { JSC::X86Registers::ebx };
static MOZ_CONSTEXPR_VAR Register rcx = { JSC::X86Registers::ecx };
static MOZ_CONSTEXPR_VAR Register rdx = { JSC::X86Registers::edx };
static MOZ_CONSTEXPR_VAR Register rsi = { JSC::X86Registers::esi };
static MOZ_CONSTEXPR_VAR Register rdi = { JSC::X86Registers::edi };
static MOZ_CONSTEXPR_VAR Register rbp = { JSC::X86Registers::ebp };
static MOZ_CONSTEXPR_VAR Register r8 = { JSC::X86Registers::r8 };
static MOZ_CONSTEXPR_VAR Register r9 = { JSC::X86Registers::r9 };
static MOZ_CONSTEXPR_VAR Register r10 = { JSC::X86Registers::r10 };
static MOZ_CONSTEXPR_VAR Register r11 = { JSC::X86Registers::r11 };
static MOZ_CONSTEXPR_VAR Register r12 = { JSC::X86Registers::r12 };
static MOZ_CONSTEXPR_VAR Register r13 = { JSC::X86Registers::r13 };
static MOZ_CONSTEXPR_VAR Register r14 = { JSC::X86Registers::r14 };
static MOZ_CONSTEXPR_VAR Register r15 = { JSC::X86Registers::r15 };
static MOZ_CONSTEXPR_VAR Register rsp = { JSC::X86Registers::esp };
static MOZ_CONSTEXPR_VAR Register rax = { X86Registers::eax };
static MOZ_CONSTEXPR_VAR Register rbx = { X86Registers::ebx };
static MOZ_CONSTEXPR_VAR Register rcx = { X86Registers::ecx };
static MOZ_CONSTEXPR_VAR Register rdx = { X86Registers::edx };
static MOZ_CONSTEXPR_VAR Register rsi = { X86Registers::esi };
static MOZ_CONSTEXPR_VAR Register rdi = { X86Registers::edi };
static MOZ_CONSTEXPR_VAR Register rbp = { X86Registers::ebp };
static MOZ_CONSTEXPR_VAR Register r8 = { X86Registers::r8 };
static MOZ_CONSTEXPR_VAR Register r9 = { X86Registers::r9 };
static MOZ_CONSTEXPR_VAR Register r10 = { X86Registers::r10 };
static MOZ_CONSTEXPR_VAR Register r11 = { X86Registers::r11 };
static MOZ_CONSTEXPR_VAR Register r12 = { X86Registers::r12 };
static MOZ_CONSTEXPR_VAR Register r13 = { X86Registers::r13 };
static MOZ_CONSTEXPR_VAR Register r14 = { X86Registers::r14 };
static MOZ_CONSTEXPR_VAR Register r15 = { X86Registers::r15 };
static MOZ_CONSTEXPR_VAR Register rsp = { X86Registers::esp };
static MOZ_CONSTEXPR_VAR FloatRegister xmm0 = { JSC::X86Registers::xmm0 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm1 = { JSC::X86Registers::xmm1 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm2 = { JSC::X86Registers::xmm2 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm3 = { JSC::X86Registers::xmm3 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm4 = { JSC::X86Registers::xmm4 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm5 = { JSC::X86Registers::xmm5 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm6 = { JSC::X86Registers::xmm6 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm7 = { JSC::X86Registers::xmm7 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm8 = { JSC::X86Registers::xmm8 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm9 = { JSC::X86Registers::xmm9 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm10 = { JSC::X86Registers::xmm10 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm11 = { JSC::X86Registers::xmm11 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm12 = { JSC::X86Registers::xmm12 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm13 = { JSC::X86Registers::xmm13 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm14 = { JSC::X86Registers::xmm14 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm15 = { JSC::X86Registers::xmm15 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm0 = { X86Registers::xmm0 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm1 = { X86Registers::xmm1 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm2 = { X86Registers::xmm2 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm3 = { X86Registers::xmm3 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm4 = { X86Registers::xmm4 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm5 = { X86Registers::xmm5 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm6 = { X86Registers::xmm6 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm7 = { X86Registers::xmm7 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm8 = { X86Registers::xmm8 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm9 = { X86Registers::xmm9 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm10 = { X86Registers::xmm10 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm11 = { X86Registers::xmm11 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm12 = { X86Registers::xmm12 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm13 = { X86Registers::xmm13 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm14 = { X86Registers::xmm14 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm15 = { X86Registers::xmm15 };
// X86-common synonyms.
static MOZ_CONSTEXPR_VAR Register eax = rax;
@ -60,8 +60,8 @@ static MOZ_CONSTEXPR_VAR Register edi = rdi;
static MOZ_CONSTEXPR_VAR Register ebp = rbp;
static MOZ_CONSTEXPR_VAR Register esp = rsp;
static MOZ_CONSTEXPR_VAR Register InvalidReg = { JSC::X86Registers::invalid_reg };
static MOZ_CONSTEXPR_VAR FloatRegister InvalidFloatReg = { JSC::X86Registers::invalid_xmm };
static MOZ_CONSTEXPR_VAR Register InvalidReg = { X86Registers::invalid_reg };
static MOZ_CONSTEXPR_VAR FloatRegister InvalidFloatReg = { X86Registers::invalid_xmm };
static MOZ_CONSTEXPR_VAR Register StackPointer = rsp;
static MOZ_CONSTEXPR_VAR Register FramePointer = rbp;
@ -698,7 +698,7 @@ class Assembler : public AssemblerX86Shared
}
void j(Condition cond, ImmPtr target,
Relocation::Kind reloc = Relocation::HARDCODED) {
JmpSrc src = masm.jCC(static_cast<JSC::X86Assembler::Condition>(cond));
JmpSrc src = masm.jCC(static_cast<X86Assembler::Condition>(cond));
addPendingJump(src, target, reloc);
}
@ -748,10 +748,10 @@ class Assembler : public AssemblerX86Shared
static inline void
PatchJump(CodeLocationJump jump, CodeLocationLabel label)
{
if (JSC::X86Assembler::canRelinkJump(jump.raw(), label.raw())) {
JSC::X86Assembler::setRel32(jump.raw(), label.raw());
if (X86Assembler::canRelinkJump(jump.raw(), label.raw())) {
X86Assembler::setRel32(jump.raw(), label.raw());
} else {
JSC::X86Assembler::setRel32(jump.raw(), jump.jumpTableEntry());
X86Assembler::setRel32(jump.raw(), jump.jumpTableEntry());
Assembler::PatchJumpEntry(jump.jumpTableEntry(), label.raw());
}
}

18
js/src/jit/x64/MacroAssembler-x64.h
Просмотреть файл

@ -599,7 +599,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
}
void branch32(Condition cond, AbsoluteAddress lhs, Imm32 rhs, Label *label) {
if (JSC::X86Assembler::isAddressImmediate(lhs.addr)) {
if (X86Assembler::isAddressImmediate(lhs.addr)) {
branch32(cond, Operand(lhs), rhs, label);
} else {
mov(ImmPtr(lhs.addr), ScratchReg);
@ -607,7 +607,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
}
}
void branch32(Condition cond, AbsoluteAddress lhs, Register rhs, Label *label) {
if (JSC::X86Assembler::isAddressImmediate(lhs.addr)) {
if (X86Assembler::isAddressImmediate(lhs.addr)) {
branch32(cond, Operand(lhs), rhs, label);
} else {
mov(ImmPtr(lhs.addr), ScratchReg);
@ -615,7 +615,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
}
}
void branchTest32(Condition cond, AbsoluteAddress address, Imm32 imm, Label *label) {
if (JSC::X86Assembler::isAddressImmediate(address.addr)) {
if (X86Assembler::isAddressImmediate(address.addr)) {
testl(Operand(address), imm);
} else {
mov(ImmPtr(address.addr), ScratchReg);
@ -627,7 +627,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
// Specialization for AbsoluteAddress.
void branchPtr(Condition cond, AbsoluteAddress addr, Register ptr, Label *label) {
JS_ASSERT(ptr != ScratchReg);
if (JSC::X86Assembler::isAddressImmediate(addr.addr)) {
if (X86Assembler::isAddressImmediate(addr.addr)) {
branchPtr(cond, Operand(addr), ptr, label);
} else {
mov(ImmPtr(addr.addr), ScratchReg);
@ -716,7 +716,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
movq(imm, dest);
}
void loadPtr(AbsoluteAddress address, Register dest) {
if (JSC::X86Assembler::isAddressImmediate(address.addr)) {
if (X86Assembler::isAddressImmediate(address.addr)) {
movq(Operand(address), dest);
} else {
mov(ImmPtr(address.addr), ScratchReg);
@ -737,7 +737,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
shlq(Imm32(1), dest);
}
void load32(AbsoluteAddress address, Register dest) {
if (JSC::X86Assembler::isAddressImmediate(address.addr)) {
if (X86Assembler::isAddressImmediate(address.addr)) {
movl(Operand(address), dest);
} else {
mov(ImmPtr(address.addr), ScratchReg);
@ -769,7 +769,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
movq(src, dest);
}
void storePtr(Register src, AbsoluteAddress address) {
if (JSC::X86Assembler::isAddressImmediate(address.addr)) {
if (X86Assembler::isAddressImmediate(address.addr)) {
movq(src, Operand(address));
} else {
mov(ImmPtr(address.addr), ScratchReg);
@ -777,7 +777,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
}
}
void store32(Register src, AbsoluteAddress address) {
if (JSC::X86Assembler::isAddressImmediate(address.addr)) {
if (X86Assembler::isAddressImmediate(address.addr)) {
movl(src, Operand(address));
} else {
mov(ImmPtr(address.addr), ScratchReg);
@ -1299,7 +1299,7 @@ class MacroAssemblerX64 : public MacroAssemblerX86Shared
}
void inc64(AbsoluteAddress dest) {
if (JSC::X86Assembler::isAddressImmediate(dest.addr)) {
if (X86Assembler::isAddressImmediate(dest.addr)) {
addPtr(Imm32(1), Operand(dest));
} else {
mov(ImmPtr(dest.addr), ScratchReg);

46
js/src/jit/x86/Architecture-x86.h
Просмотреть файл

@ -7,7 +7,7 @@
#ifndef jit_x86_Architecture_x86_h
#define jit_x86_Architecture_x86_h
#include "assembler/assembler/X86Assembler.h"
#include "jit/shared/BaseAssembler-x86-shared.h"
namespace js {
namespace jit {
@ -35,7 +35,7 @@ static const uint32_t BAILOUT_TABLE_ENTRY_SIZE = 5;
class Registers {
public:
typedef JSC::X86Registers::RegisterID Code;
typedef X86Registers::RegisterID Code;
typedef uint8_t SetType;
static uint32_t SetSize(SetType x) {
static_assert(sizeof(SetType) == 1, "SetType must be 8 bits");
@ -61,8 +61,8 @@ class Registers {
return Invalid;
}
static const Code StackPointer = JSC::X86Registers::esp;
static const Code Invalid = JSC::X86Registers::invalid_reg;
static const Code StackPointer = X86Registers::esp;
static const Code Invalid = X86Registers::invalid_reg;
static const uint32_t Total = 8;
static const uint32_t TotalPhys = 8;
@ -73,28 +73,28 @@ class Registers {
static const uint32_t ArgRegMask = 0;
static const uint32_t VolatileMask =
(1 << JSC::X86Registers::eax) |
(1 << JSC::X86Registers::ecx) |
(1 << JSC::X86Registers::edx);
(1 << X86Registers::eax) |
(1 << X86Registers::ecx) |
(1 << X86Registers::edx);
static const uint32_t NonVolatileMask =
(1 << JSC::X86Registers::ebx) |
(1 << JSC::X86Registers::esi) |
(1 << JSC::X86Registers::edi) |
(1 << JSC::X86Registers::ebp);
(1 << X86Registers::ebx) |
(1 << X86Registers::esi) |
(1 << X86Registers::edi) |
(1 << X86Registers::ebp);
static const uint32_t WrapperMask =
VolatileMask |
(1 << JSC::X86Registers::ebx);
(1 << X86Registers::ebx);
static const uint32_t SingleByteRegs =
(1 << JSC::X86Registers::eax) |
(1 << JSC::X86Registers::ecx) |
(1 << JSC::X86Registers::edx) |
(1 << JSC::X86Registers::ebx);
(1 << X86Registers::eax) |
(1 << X86Registers::ecx) |
(1 << X86Registers::edx) |
(1 << X86Registers::ebx);
static const uint32_t NonAllocatableMask =
(1 << JSC::X86Registers::esp);
(1 << X86Registers::esp);
static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
@ -103,12 +103,12 @@ class Registers {
// Registers returned from a JS -> JS call.
static const uint32_t JSCallMask =
(1 << JSC::X86Registers::ecx) |
(1 << JSC::X86Registers::edx);
(1 << X86Registers::ecx) |
(1 << X86Registers::edx);
// Registers returned from a JS -> C call.
static const uint32_t CallMask =
(1 << JSC::X86Registers::eax);
(1 << X86Registers::eax);
};
// Smallest integer type that can hold a register bitmask.
@ -116,7 +116,7 @@ typedef uint8_t PackedRegisterMask;
class FloatRegisters {
public:
typedef JSC::X86Registers::XMMRegisterID Code;
typedef X86Registers::XMMRegisterID Code;
typedef uint32_t SetType;
static const char *GetName(Code code) {
static const char * const Names[] = { "xmm0", "xmm1", "xmm2", "xmm3",
@ -132,7 +132,7 @@ class FloatRegisters {
return Invalid;
}
static const Code Invalid = JSC::X86Registers::invalid_xmm;
static const Code Invalid = X86Registers::invalid_xmm;
static const uint32_t Total = 8;
static const uint32_t TotalPhys = 8;
@ -146,7 +146,7 @@ class FloatRegisters {
static const uint32_t WrapperMask = VolatileMask;
static const uint32_t NonAllocatableMask =
(1 << JSC::X86Registers::xmm7);
(1 << X86Registers::xmm7);
static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
};

4
js/src/jit/x86/Assembler-x86.cpp
Просмотреть файл

@ -48,7 +48,7 @@ Assembler::executableCopy(uint8_t *buffer)
for (size_t i = 0; i < jumps_.length(); i++) {
RelativePatch &rp = jumps_[i];
JSC::X86Assembler::setRel32(buffer + rp.offset, rp.target);
X86Assembler::setRel32(buffer + rp.offset, rp.target);
}
}
@ -77,7 +77,7 @@ class RelocationIterator
static inline JitCode *
CodeFromJump(uint8_t *jump)
{
uint8_t *target = (uint8_t *)JSC::X86Assembler::getRel32Target(jump);
uint8_t *target = (uint8_t *)X86Assembler::getRel32Target(jump);
return JitCode::FromExecutable(target);
}

46
js/src/jit/x86/Assembler-x86.h
Просмотреть файл

@ -9,35 +9,35 @@
#include "mozilla/ArrayUtils.h"
#include "assembler/assembler/X86Assembler.h"
#include "jit/CompactBuffer.h"
#include "jit/IonCode.h"
#include "jit/JitCompartment.h"
#include "jit/shared/Assembler-shared.h"
#include "jit/shared/BaseAssembler-x86-shared.h"
namespace js {
namespace jit {
static MOZ_CONSTEXPR_VAR Register eax = { JSC::X86Registers::eax };
static MOZ_CONSTEXPR_VAR Register ecx = { JSC::X86Registers::ecx };
static MOZ_CONSTEXPR_VAR Register edx = { JSC::X86Registers::edx };
static MOZ_CONSTEXPR_VAR Register ebx = { JSC::X86Registers::ebx };
static MOZ_CONSTEXPR_VAR Register esp = { JSC::X86Registers::esp };
static MOZ_CONSTEXPR_VAR Register ebp = { JSC::X86Registers::ebp };
static MOZ_CONSTEXPR_VAR Register esi = { JSC::X86Registers::esi };
static MOZ_CONSTEXPR_VAR Register edi = { JSC::X86Registers::edi };
static MOZ_CONSTEXPR_VAR Register eax = { X86Registers::eax };
static MOZ_CONSTEXPR_VAR Register ecx = { X86Registers::ecx };
static MOZ_CONSTEXPR_VAR Register edx = { X86Registers::edx };
static MOZ_CONSTEXPR_VAR Register ebx = { X86Registers::ebx };
static MOZ_CONSTEXPR_VAR Register esp = { X86Registers::esp };
static MOZ_CONSTEXPR_VAR Register ebp = { X86Registers::ebp };
static MOZ_CONSTEXPR_VAR Register esi = { X86Registers::esi };
static MOZ_CONSTEXPR_VAR Register edi = { X86Registers::edi };
static MOZ_CONSTEXPR_VAR FloatRegister xmm0 = { JSC::X86Registers::xmm0 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm1 = { JSC::X86Registers::xmm1 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm2 = { JSC::X86Registers::xmm2 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm3 = { JSC::X86Registers::xmm3 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm4 = { JSC::X86Registers::xmm4 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm5 = { JSC::X86Registers::xmm5 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm6 = { JSC::X86Registers::xmm6 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm7 = { JSC::X86Registers::xmm7 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm0 = { X86Registers::xmm0 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm1 = { X86Registers::xmm1 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm2 = { X86Registers::xmm2 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm3 = { X86Registers::xmm3 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm4 = { X86Registers::xmm4 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm5 = { X86Registers::xmm5 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm6 = { X86Registers::xmm6 };
static MOZ_CONSTEXPR_VAR FloatRegister xmm7 = { X86Registers::xmm7 };
static MOZ_CONSTEXPR_VAR Register InvalidReg = { JSC::X86Registers::invalid_reg };
static MOZ_CONSTEXPR_VAR FloatRegister InvalidFloatReg = { JSC::X86Registers::invalid_xmm };
static MOZ_CONSTEXPR_VAR Register InvalidReg = { X86Registers::invalid_reg };
static MOZ_CONSTEXPR_VAR FloatRegister InvalidFloatReg = { X86Registers::invalid_xmm };
static MOZ_CONSTEXPR_VAR Register JSReturnReg_Type = ecx;
static MOZ_CONSTEXPR_VAR Register JSReturnReg_Data = edx;
@ -160,7 +160,7 @@ PatchJump(CodeLocationJump jump, CodeLocationLabel label)
JS_ASSERT(((*x >= 0x80 && *x <= 0x8F) && *(x - 1) == 0x0F) ||
(*x == 0xE9));
#endif
JSC::X86Assembler::setRel32(jump.raw(), label.raw());
X86Assembler::setRel32(jump.raw(), label.raw());
}
static inline void
PatchBackedge(CodeLocationJump &jump_, CodeLocationLabel label, JitRuntime::BackedgeTarget target)
@ -371,7 +371,7 @@ class Assembler : public AssemblerX86Shared
}
void j(Condition cond, ImmPtr target,
Relocation::Kind reloc = Relocation::HARDCODED) {
JmpSrc src = masm.jCC(static_cast<JSC::X86Assembler::Condition>(cond));
JmpSrc src = masm.jCC(static_cast<X86Assembler::Condition>(cond));
addPendingJump(src, target, reloc);
}
@ -413,9 +413,9 @@ class Assembler : public AssemblerX86Shared
void retarget(Label *label, ImmPtr target, Relocation::Kind reloc) {
if (label->used()) {
bool more;
JSC::X86Assembler::JmpSrc jmp(label->offset());
X86Assembler::JmpSrc jmp(label->offset());
do {
JSC::X86Assembler::JmpSrc next;
X86Assembler::JmpSrc next;
more = masm.nextJump(jmp, &next);
addPendingJump(jmp, target, reloc);
jmp = next;