зеркало из https://github.com/mozilla/gecko-dev.git
Bug 585708 - Part 2: Move CPUID code out of SSE.h and into SSE.cpp. r,a2.0=dbaron
--HG-- extra : rebase_source : 70d336e2e0f4df5d807bc520c44740e17d69eb40
This commit is contained in:
Justin Lebar
Родитель
32d92cb466
Коммит
34c407b464
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@ -39,6 +39,107 @@
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#include "SSE.h"
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namespace {
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// SSE.h has parallel #ifs which declare MOZILLA_SSE_HAVE_CPUID_DETECTION.
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// We can't declare these functions in the header file, however, because
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// <intrin.h> conflicts with <windows.h> on MSVC 2005, and some files want to
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// include both SSE.h and <windows.h>.
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#if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) && (defined(__i386__) || defined(__x86_64__))
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// cpuid.h is available on gcc 4.3 and higher on i386 and x86_64
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#include <cpuid.h>
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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static bool
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has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)
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{
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unsigned int regs[4];
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return __get_cpuid(level, ®s[0], ®s[1], ®s[2], ®s[3]) &&
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(regs[reg] & bit);
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}
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#elif defined(_MSC_VER) && _MSC_VER >= 1400 && (defined(_M_IX86) || defined(_M_AMD64))
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// MSVC 2005 or newer on x86-32 or x86-64
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#include <intrin.h>
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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static bool
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has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)
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{
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// Check that the level in question is supported.
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int regs[4];
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__cpuid(regs, level & 0x80000000u);
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if (unsigned(regs[0]) < level)
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return false;
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__cpuid(regs, level);
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return !!(unsigned(regs[reg]) & bit);
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}
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#elif defined(__SUNPRO_CC) && (defined(__i386) || defined(__x86_64__))
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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#ifdef __i386
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static void
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moz_cpuid(int CPUInfo[4], int InfoType)
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{
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asm (
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"xchg %esi, %ebx\n"
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"cpuid\n"
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"movl %eax, (%edi)\n"
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"movl %ebx, 4(%edi)\n"
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"movl %ecx, 8(%edi)\n"
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"movl %edx, 12(%edi)\n"
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"xchg %esi, %ebx\n"
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:
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: "a"(InfoType), // %eax
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"D"(CPUInfo) // %edi
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: "%ecx", "%edx", "%esi"
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);
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}
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#else
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static void
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moz_cpuid(int CPUInfo[4], int InfoType)
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{
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asm (
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"xchg %rsi, %rbx\n"
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"cpuid\n"
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"movl %eax, (%rdi)\n"
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"movl %ebx, 4(%rdi)\n"
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"movl %ecx, 8(%rdi)\n"
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"movl %edx, 12(%rdi)\n"
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"xchg %rsi, %rbx\n"
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:
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: "a"(InfoType), // %eax
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"D"(CPUInfo) // %rdi
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: "%ecx", "%edx", "%rsi"
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);
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}
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#endif
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static bool
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has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)
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{
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// Check that the level in question is supported.
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volatile int regs[4];
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moz_cpuid((int *)regs, level & 0x80000000u);
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if (unsigned(regs[0]) < level)
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return false;
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moz_cpuid((int *)regs, level);
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return !!(unsigned(regs[reg]) & bit);
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}
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#endif // end CPUID declarations
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}
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namespace mozilla {
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namespace sse_private {
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@ -46,48 +147,38 @@ namespace sse_private {
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#if defined(MOZILLA_SSE_HAVE_CPUID_DETECTION)
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#if !defined(MOZILLA_PRESUME_MMX)
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bool mmx_enabled
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= sse_private::has_cpuid_bit(1u, sse_private::edx, (1u<<23));
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bool mmx_enabled = has_cpuid_bit(1u, edx, (1u<<23));
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#endif
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#if !defined(MOZILLA_PRESUME_SSE)
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bool sse_enabled
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= sse_private::has_cpuid_bit(1u, sse_private::edx, (1u<<25));
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bool sse_enabled = has_cpuid_bit(1u, edx, (1u<<25));
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#endif
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#if !defined(MOZILLA_PRESUME_SSE2)
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bool sse2_enabled
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= sse_private::has_cpuid_bit(1u, sse_private::edx, (1u<<26));
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bool sse2_enabled = has_cpuid_bit(1u, edx, (1u<<26));
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#endif
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#if !defined(MOZILLA_PRESUME_SSE3)
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bool sse3_enabled
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= sse_private::has_cpuid_bit(1u, sse_private::ecx, (1u<<0));
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bool sse3_enabled = has_cpuid_bit(1u, ecx, (1u<<0));
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#endif
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#if !defined(MOZILLA_PRESUME_SSSE3)
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bool ssse3_enabled
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= sse_private::has_cpuid_bit(1u, sse_private::ecx, (1u<<9));
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bool ssse3_enabled = has_cpuid_bit(1u, ecx, (1u<<9));
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#endif
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#if !defined(MOZILLA_PRESUME_SSE4A)
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bool sse4a_enabled
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= sse_private::has_cpuid_bit(0x80000001u, sse_private::ecx, (1u<<6));
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bool sse4a_enabled = has_cpuid_bit(0x80000001u, ecx, (1u<<6));
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#endif
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#if !defined(MOZILLA_PRESUME_SSE4_1)
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bool sse4_1_enabled
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= sse_private::has_cpuid_bit(1u, sse_private::ecx, (1u<<19));
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bool sse4_1_enabled = has_cpuid_bit(1u, ecx, (1u<<19));
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#endif
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#if !defined(MOZILLA_PRESUME_SSE4_2)
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bool sse4_2_enabled
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= sse_private::has_cpuid_bit(1u, sse_private::ecx, (1u<<20));
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bool sse4_2_enabled = has_cpuid_bit(1u, ecx, (1u<<20));
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#endif
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#endif
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}
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}
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} // namespace sse_private
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} // namespace mozilla
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114
xpcom/glue/SSE.h
114
xpcom/glue/SSE.h
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@ -161,61 +161,14 @@
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#endif
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#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)
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// cpuid.h is available on gcc 4.3 and higher on i386 and x86_64
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#include <cpuid.h>
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#define MOZILLA_SSE_HAVE_CPUID_DETECTION
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namespace mozilla {
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namespace sse_private {
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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inline bool
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has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)
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{
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unsigned int regs[4];
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return __get_cpuid(level, ®s[0], ®s[1], ®s[2], ®s[3]) &&
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(regs[reg] & bit);
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}
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}
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}
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#define MOZILLA_SSE_HAVE_CPUID_DETECTION
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#endif
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#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_AMD64))
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// MSVC on x86 or amd64
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#if _MSC_VER >= 1400
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#include <intrin.h>
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#define MOZILLA_SSE_HAVE_CPUID_DETECTION
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namespace mozilla {
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namespace sse_private {
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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inline bool
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has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)
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{
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// Check that the level in question is supported.
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int regs[4];
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__cpuid(regs, level & 0x80000000u);
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if (unsigned(regs[0]) < level)
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return false;
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__cpuid(regs, level);
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return !!(unsigned(regs[reg]) & bit);
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}
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}
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}
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// MSVC 2005 or newer on x86 or amd64
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#define MOZILLA_SSE_HAVE_CPUID_DETECTION
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#endif
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#if defined(_M_AMD64)
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@ -232,67 +185,6 @@ namespace mozilla {
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#define MOZILLA_SSE_HAVE_CPUID_DETECTION
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namespace mozilla {
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namespace sse_private {
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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#ifdef __i386
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inline void
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moz_cpuid(int CPUInfo[4], int InfoType)
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{
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asm (
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"xchg %esi, %ebx\n"
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"cpuid\n"
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"movl %eax, (%edi)\n"
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"movl %ebx, 4(%edi)\n"
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"movl %ecx, 8(%edi)\n"
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"movl %edx, 12(%edi)\n"
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"xchg %esi, %ebx\n"
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:
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: "a"(InfoType), // %eax
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"D"(CPUInfo) // %edi
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: "%ecx", "%edx", "%esi"
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);
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}
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#else
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inline void
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moz_cpuid(int CPUInfo[4], int InfoType)
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{
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asm (
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"xchg %rsi, %rbx\n"
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"cpuid\n"
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"movl %eax, (%rdi)\n"
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"movl %ebx, 4(%rdi)\n"
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"movl %ecx, 8(%rdi)\n"
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"movl %edx, 12(%rdi)\n"
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"xchg %rsi, %rbx\n"
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:
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: "a"(InfoType), // %eax
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"D"(CPUInfo) // %rdi
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: "%ecx", "%edx", "%rsi"
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);
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}
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#endif
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inline bool
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has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)
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{
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// Check that the level in question is supported.
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volatile int regs[4];
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moz_cpuid((int *)regs, level & 0x80000000u);
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if (unsigned(regs[0]) < level)
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return false;
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moz_cpuid((int *)regs, level);
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return !!(unsigned(regs[reg]) & bit);
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}
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}
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}
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#if defined(__x86_64__)
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// MMX is always available on AMD64.
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#define MOZILLA_PRESUME_MMX
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