Bug 995230 - Inline Math.clz32 on ARM. r=dougc

This commit is contained in:
Marty Rosenberg 2014-08-23 12:58:22 +02:00
Родитель d7bd05a650
Коммит 4ce40cb094
6 изменённых файлов: 29 добавлений и 3 удалений

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@ -1550,6 +1550,13 @@ Assembler::as_udiv(Register rd, Register rn, Register rm, Condition c)
return writeInst(0x0730f010 | c | RN(rd) | RM(rm) | rn.code());
}
BufferOffset
Assembler::as_clz(Register dest, Register src, Condition c, Instruction *instdest)
{
return writeInst(RD(dest) | src.code() | c | 0x016f0f10, (uint32_t*)instdest);
}
// Data transfer instructions: ldr, str, ldrb, strb. Using an int to
// differentiate between 8 bits and 32 bits is overkill, but meh.
BufferOffset

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@ -1193,9 +1193,9 @@ class Assembler : public AssemblerShared
// exist, when calling with a third dest parameter, a this object is still
// needed. Dummy always happens to be null, but we shouldn't be looking at
// it in any case.
public:
static Assembler *Dummy;
public:
// For the alignment fill use NOP: 0x0320f000 or (Always | InstNOP::NopInst).
// For the nopFill use a branch to the next instruction: 0xeaffffff.
Assembler()
@ -1370,6 +1370,7 @@ class Assembler : public AssemblerShared
BufferOffset as_sdiv(Register dest, Register num, Register div, Condition c = Always);
BufferOffset as_udiv(Register dest, Register num, Register div, Condition c = Always);
BufferOffset as_clz(Register dest, Register src, Condition c = Always, Instruction *instdest = nullptr);
// Data transfer instructions: ldr, str, ldrb, strb.
// Using an int to differentiate between 8 bits and 32 bits is overkill.

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@ -973,6 +973,16 @@ CodeGeneratorARM::visitUrshD(LUrshD *ins)
return true;
}
bool
CodeGeneratorARM::visitClzI(LClzI *ins)
{
Register input = ToRegister(ins->input());
Register output = ToRegister(ins->output());
masm.ma_clz(input, output);
return true;
}
bool
CodeGeneratorARM::visitPowHalfD(LPowHalfD *ins)
{

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@ -124,6 +124,8 @@ class CodeGeneratorARM : public CodeGeneratorShared
virtual bool visitShiftI(LShiftI *ins);
virtual bool visitUrshD(LUrshD *ins);
virtual bool visitClzI(LClzI *ins);
virtual bool visitTestIAndBranch(LTestIAndBranch *test);
virtual bool visitCompare(LCompare *comp);
virtual bool visitCompareAndBranch(LCompareAndBranch *comp);

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@ -1004,7 +1004,12 @@ MacroAssemblerARM::ma_udiv(Register num, Register div, Register dest, Condition
{
as_udiv(dest, num, div, cond);
}
// Miscelanous instructions
void
MacroAssemblerARM::ma_clz(Register src, Register dest, Condition cond)
{
as_clz(dest, src, cond);
}
// Memory.
// Shortcut for when we know we're transferring 32 bits of data.
void

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@ -277,7 +277,8 @@ class MacroAssemblerARM : public Assembler
// Division - depends on integer divide instructions being supported.
void ma_sdiv(Register num, Register div, Register dest, Condition cond = Always);
void ma_udiv(Register num, Register div, Register dest, Condition cond = Always);
// Misc operations
void ma_clz(Register src, Register dest, Condition cond = Always);
// Memory:
// Shortcut for when we know we're transferring 32 bits of data.
void ma_dtr(LoadStore ls, Register rn, Imm32 offset, Register rt,