зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1708743 - Enable more AVX tests. r=lth
To enable AVX2 for test: * makes isAVXPresent cross-platform * ignore codegen tests (produced code with AVX2 is different) * fix shuffle tests: make ALIGNR three-address * fix copysign tests Differential Revision: https://phabricator.services.mozilla.com/D134113
This commit is contained in:
Родитель
8ea4f707f7
Коммит
5b35493461
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@ -4031,13 +4031,15 @@ static bool DisplayName(JSContext* cx, unsigned argc, Value* vp) {
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return true;
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}
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#if defined(JS_CODEGEN_X64) || defined(JS_CODEGEN_X86)
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static bool IsAvxPresent(JSContext* cx, unsigned argc, Value* vp) {
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CallArgs args = CallArgsFromVp(argc, vp);
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#if defined(JS_CODEGEN_X64) || defined(JS_CODEGEN_X86)
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args.rval().setBoolean(jit::Assembler::HasAVX());
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#else
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args.rval().setBoolean(false);
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#endif
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return true;
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}
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#endif
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class ShellAllocationMetadataBuilder : public AllocationMetadataBuilder {
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public:
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@ -8228,11 +8230,9 @@ gc::ZealModeHelpText),
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" Returns whether the given value is a nested function in an asm.js module that has been\n"
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" both compile- and link-time validated."),
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#if defined(JS_CODEGEN_X64) || defined(JS_CODEGEN_X86)
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JS_FN_HELP("isAvxPresent", IsAvxPresent, 0, 0,
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"isAvxPresent(fn)",
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" Returns whether AVX is present and enabled."),
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#endif
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JS_FN_HELP("wasmIsSupported", WasmIsSupported, 0, 0,
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"wasmIsSupported()",
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@ -1 +1 @@
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|jit-test| test-also=--wasm-compiler=optimizing; test-also=--wasm-compiler=baseline; test-also=--test-wasm-await-tier2; test-also=--disable-wasm-huge-memory; skip-variant-if: --disable-wasm-huge-memory, !wasmHugeMemorySupported(); include:wasm.js
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|jit-test| test-also=--wasm-compiler=optimizing; test-also=--wasm-compiler=baseline; test-also=--test-wasm-await-tier2; test-also=--disable-wasm-huge-memory; skip-variant-if: --disable-wasm-huge-memory, !wasmHugeMemorySupported(); test-also=--wasm-compiler=optimizing --enable-avx; skip-variant-if: --wasm-compiler=optimizing --enable-avx, !isAvxPresent(); include:wasm.js
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@ -1,4 +1,4 @@
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x86 || getBuildConfiguration().simulator; include:codegen-x86-test.js
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x86 || getBuildConfiguration().simulator || isAvxPresent(); include:codegen-x86-test.js
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codegenTestX86_v128xLITERAL_v128(
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[['f32x4.eq', '(v128.const f32x4 1 2 3 4)',
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@ -1,4 +1,4 @@
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator; include:codegen-x64-test.js
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator || isAvxPresent(); include:codegen-x64-test.js
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// Test that there are no extraneous moves or fixups for SIMD bitselect
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// operations. See README-codegen.md for general information about this type of
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@ -1,4 +1,4 @@
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator; include:codegen-x64-test.js
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator || isAvxPresent(); include:codegen-x64-test.js
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// Test that there are no extraneous moves for various SIMD conversion
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// operations. See README-codegen.md for general information about this type of
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@ -1 +1 @@
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|jit-test| test-also=--no-wasm-simd; test-also=--wasm-compiler=baseline; test-also=--wasm-compiler=optimizing; include:wasm.js
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|jit-test| test-also=--no-wasm-simd; test-also=--wasm-compiler=baseline; test-also=--wasm-compiler=optimizing; test-also=--wasm-compiler=optimizing --enable-avx; skip-variant-if: --wasm-compiler=optimizing --enable-avx, !isAvxPresent(); include:wasm.js
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@ -1,4 +1,4 @@
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator; include:codegen-x64-test.js
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator || isAvxPresent(); include:codegen-x64-test.js
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// This checks that we emit a REX prefix that includes the SIB index when
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// appropriate.
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@ -1,4 +1,4 @@
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator; include:codegen-x64-test.js
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator || isAvxPresent(); include:codegen-x64-test.js
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// Test that there are no extraneous moves or fixups for SIMD shuffle
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// operations. See README-codegen.md for general information about this type of
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@ -1,4 +1,4 @@
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator; include:codegen-x64-test.js
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// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x64 || getBuildConfiguration().simulator || isAvxPresent(); include:codegen-x64-test.js
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// Test that there are no extraneous moves or other instructions for splat and
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// other splat-like operations that can reuse its input for its output and/or
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@ -3727,11 +3727,12 @@ class AssemblerX86Shared : public AssemblerShared {
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MOZ_CRASH("unexpected operand kind");
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}
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}
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void vpalignr(const Operand& src, FloatRegister dest, uint8_t shift) {
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void vpalignr(const Operand& src1, FloatRegister src0, FloatRegister dest,
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uint8_t shift) {
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MOZ_ASSERT(HasSSE3());
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switch (src.kind()) {
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switch (src1.kind()) {
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case Operand::FPREG:
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masm.vpalignr_irr(shift, src.fpu(), dest.encoding());
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masm.vpalignr_irr(shift, src1.fpu(), src0.encoding(), dest.encoding());
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break;
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default:
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MOZ_CRASH("unexpected operand kind");
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@ -4204,10 +4204,11 @@ class BaseAssembler : public GenericAssembler {
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base, index, scale, invalid_xmm, dst);
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}
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void vpalignr_irr(unsigned imm, XMMRegisterID src, XMMRegisterID dst) {
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void vpalignr_irr(unsigned imm, XMMRegisterID src1, XMMRegisterID src0,
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XMMRegisterID dst) {
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MOZ_ASSERT(imm < 32);
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threeByteOpImmSimd("vpalignr", VEX_PD, OP3_PALIGNR_VdqWdqIb, ESCAPE_3A, imm,
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src, invalid_xmm, dst);
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src1, src0, dst);
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}
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void vpunpcklbw_rr(XMMRegisterID src1, XMMRegisterID src0,
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@ -88,7 +88,7 @@ void MacroAssemblerX86Shared::extractLaneFloat64x2(FloatRegister input,
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moveDouble(input, output);
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}
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} else {
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vpalignr(Operand(input), output, 8);
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vpalignr(Operand(input), output, output, 8);
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}
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}
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@ -907,7 +907,7 @@ void MacroAssemblerX86Shared::packedShiftByScalarInt8x16(
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vmovd(count, scratch);
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// High bytes
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vpalignr(Operand(in), xtmp, 8);
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vpalignr(Operand(in), xtmp, xtmp, 8);
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(this->*extend)(Operand(xtmp), xtmp);
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(this->*shift)(scratch, xtmp, xtmp);
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@ -1441,7 +1441,7 @@ void MacroAssembler::permuteInt32x4(const uint32_t lanes[4], FloatRegister src,
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void MacroAssembler::concatAndRightShiftSimd128(FloatRegister rhs,
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FloatRegister lhsDest,
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uint32_t shift) {
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vpalignr(Operand(rhs), lhsDest, shift);
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vpalignr(Operand(rhs), lhsDest, lhsDest, shift);
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}
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void MacroAssembler::leftShiftSimd128(Imm32 count, FloatRegister src,
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@ -2902,7 +2902,7 @@ void MacroAssembler::widenLowInt8x16(FloatRegister src, FloatRegister dest) {
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}
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void MacroAssembler::widenHighInt8x16(FloatRegister src, FloatRegister dest) {
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vpalignr(Operand(src), dest, 8);
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vpalignr(Operand(src), dest, dest, 8);
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vpmovsxbw(Operand(dest), dest);
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}
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@ -2913,7 +2913,7 @@ void MacroAssembler::unsignedWidenLowInt8x16(FloatRegister src,
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void MacroAssembler::unsignedWidenHighInt8x16(FloatRegister src,
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FloatRegister dest) {
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vpalignr(Operand(src), dest, 8);
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vpalignr(Operand(src), dest, dest, 8);
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vpmovzxbw(Operand(dest), dest);
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}
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@ -2922,7 +2922,7 @@ void MacroAssembler::widenLowInt16x8(FloatRegister src, FloatRegister dest) {
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}
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void MacroAssembler::widenHighInt16x8(FloatRegister src, FloatRegister dest) {
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vpalignr(Operand(src), dest, 8);
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vpalignr(Operand(src), dest, dest, 8);
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vpmovsxwd(Operand(dest), dest);
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}
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@ -2933,7 +2933,7 @@ void MacroAssembler::unsignedWidenLowInt16x8(FloatRegister src,
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void MacroAssembler::unsignedWidenHighInt16x8(FloatRegister src,
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FloatRegister dest) {
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vpalignr(Operand(src), dest, 8);
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vpalignr(Operand(src), dest, dest, 8);
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vpmovzxwd(Operand(dest), dest);
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}
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@ -2073,13 +2073,25 @@ void MacroAssembler::copySignDouble(FloatRegister lhs, FloatRegister rhs,
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FloatRegister output) {
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ScratchDoubleScope scratch(*this);
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double clearSignMask = mozilla::BitwiseCast<double>(INT64_MAX);
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loadConstantDouble(clearSignMask, scratch);
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vandpd(scratch, lhs, output);
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// TODO Support AVX2
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if (rhs == output) {
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MOZ_ASSERT(lhs != rhs);
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double keepSignMask = mozilla::BitwiseCast<double>(INT64_MIN);
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loadConstantDouble(keepSignMask, scratch);
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vandpd(scratch, rhs, output);
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double keepSignMask = mozilla::BitwiseCast<double>(INT64_MIN);
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loadConstantDouble(keepSignMask, scratch);
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vandpd(rhs, scratch, scratch);
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double clearSignMask = mozilla::BitwiseCast<double>(INT64_MAX);
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loadConstantDouble(clearSignMask, scratch);
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vandpd(lhs, scratch, scratch);
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} else {
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double clearSignMask = mozilla::BitwiseCast<double>(INT64_MAX);
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loadConstantDouble(clearSignMask, scratch);
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vandpd(scratch, lhs, output);
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double keepSignMask = mozilla::BitwiseCast<double>(INT64_MIN);
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loadConstantDouble(keepSignMask, scratch);
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vandpd(rhs, scratch, scratch);
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}
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vorpd(scratch, output, output);
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}
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@ -2088,13 +2100,25 @@ void MacroAssembler::copySignFloat32(FloatRegister lhs, FloatRegister rhs,
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FloatRegister output) {
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ScratchFloat32Scope scratch(*this);
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float clearSignMask = mozilla::BitwiseCast<float>(INT32_MAX);
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loadConstantFloat32(clearSignMask, scratch);
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vandps(scratch, lhs, output);
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// TODO Support AVX2
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if (rhs == output) {
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MOZ_ASSERT(lhs != rhs);
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float keepSignMask = mozilla::BitwiseCast<float>(INT32_MIN);
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loadConstantFloat32(keepSignMask, scratch);
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vandps(scratch, output, output);
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float keepSignMask = mozilla::BitwiseCast<float>(INT32_MIN);
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loadConstantFloat32(keepSignMask, scratch);
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vandps(rhs, scratch, scratch);
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float clearSignMask = mozilla::BitwiseCast<float>(INT32_MAX);
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loadConstantFloat32(clearSignMask, scratch);
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vandps(lhs, scratch, scratch);
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} else {
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float clearSignMask = mozilla::BitwiseCast<float>(INT32_MAX);
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loadConstantFloat32(clearSignMask, scratch);
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vandps(scratch, lhs, output);
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float keepSignMask = mozilla::BitwiseCast<float>(INT32_MIN);
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loadConstantFloat32(keepSignMask, scratch);
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vandps(rhs, scratch, scratch);
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}
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vorps(scratch, output, output);
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}
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