Backed out changeset 1daa455a877d (bug 1285074) for spidermonkey bustage

--HG--
extra : rebase_source : 68e71978de09db3191b65cd22f938f2f569ae3c6

js/src/jit/arm/Simulator-arm.cpp

@@ -1051,8 +1051,8 @@ FlushICacheLocked(Simulator::ICacheMap& i_cache, void* start_addr, size_t size)
         FlushOnePageLocked(i_cache, start, size);
 }
 
-void
-Simulator::checkICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* instr)
+static void
+CheckICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* instr)
 {
     intptr_t address = reinterpret_cast<intptr_t>(instr);
     void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
@@ -1062,27 +1062,11 @@ Simulator::checkICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* inst
     char* cache_valid_byte = cache_page->validityByte(offset);
     bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID);
     char* cached_line = cache_page->cachedData(offset & ~CachePage::kLineMask);
-
-    // Read all state before considering signal handler effects.
-    int cmpret = 0;
     if (cache_hit) {
         // Check that the data in memory matches the contents of the I-cache.
-        cmpret = memcmp(reinterpret_cast<void*>(instr),
-                        cache_page->cachedData(offset),
-                        SimInstruction::kInstrSize);
-    }
-
-    // Check for signal handler interruption between reading state and asserting.
-    // It is safe for the signal to arrive during the !cache_hit path, since it
-    // will be cleared the next time this function is called.
-    if (cacheInvalidatedBySignalHandler_) {
-        i_cache.clear();
-        cacheInvalidatedBySignalHandler_ = false;
-        return;
-    }
-
-    if (cache_hit) {
-        MOZ_ASSERT(cmpret == 0);
+        MOZ_ASSERT(memcmp(reinterpret_cast<void*>(instr),
+                          cache_page->cachedData(offset),
+                          SimInstruction::kInstrSize) == 0);
     } else {
         // Cache miss. Load memory into the cache.
         memcpy(cached_line, line, CachePage::kLineLength);
@@ -1144,7 +1128,6 @@ Simulator::Simulator(JSContext* cx)
     single_stepping_ = false;
     single_step_callback_ = nullptr;
     single_step_callback_arg_ = nullptr;
-    cacheInvalidatedBySignalHandler_ = false;
     skipCalleeSavedRegsCheck = false;
 
     // Set up architecture state.
@@ -4664,7 +4647,7 @@ Simulator::instructionDecode(SimInstruction* instr)
 {
     if (Simulator::ICacheCheckingEnabled) {
         AutoLockSimulatorCache als(this);
-        checkICacheLocked(icache(), instr);
+        CheckICacheLocked(icache(), instr);
     }
 
     pc_modified_ = false;

js/src/jit/arm/Simulator-arm.h

@@ -37,8 +37,6 @@
 #include "threading/Thread.h"
 #include "vm/MutexIDs.h"
 
-#include "mozilla/Atomics.h"
-
 namespace js {
 namespace jit {
 
@@ -347,30 +345,10 @@ class Simulator
     // Executes one instruction.
     void instructionDecode(SimInstruction* instr);
 
-  private:
-    // ICache checking.
-    struct ICacheHasher {
-        typedef void* Key;
-        typedef void* Lookup;
-        static HashNumber hash(const Lookup& l);
-        static bool match(const Key& k, const Lookup& l);
-    };
-
-  public:
-    typedef HashMap<void*, CachePage*, ICacheHasher, SystemAllocPolicy> ICacheMap;
-
   public:
     static bool ICacheCheckingEnabled;
     static void FlushICache(void* start, size_t size);
 
-    // Jitcode may be rewritten from a signal handler, but is prevented from
-    // calling FlushICache() because the signal may arrive within the critical
-    // area of an AutoLockSimulatorCache. This flag instructs the Simulator
-    // to remove all cache entries the next time it checks, avoiding false negatives.
-    mozilla::Atomic<bool, mozilla::ReleaseAcquire> cacheInvalidatedBySignalHandler_;
-
-    void checkICacheLocked(ICacheMap& i_cache, SimInstruction* instr);
-
     static int64_t StopSimAt;
 
     // For testing the MoveResolver code, a MoveResolver is set up, and
@@ -472,6 +450,18 @@ class Simulator
         return icount_;
     }
 
+  private:
+    // ICache checking.
+    struct ICacheHasher {
+        typedef void* Key;
+        typedef void* Lookup;
+        static HashNumber hash(const Lookup& l);
+        static bool match(const Key& k, const Lookup& l);
+    };
+
+  public:
+    typedef HashMap<void*, CachePage*, ICacheHasher, SystemAllocPolicy> ICacheMap;
+
   private:
     // This lock creates a critical section around 'redirection_' and
     // 'icache_', which are referenced both by the execution engine

js/src/jit/mips32/Simulator-mips32.cpp

@@ -1193,8 +1193,8 @@ FlushICacheLocked(Simulator::ICacheMap& i_cache, void* start_addr, size_t size)
     }
 }
 
-void
-Simulator::checkICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* instr)
+static void
+CheckICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* instr)
 {
     intptr_t address = reinterpret_cast<intptr_t>(instr);
     void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
@@ -1204,27 +1204,11 @@ Simulator::checkICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* inst
     char* cache_valid_byte = cache_page->validityByte(offset);
     bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID);
     char* cached_line = cache_page->cachedData(offset & ~CachePage::kLineMask);
-
-    // Read all state before considering signal handler effects.
-    int cmpret = 0;
     if (cache_hit) {
         // Check that the data in memory matches the contents of the I-cache.
-        cmpret = memcmp(reinterpret_cast<void*>(instr),
-                        cache_page->cachedData(offset),
-                        SimInstruction::kInstrSize);
-    }
-
-    // Check for signal handler interruption between reading state and asserting.
-    // It is safe for the signal to arrive during the !cache_hit path, since it
-    // will be cleared the next time this function is called.
-    if (cacheInvalidatedBySignalHandler_) {
-        i_cache.clear();
-        cacheInvalidatedBySignalHandler_ = false;
-        return;
-    }
-
-    if (cache_hit) {
-        MOZ_ASSERT(cmpret == 0);
+        MOZ_ASSERT(memcmp(reinterpret_cast<void*>(instr),
+                          cache_page->cachedData(offset),
+                          SimInstruction::kInstrSize) == 0);
     } else {
         // Cache miss.  Load memory into the cache.
         memcpy(cached_line, line, CachePage::kLineLength);
@@ -1257,8 +1241,7 @@ Simulator::FlushICache(void* start_addr, size_t size)
 }
 
 Simulator::Simulator()
-  : cacheLock_(mutexid::SimulatorCacheLock),
-    cacheInvalidatedBySignalHandler_(false)
+  : cacheLock_(mutexid::SimulatorCacheLock)
 {
     // Set up simulator support first. Some of this information is needed to
     // setup the architecture state.
@@ -3317,7 +3300,7 @@ Simulator::instructionDecode(SimInstruction* instr)
 {
     if (Simulator::ICacheCheckingEnabled) {
         AutoLockSimulatorCache als(this);
-        checkICacheLocked(icache(), instr);
+        CheckICacheLocked(icache(), instr);
     }
     pc_modified_ = false;
 

js/src/jit/mips32/Simulator-mips32.h

@@ -35,8 +35,6 @@
 #include "threading/Thread.h"
 #include "vm/MutexIDs.h"
 
-#include "mozilla/Atomics.h"
-
 namespace js {
 namespace jit {
 
@@ -390,15 +388,6 @@ class Simulator {
     Redirection* redirection_;
     ICacheMap icache_;
 
-  private:
-    // Jitcode may be rewritten from a signal handler, but is prevented from
-    // calling FlushICache() because the signal may arrive within the critical
-    // area of an AutoLockSimulatorCache. This flag instructs the Simulator
-    // to remove all cache entries the next time it checks, avoiding false negatives.
-    mozilla::Atomic<bool, mozilla::ReleaseAcquire> cacheInvalidatedBySignalHandler_;
-
-    void checkICacheLocked(ICacheMap& i_cache, SimInstruction* instr);
-
   public:
     ICacheMap& icache() {
         // Technically we need the lock to access the innards of the

js/src/jit/mips64/Simulator-mips64.cpp

@@ -1207,8 +1207,8 @@ FlushICacheLocked(Simulator::ICacheMap& i_cache, void* start_addr, size_t size)
         FlushOnePageLocked(i_cache, start, size);
 }
 
-void
-Simulator::checkICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* instr)
+static void
+CheckICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* instr)
 {
     intptr_t address = reinterpret_cast<intptr_t>(instr);
     void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
@@ -1218,27 +1218,11 @@ Simulator::checkICacheLocked(Simulator::ICacheMap& i_cache, SimInstruction* inst
     char* cache_valid_byte = cache_page->validityByte(offset);
     bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID);
     char* cached_line = cache_page->cachedData(offset & ~CachePage::kLineMask);
-
-    // Read all state before considering signal handler effects.
-    int cmpret = 0;
     if (cache_hit) {
         // Check that the data in memory matches the contents of the I-cache.
-        cmpret = memcmp(reinterpret_cast<void*>(instr),
-                        cache_page->cachedData(offset),
-                        SimInstruction::kInstrSize);
-    }
-
-    // Check for signal handler interruption between reading state and asserting.
-    // It is safe for the signal to arrive during the !cache_hit path, since it
-    // will be cleared the next time this function is called.
-    if (cacheInvalidatedBySignalHandler_) {
-        i_cache.clear();
-        cacheInvalidatedBySignalHandler_ = false;
-        return;
-    }
-
-    if (cache_hit) {
-        MOZ_ASSERT(cmpret == 0);
+        MOZ_ASSERT(memcmp(reinterpret_cast<void*>(instr),
+                          cache_page->cachedData(offset),
+                          SimInstruction::kInstrSize) == 0);
     } else {
         // Cache miss.  Load memory into the cache.
         memcpy(cached_line, line, CachePage::kLineLength);
@@ -1271,8 +1255,7 @@ Simulator::FlushICache(void* start_addr, size_t size)
 }
 
 Simulator::Simulator()
-  : cacheLock_(mutexid::SimulatorCacheLock),
-    cacheInvalidatedBySignalHandler_(false)
+  : cacheLock_(mutexid::SimulatorCacheLock)
 {
     // Set up simulator support first. Some of this information is needed to
     // setup the architecture state.
@@ -3641,7 +3624,7 @@ Simulator::instructionDecode(SimInstruction* instr)
 {
     if (Simulator::ICacheCheckingEnabled) {
         AutoLockSimulatorCache als(this);
-        checkICacheLocked(icache(), instr);
+        CheckICacheLocked(icache(), instr);
     }
     pc_modified_ = false;
 

js/src/jit/mips64/Simulator-mips64.h

@@ -36,8 +36,6 @@
 #include "threading/Thread.h"
 #include "vm/MutexIDs.h"
 
-#include "mozilla/Atomics.h"
-
 namespace js {
 namespace jit {
 
@@ -406,15 +404,6 @@ class Simulator {
     Redirection* redirection_;
     ICacheMap icache_;
 
-  private:
-    // Jitcode may be rewritten from a signal handler, but is prevented from
-    // calling FlushICache() because the signal may arrive within the critical
-    // area of an AutoLockSimulatorCache. This flag instructs the Simulator
-    // to remove all cache entries the next time it checks, avoiding false negatives.
-    mozilla::Atomic<bool, mozilla::ReleaseAcquire> cacheInvalidatedBySignalHandler_;
-
-    void checkICacheLocked(ICacheMap& i_cache, SimInstruction* instr);
-
   public:
     ICacheMap& icache() {
         // Technically we need the lock to access the innards of the

js/src/wasm/WasmSignalHandlers.cpp

@@ -1273,18 +1273,7 @@ static void
 JitInterruptHandler(int signum, siginfo_t* info, void* context)
 {
     if (JSRuntime* rt = RuntimeForCurrentThread()) {
-
-#if defined(JS_SIMULATOR_ARM) || defined(JS_SIMULATOR_MIPS32) || defined(JS_SIMULATOR_MIPS64)
-        bool prevICacheCheckingState = Simulator::ICacheCheckingEnabled;
-        Simulator::ICacheCheckingEnabled = false;
-#endif
-
         RedirectJitCodeToInterruptCheck(rt, (CONTEXT*)context);
-
-#if defined(JS_SIMULATOR_ARM) || defined(JS_SIMULATOR_MIPS32) || defined(JS_SIMULATOR_MIPS64)
-        Simulator::ICacheCheckingEnabled = prevICacheCheckingState;
-#endif // JS_SIMULATOR
-
         rt->finishHandlingJitInterrupt();
     }
 }