зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1100123 - IonMonkey: Simplify LSimdSelect's regalloc constraints r=bbouvier
This commit is contained in:
Родитель
874f24a205
Коммит
741647f18a
|
@ -476,7 +476,7 @@ class LSimdShift : public LInstructionHelper<1, 2, 0>
|
||||||
|
|
||||||
// SIMD selection of lanes from two int32x4 or float32x4 arguments based on a
|
// SIMD selection of lanes from two int32x4 or float32x4 arguments based on a
|
||||||
// int32x4 argument.
|
// int32x4 argument.
|
||||||
class LSimdSelect : public LInstructionHelper<1, 3, 0>
|
class LSimdSelect : public LInstructionHelper<1, 3, 1>
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
LIR_HEADER(SimdSelect);
|
LIR_HEADER(SimdSelect);
|
||||||
|
@ -489,6 +489,9 @@ class LSimdSelect : public LInstructionHelper<1, 3, 0>
|
||||||
const LAllocation *rhs() {
|
const LAllocation *rhs() {
|
||||||
return getOperand(2);
|
return getOperand(2);
|
||||||
}
|
}
|
||||||
|
const LDefinition *temp() {
|
||||||
|
return getTemp(0);
|
||||||
|
}
|
||||||
MSimdTernaryBitwise::Operation operation() const {
|
MSimdTernaryBitwise::Operation operation() const {
|
||||||
return mir_->toSimdTernaryBitwise()->operation();
|
return mir_->toSimdTernaryBitwise()->operation();
|
||||||
}
|
}
|
||||||
|
|
|
@ -2940,11 +2940,17 @@ CodeGeneratorX86Shared::visitSimdSelect(LSimdSelect *ins)
|
||||||
FloatRegister mask = ToFloatRegister(ins->mask());
|
FloatRegister mask = ToFloatRegister(ins->mask());
|
||||||
FloatRegister onTrue = ToFloatRegister(ins->lhs());
|
FloatRegister onTrue = ToFloatRegister(ins->lhs());
|
||||||
FloatRegister onFalse = ToFloatRegister(ins->rhs());
|
FloatRegister onFalse = ToFloatRegister(ins->rhs());
|
||||||
|
FloatRegister output = ToFloatRegister(ins->output());
|
||||||
|
FloatRegister temp = ToFloatRegister(ins->temp());
|
||||||
|
|
||||||
MOZ_ASSERT(onTrue == ToFloatRegister(ins->output()));
|
if (onTrue != output)
|
||||||
masm.bitwiseAndX4(Operand(mask), onTrue);
|
masm.movaps(onTrue, output);
|
||||||
masm.bitwiseAndNotX4(Operand(onFalse), mask);
|
if (mask != temp)
|
||||||
masm.bitwiseOrX4(Operand(mask), onTrue);
|
masm.movaps(mask, temp);
|
||||||
|
|
||||||
|
masm.bitwiseAndX4(Operand(mask), output);
|
||||||
|
masm.bitwiseAndNotX4(Operand(onFalse), temp);
|
||||||
|
masm.bitwiseOrX4(Operand(temp), output);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
|
|
|
@ -677,18 +677,16 @@ LIRGeneratorX86Shared::visitSimdTernaryBitwise(MSimdTernaryBitwise *ins)
|
||||||
|
|
||||||
if (ins->type() == MIRType_Int32x4 || ins->type() == MIRType_Float32x4) {
|
if (ins->type() == MIRType_Int32x4 || ins->type() == MIRType_Float32x4) {
|
||||||
LSimdSelect *lins = new(alloc()) LSimdSelect;
|
LSimdSelect *lins = new(alloc()) LSimdSelect;
|
||||||
|
MDefinition *r0 = ins->getOperand(0);
|
||||||
|
MDefinition *r1 = ins->getOperand(1);
|
||||||
|
MDefinition *r2 = ins->getOperand(2);
|
||||||
|
|
||||||
// This must be useRegisterAtStart() because it is destroyed.
|
lins->setOperand(0, useRegister(r0));
|
||||||
lins->setOperand(0, useRegisterAtStart(ins->getOperand(0)));
|
lins->setOperand(1, useRegister(r1));
|
||||||
// This must be useRegisterAtStart() because it is destroyed.
|
lins->setOperand(2, useRegister(r2));
|
||||||
lins->setOperand(1, useRegisterAtStart(ins->getOperand(1)));
|
lins->setTemp(0, temp(LDefinition::FLOAT32X4));
|
||||||
// This could be useRegister(), but combining it with
|
|
||||||
// useRegisterAtStart() is broken see bug 772830.
|
define(lins, ins);
|
||||||
lins->setOperand(2, useRegisterAtStart(ins->getOperand(2)));
|
|
||||||
// The output is constrained to be in the same register as the second
|
|
||||||
// argument to avoid redundantly copying the result into place. The
|
|
||||||
// register allocator will move the result if necessary.
|
|
||||||
defineReuseInput(lins, ins, 1);
|
|
||||||
} else {
|
} else {
|
||||||
MOZ_CRASH("Unknown SIMD kind when doing bitwise operations");
|
MOZ_CRASH("Unknown SIMD kind when doing bitwise operations");
|
||||||
}
|
}
|
||||||
|
|
Загрузка…
Ссылка в новой задаче