зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1691489 - Implement SIMD i8x16.popcnt op. r=lth
Differential Revision: https://phabricator.services.mozilla.com/D104770
This commit is contained in:
Yury Delendik
Родитель
c5bad10fbb
Коммит
82dc6f238e
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@ -303,8 +303,7 @@ if (!wasmSimdEnabled()) {
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}
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} else {
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let reservedSimd = [
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0x62, 0x9a,
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0xa2, 0xa5, 0xa6, 0xaf,
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0x9a, 0xa2, 0xa5, 0xa6, 0xaf,
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0xb0, 0xb2, 0xb3, 0xb4, 0xbb,
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0xc0, 0xc2, 0xc5, 0xc6, 0xcf,
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0xd0, 0xd2, 0xd3, 0xd4, 0xd8, 0xd9, 0xda, 0xdb,
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@ -452,6 +452,22 @@ assertSame(get(mem32, 8, 8), [
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]);
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// i8x16.popcnt
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var ins = wasmEvalText(`
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(module
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(memory (export "mem") 1 1)
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(func (export "i8x16_popcnt")
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(v128.store (i32.const 0) (i8x16.popcnt (v128.load (i32.const 16)) )))
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)`);
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var mem8 = new Int8Array(ins.exports.mem.buffer);
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set(mem8, 16, [0, 1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80, 3, -1, 0xF0, 0x11, 0xFE, 0x0F, 0xE]);
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ins.exports.i8x16_popcnt();
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assertSame(get(mem8, 0, 16), [0,1,1,1,1,1,1,1,1,2,8,4,2,7,4,3]);
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/// Double-precision conversion instructions.
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/// f64x2.convert_low_i32x4_{u,s} / i32x4.trunc_sat_f64x2_{u,s}_zero
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/// f32x4.demote_f64x2_zero / f64x2.promote_low_f32x4
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@ -2539,6 +2539,14 @@ class MacroAssembler : public MacroAssemblerSpecific {
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inline void bitwiseSelectSimd128(FloatRegister onTrue, FloatRegister onFalse,
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FloatRegister maskDest) DEFINED_ON(arm64);
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// Population count
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inline void popcntInt8x16(FloatRegister src, FloatRegister dest,
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FloatRegister temp) DEFINED_ON(x86_shared);
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inline void popcntInt8x16(FloatRegister src, FloatRegister dest)
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DEFINED_ON(arm64);
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// Any lane true, ie, any bit set
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inline void anyTrueSimd128(FloatRegister src, Register dest)
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@ -2544,6 +2544,12 @@ void MacroAssembler::bitwiseSelectSimd128(FloatRegister onTrue,
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Bsl(Simd16B(maskDest), Simd16B(onTrue), Simd16B(onFalse));
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}
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// Population count
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void MacroAssembler::popcntInt8x16(FloatRegister src, FloatRegister dest) {
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Cnt(Simd16B(dest), Simd16B(src));
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}
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// Any lane true, ie, any bit set
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void MacroAssembler::anyTrueSimd128(FloatRegister src, Register dest_) {
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@ -3341,6 +3341,9 @@ void CodeGenerator::visitWasmUnarySimd128(LWasmUnarySimd128* ins) {
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case wasm::SimdOp::V128Not:
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masm.bitwiseNotSimd128(src, dest);
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break;
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case wasm::SimdOp::I8x16Popcnt:
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masm.popcntInt8x16(src, dest, ToFloatRegister(ins->temp()));
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break;
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case wasm::SimdOp::I8x16Abs:
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masm.absInt8x16(src, dest);
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break;
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@ -1295,6 +1295,7 @@ void LIRGenerator::visitWasmUnarySimd128(MWasmUnarySimd128* ins) {
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case wasm::SimdOp::I32x4TruncUSatF32x4:
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case wasm::SimdOp::I32x4TruncSatF64x2SZero:
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case wasm::SimdOp::I32x4TruncSatF64x2UZero:
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case wasm::SimdOp::I8x16Popcnt:
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tempReg = tempSimd128();
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// Prefer src == dest to avoid an unconditional src->dest move.
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useAtStart = true;
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@ -1359,3 +1359,20 @@ void MacroAssemblerX86Shared::unsignedTruncSatFloat64x2ToInt32x4(
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vaddpd(Operand(temp), dest, dest);
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vshufps(0x88, scratch, dest, dest);
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}
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void MacroAssemblerX86Shared::popcntInt8x16(FloatRegister src,
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FloatRegister temp,
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FloatRegister output) {
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ScratchSimd128Scope scratch(asMasm());
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asMasm().loadConstantSimd128Float(SimdConstant::SplatX16(0x0f), scratch);
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asMasm().moveSimd128Int(src, temp);
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vpand(scratch, temp, temp);
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vpandn(src, scratch, scratch);
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int8_t counts[] = {0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4};
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asMasm().loadConstantSimd128(SimdConstant::CreateX16(counts), output);
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vpsrlw(Imm32(4), scratch, scratch);
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vpshufb(temp, output, output);
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asMasm().loadConstantSimd128(SimdConstant::CreateX16(counts), temp);
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vpshufb(scratch, temp, temp);
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vpaddb(Operand(temp), output, output);
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}
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@ -2206,6 +2206,13 @@ void MacroAssembler::bitwiseSelectSimd128(FloatRegister mask,
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MacroAssemblerX86Shared::selectSimd128(mask, onTrue, onFalse, temp, dest);
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}
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// Population count
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void MacroAssembler::popcntInt8x16(FloatRegister src, FloatRegister dest,
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FloatRegister temp) {
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MacroAssemblerX86Shared::popcntInt8x16(src, temp, dest);
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}
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// Comparisons (integer and floating-point)
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void MacroAssembler::compareInt8x16(Assembler::Condition cond,
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@ -547,6 +547,8 @@ class MacroAssemblerX86Shared : public Assembler {
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void selectSimd128(FloatRegister mask, FloatRegister onTrue,
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FloatRegister onFalse, FloatRegister temp,
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FloatRegister output);
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void popcntInt8x16(FloatRegister src, FloatRegister temp,
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FloatRegister output);
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// SIMD inline methods private to the implementation, that appear to be used.
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@ -14879,6 +14879,17 @@ static void WidenHighUI32x4(MacroAssembler& masm, RegV128 rs, RegV128 rd) {
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masm.unsignedWidenHighInt32x4(rs, rd);
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}
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# if defined(JS_CODEGEN_ARM64)
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static void PopcntI8x16(MacroAssembler& masm, RegV128 rs, RegV128 rd) {
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masm.popcntInt8x16(rs, rd);
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}
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# else
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static void PopcntI8x16(MacroAssembler& masm, RegV128 rs, RegV128 rd,
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RegV128 temp) {
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masm.popcntInt8x16(rs, rd, temp);
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}
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# endif // JS_CODEGEN_ARM64
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static void AbsI8x16(MacroAssembler& masm, RegV128 rs, RegV128 rd) {
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masm.absInt8x16(rs, rd);
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}
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@ -16814,6 +16825,8 @@ bool BaseCompiler::emitBody() {
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CHECK_NEXT(dispatchVectorUnary(SqrtF64x2));
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case uint32_t(SimdOp::V128Not):
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CHECK_NEXT(dispatchVectorUnary(NotV128));
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case uint32_t(SimdOp::I8x16Popcnt):
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CHECK_NEXT(dispatchVectorUnary(PopcntI8x16));
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case uint32_t(SimdOp::I8x16Abs):
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CHECK_NEXT(dispatchVectorUnary(AbsI8x16));
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case uint32_t(SimdOp::I16x8Abs):
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@ -575,7 +575,7 @@ enum class SimdOp {
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F64x2PromoteLowF32x4 = 0x5f,
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I8x16Abs = 0x60,
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I8x16Neg = 0x61,
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// Unused = 0x62
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I8x16Popcnt = 0x62,
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I8x16AllTrue = 0x63,
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I8x16Bitmask = 0x64,
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I8x16NarrowSI16x8 = 0x65,
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@ -5112,6 +5112,7 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
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case uint32_t(SimdOp::F64x2Neg):
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case uint32_t(SimdOp::F64x2Sqrt):
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case uint32_t(SimdOp::V128Not):
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case uint32_t(SimdOp::I8x16Popcnt):
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case uint32_t(SimdOp::I8x16Abs):
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case uint32_t(SimdOp::I16x8Abs):
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case uint32_t(SimdOp::I32x4Abs):
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@ -515,6 +515,7 @@ OpKind wasm::Classify(OpBytes op) {
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case SimdOp::F64x2Neg:
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case SimdOp::F64x2Sqrt:
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case SimdOp::V128Not:
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case SimdOp::I8x16Popcnt:
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case SimdOp::I8x16Abs:
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case SimdOp::I16x8Abs:
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case SimdOp::I32x4Abs:
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@ -1191,6 +1191,7 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
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case uint32_t(SimdOp::F64x2Neg):
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case uint32_t(SimdOp::F64x2Sqrt):
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case uint32_t(SimdOp::V128Not):
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case uint32_t(SimdOp::I8x16Popcnt):
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case uint32_t(SimdOp::I8x16Abs):
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case uint32_t(SimdOp::I16x8Abs):
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case uint32_t(SimdOp::I32x4Abs):
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