mozilla
/
gecko-dev
зеркало из https://github.com/mozilla/gecko-dev.git
1
0
Форкнуть 0
Код Задачи Пакеты Проекты Релизы Вики Активность

Backed out 3 changesets (bug 1455028, bug 1455019, bug 1455016) because they were already pushed to inbound. DONTBUILD 

Backed out changeset 53422b422071 (bug 1455028)
Backed out changeset 1b5f2913b206 (bug 1455019)
Backed out changeset f93d567284f7 (bug 1455016)

--HG--
extra : amend_source : 3c4e53b1dc7eb256dd724d23b3e3646b7dc11609
This commit is contained in:
Ryan VanderMeulen 2018-04-26 05:40:13 -04:00
Родитель 81023c7822
Коммит 84b6d45572
3 изменённых файлов: 63 добавлений и 92 удалений
Показать статистику Скачать Patch файл Скачать Diff файл Показать все файлы Свернуть все файлы

2
js/src/jit/mips64/MacroAssembler-mips64.cpp
Просмотреть файл

@ -330,7 +330,7 @@ MacroAssemblerMIPS64::ma_dror(Register rd, Register rt, Register shift)
void
MacroAssemblerMIPS64::ma_drol(Register rd, Register rt, Register shift)
{
as_dsubu(ScratchRegister, zero, shift);
ma_negu(ScratchRegister, shift);
as_drotrv(rd, rt, ScratchRegister);
}

151
js/src/jit/mips64/Simulator-mips64.cpp
Просмотреть файл

@ -36,7 +36,6 @@
#include "mozilla/MathAlgorithms.h"
#include <float.h>
#include <limits>
#include "jit/AtomicOperations.h"
#include "jit/mips64/Assembler-mips64.h"
@ -1558,7 +1557,6 @@ Simulator::testFCSRBit(uint32_t cc)
// Sets the rounding error codes in FCSR based on the result of the rounding.
// Returns true if the operation was invalid.
template <typename T>
bool
Simulator::setFCSRRoundError(double original, double rounded)
{
@ -1586,9 +1584,7 @@ Simulator::setFCSRRoundError(double original, double rounded)
ret = true;
}
if ((long double)rounded > (long double)std::numeric_limits<T>::max() ||
(long double)rounded < (long double)std::numeric_limits<T>::min())
{
if (rounded > INT_MAX || rounded < INT_MIN) {
setFCSRBit(kFCSROverflowFlagBit, true);
setFCSRBit(kFCSROverflowCauseBit, true);
// The reference is not really clear but it seems this is required:
@ -2119,19 +2115,19 @@ typedef int32_t (*Prototype_Int_GeneralGeneralInt64Int64)(int64_t arg0, int64_t
int64_t arg3);
typedef double (*Prototype_Double_None)();
typedef double (*Prototype_Double_Double)(double arg0);
typedef double (*Prototype_Double_Int)(int64_t arg0);
typedef int64_t (*Prototype_Int_Double)(double arg0);
typedef int64_t (*Prototype_Int_DoubleIntInt)(double arg0, int64_t arg1, int64_t arg2);
typedef int64_t (*Prototype_Int_IntDoubleIntInt)(int64_t arg0, double arg1, int64_t arg2,
int64_t arg3);
typedef double (*Prototype_Double_Int)(int32_t arg0);
typedef int32_t (*Prototype_Int_Double)(double arg0);
typedef int32_t (*Prototype_Int_DoubleIntInt)(double arg0, int32_t arg1, int32_t arg2);
typedef int32_t (*Prototype_Int_IntDoubleIntInt)(int32_t arg0, double arg1, int32_t arg2,
int32_t arg3);
typedef float (*Prototype_Float32_Float32)(float arg0);
typedef float (*Prototype_Float32_Float32Float32)(float arg0, float arg1);
typedef float (*Prototype_Float32_IntInt)(int64_t arg0, int64_t arg1);
typedef float (*Prototype_Float32_IntInt)(int32_t arg0, int32_t arg1);
typedef double (*Prototype_Double_DoubleInt)(double arg0, int64_t arg1);
typedef double (*Prototype_Double_IntDouble)(int64_t arg0, double arg1);
typedef double (*Prototype_Double_DoubleInt)(double arg0, int32_t arg1);
typedef double (*Prototype_Double_IntDouble)(int32_t arg0, double arg1);
typedef double (*Prototype_Double_DoubleDouble)(double arg0, double arg1);
typedef int64_t (*Prototype_Int_IntDouble)(int64_t arg0, double arg1);
typedef int32_t (*Prototype_Int_IntDouble)(int32_t arg0, double arg1);
typedef double (*Prototype_Double_DoubleDoubleDouble)(double arg0, double arg1, double arg2);
typedef double (*Prototype_Double_DoubleDoubleDoubleDouble)(double arg0, double arg1,
@ -2194,8 +2190,9 @@ Simulator::softwareInterrupt(SimInstruction* instr)
case Args_General3: {
Prototype_General3 target = reinterpret_cast<Prototype_General3>(external);
int64_t result = target(arg0, arg1, arg2);
if (external == intptr_t(&js::wasm::Instance::wake))
if(external == intptr_t(&js::wasm::Instance::wake)) {
result = int32_t(result);
}
setCallResult(result);
break;
}
@ -2241,42 +2238,36 @@ Simulator::softwareInterrupt(SimInstruction* instr)
case Args_Int_Double: {
double dval0 = getFpuRegisterDouble(12);
Prototype_Int_Double target = reinterpret_cast<Prototype_Int_Double>(external);
int64_t result = target(dval0);
if (external == intptr_t((int32_t(*)(double))JS::ToInt32))
result = int32_t(result);
setRegister(v0, result);
int32_t res = target(dval0);
setRegister(v0, res);
break;
}
case Args_Int_GeneralGeneralGeneralInt64: {
Prototype_Int_GeneralGeneralGeneralInt64 target =
reinterpret_cast<Prototype_Int_GeneralGeneralGeneralInt64>(external);
int64_t result = target(arg0, arg1, arg2, arg3);
if (external == intptr_t(&js::wasm::Instance::wait_i32))
result = int32_t(result);
setRegister(v0, result);
int32_t res = target(arg0, arg1, arg2, arg3);
setRegister(v0, res);
break;
}
case Args_Int_GeneralGeneralInt64Int64: {
Prototype_Int_GeneralGeneralInt64Int64 target =
reinterpret_cast<Prototype_Int_GeneralGeneralInt64Int64>(external);
int64_t result = target(arg0, arg1, arg2, arg3);
if (external == intptr_t(&js::wasm::Instance::wait_i64))
result = int32_t(result);
setRegister(v0, result);
int32_t res = target(arg0, arg1, arg2, arg3);
setRegister(v0, res);
break;
}
case Args_Int_DoubleIntInt: {
double dval = getFpuRegisterDouble(12);
Prototype_Int_DoubleIntInt target = reinterpret_cast<Prototype_Int_DoubleIntInt>(external);
int64_t result = target(dval, arg1, arg2);
setRegister(v0, result);
int32_t res = target(dval, int32_t(arg1), int32_t(arg2));
setRegister(v0, res);
break;
}
case Args_Int_IntDoubleIntInt: {
double dval = getFpuRegisterDouble(13);
Prototype_Int_IntDoubleIntInt target = reinterpret_cast<Prototype_Int_IntDoubleIntInt>(external);
int64_t result = target(arg0, dval, arg2, arg3);
setRegister(v0, result);
int32_t res = target(int32_t(arg0), dval, int32_t(arg2), int32_t(arg3));
setRegister(v0, res);
break;
}
case Args_Double_Double: {
@ -2306,20 +2297,20 @@ Simulator::softwareInterrupt(SimInstruction* instr)
}
case Args_Float32_IntInt: {
Prototype_Float32_IntInt target = reinterpret_cast<Prototype_Float32_IntInt>(external);
float fresult = target(arg0, arg1);
float fresult = target(int32_t(arg0), int32_t(arg1));
setCallResultFloat(fresult);
break;
}
case Args_Double_Int: {
Prototype_Double_Int target = reinterpret_cast<Prototype_Double_Int>(external);
double dresult = target(arg0);
double dresult = target(int32_t(arg0));
setCallResultDouble(dresult);
break;
}
case Args_Double_DoubleInt: {
double dval0 = getFpuRegisterDouble(12);
Prototype_Double_DoubleInt target = reinterpret_cast<Prototype_Double_DoubleInt>(external);
double dresult = target(dval0, arg1);
double dresult = target(dval0, int32_t(arg1));
setCallResultDouble(dresult);
break;
}
@ -2334,14 +2325,14 @@ Simulator::softwareInterrupt(SimInstruction* instr)
case Args_Double_IntDouble: {
double dval1 = getFpuRegisterDouble(13);
Prototype_Double_IntDouble target = reinterpret_cast<Prototype_Double_IntDouble>(external);
double dresult = target(arg0, dval1);
double dresult = target(int32_t(arg0), dval1);
setCallResultDouble(dresult);
break;
}
case Args_Int_IntDouble: {
double dval1 = getFpuRegisterDouble(13);
Prototype_Int_IntDouble target = reinterpret_cast<Prototype_Int_IntDouble>(external);
int64_t result = target(arg0, dval1);
int32_t result = target(int32_t(arg0), dval1);
setRegister(v0, result);
break;
}
@ -2739,7 +2730,7 @@ Simulator::configureTypeRegister(SimInstruction* instr,
alu_out = ~(rs | rt);
break;
case ff_slt:
alu_out = I64(rs) < I64(rt) ? 1 : 0;
alu_out = I32_CHECK(rs) < I32_CHECK(rt) ? 1 : 0;
break;
case ff_sltu:
alu_out = U64(rs) < U64(rt) ? 1 : 0;
@ -2783,7 +2774,7 @@ Simulator::configureTypeRegister(SimInstruction* instr,
}
break;
case ff_ddiv:
if (I64(rs) == INT64_MIN && I64(rt) == -1) {
if (I32_CHECK(rs) == INT_MIN && I32_CHECK(rt) == -1) {
i128hilo = U64(INT64_MIN);
} else {
uint64_t div = rs / rt;
@ -3095,72 +3086,65 @@ Simulator::decodeTypeRegister(SimInstruction* instr)
result--;
}
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(fs_value, rounded))
if (setFCSRRoundError(fs_value, rounded)) {
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
}
break;
}
case ff_trunc_w_fmt: { // Truncate float to word (round towards 0).
float rounded = truncf(fs_value);
int32_t result = I32(rounded);
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(fs_value, rounded))
if (setFCSRRoundError(fs_value, rounded)) {
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
}
break;
}
case ff_floor_w_fmt: { // Round float to word towards negative infinity.
float rounded = std::floor(fs_value);
int32_t result = I32(rounded);
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(fs_value, rounded))
if (setFCSRRoundError(fs_value, rounded)) {
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
}
break;
}
case ff_ceil_w_fmt: { // Round double to word towards positive infinity.
float rounded = std::ceil(fs_value);
int32_t result = I32(rounded);
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(fs_value, rounded))
if (setFCSRRoundError(fs_value, rounded)) {
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
}
break;
}
case ff_cvt_l_fmt: { // Mips64r2: Truncate float to 64-bit long-word.
float rounded = truncf(fs_value);
i64 = I64(rounded);
setFpuRegister(fd_reg, i64);
break;
}
case ff_cvt_l_fmt: // Mips64r2: Truncate float to 64-bit long-word.
// Rounding modes are not yet supported.
MOZ_ASSERT((FCSR_ & 3) == 0);
// In rounding mode 0 it should behave like ROUND.
MOZ_FALLTHROUGH;
case ff_round_l_fmt: { // Mips64r2 instruction.
float rounded =
fs_value > 0 ? std::floor(fs_value + 0.5) : std::ceil(fs_value - 0.5);
i64 = I64(rounded);
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(fs_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_trunc_l_fmt: { // Mips64r2 instruction.
float rounded = truncf(fs_value);
i64 = I64(rounded);
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(fs_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_floor_l_fmt: { // Mips64r2 instruction.
float rounded = std::floor(fs_value);
i64 = I64(rounded);
case ff_floor_l_fmt: // Mips64r2 instruction.
i64 = I64(std::floor(fs_value));
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(fs_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_ceil_l_fmt: { // Mips64r2 instruction.
float rounded = std::ceil(fs_value);
i64 = I64(rounded);
case ff_ceil_l_fmt: // Mips64r2 instruction.
i64 = I64(std::ceil(fs_value));
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(fs_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_cvt_ps_s:
case ff_c_f_fmt:
MOZ_CRASH();
@ -3253,7 +3237,7 @@ Simulator::decodeTypeRegister(SimInstruction* instr)
result--;
}
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(ds_value, rounded))
if (setFCSRRoundError(ds_value, rounded))
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
break;
}
@ -3261,7 +3245,7 @@ Simulator::decodeTypeRegister(SimInstruction* instr)
double rounded = trunc(ds_value);
int32_t result = I32(rounded);
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(ds_value, rounded))
if (setFCSRRoundError(ds_value, rounded))
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
break;
}
@ -3269,7 +3253,7 @@ Simulator::decodeTypeRegister(SimInstruction* instr)
double rounded = std::floor(ds_value);
int32_t result = I32(rounded);
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(ds_value, rounded))
if (setFCSRRoundError(ds_value, rounded))
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
break;
}
@ -3277,51 +3261,40 @@ Simulator::decodeTypeRegister(SimInstruction* instr)
double rounded = std::ceil(ds_value);
int32_t result = I32(rounded);
setFpuRegisterLo(fd_reg, result);
if (setFCSRRoundError<int32_t>(ds_value, rounded))
if (setFCSRRoundError(ds_value, rounded))
setFpuRegisterLo(fd_reg, kFPUInvalidResult);
break;
}
case ff_cvt_s_fmt: // Convert double to float (single).
setFpuRegisterFloat(fd_reg, static_cast<float>(ds_value));
break;
case ff_cvt_l_fmt: // Mips64r2: Truncate double to 64-bit long-word.
// Rounding modes are not yet supported.
MOZ_ASSERT((FCSR_ & 3) == 0);
// In rounding mode 0 it should behave like ROUND.
MOZ_FALLTHROUGH;
case ff_round_l_fmt: { // Mips64r2 instruction.
double rounded =
ds_value > 0 ? std::floor(ds_value + 0.5) : std::ceil(ds_value - 0.5);
case ff_cvt_l_fmt: { // Mips64r2: Truncate double to 64-bit long-word.
double rounded = trunc(ds_value);
i64 = I64(rounded);
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(ds_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_trunc_l_fmt: { // Mips64r2 instruction.
double rounded = trunc(ds_value);
i64 = I64(rounded);
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(ds_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_floor_l_fmt: { // Mips64r2 instruction.
double rounded = std::floor(ds_value);
case ff_round_l_fmt: { // Mips64r2 instruction.
double rounded =
ds_value > 0 ? std::floor(ds_value + 0.5) : std::ceil(ds_value - 0.5);
i64 = I64(rounded);
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(ds_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_ceil_l_fmt: { // Mips64r2 instruction.
double rounded = std::ceil(ds_value);
i64 = I64(rounded);
case ff_floor_l_fmt: // Mips64r2 instruction.
i64 = I64(std::floor(ds_value));
setFpuRegister(fd_reg, i64);
break;
case ff_ceil_l_fmt: // Mips64r2 instruction.
i64 = I64(std::ceil(ds_value));
setFpuRegister(fd_reg, i64);
if (setFCSRRoundError<int64_t>(ds_value, rounded))
setFpuRegister(fd_reg, kFPUInvalidResult64);
break;
}
case ff_c_f_fmt:
MOZ_CRASH();
break;

2
js/src/jit/mips64/Simulator-mips64.h
Просмотреть файл

@ -75,7 +75,6 @@ const int kNumFPURegisters = 32;
const int kFCSRRegister = 31;
const int kInvalidFPUControlRegister = -1;
const uint32_t kFPUInvalidResult = static_cast<uint32_t>(1 << 31) - 1;
const uint64_t kFPUInvalidResult64 = static_cast<uint64_t>(1ULL << 63) - 1;
// FCSR constants.
const uint32_t kFCSRInexactFlagBit = 2;
@ -198,7 +197,6 @@ class Simulator {
double getFpuRegisterDouble(int fpureg) const;
void setFCSRBit(uint32_t cc, bool value);
bool testFCSRBit(uint32_t cc);
template <typename T>
bool setFCSRRoundError(double original, double rounded);
// Special case of set_register and get_register to access the raw PC value.