зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1889823 - Adjust clang patches to recent upstream changes. r=firefox-build-system-reviewers,sergesanspaille
Differential Revision: https://phabricator.services.mozilla.com/D206726
This commit is contained in:
Mike Hommey
Родитель
48eb17ba6b
Коммит
89d3716254
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@ -12,7 +12,7 @@
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"partial-revert-llvmorg-17-init-17713-gc8e055d485ea.patch",
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"partial-revert-llvmorg-17-init-17713-gc8e055d485ea.patch",
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"revert-llvmorg-17-init-4120-g02e8eb1a438b_clang_18.patch",
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"revert-llvmorg-17-init-4120-g02e8eb1a438b_clang_18.patch",
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"partial-revert-llvmorg-16-init-17151-gaa0883b59ae1_clang_17.patch",
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"partial-revert-llvmorg-16-init-17151-gaa0883b59ae1_clang_17.patch",
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"revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_18.patch",
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"revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_19.patch",
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"revert-llvmorg-15-init-13446-g7524fe962e47.patch",
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"revert-llvmorg-15-init-13446-g7524fe962e47.patch",
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"revert-llvmorg-15-init-11205-gcead4eceb01b_clang_18.patch",
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"revert-llvmorg-15-init-11205-gcead4eceb01b_clang_18.patch",
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"win64-ret-null-on-commitment-limit_clang_14.patch",
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"win64-ret-null-on-commitment-limit_clang_14.patch",
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@ -0,0 +1,183 @@
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From cf00b30288c4c81b2c6a5af01c38f236148777a0 Mon Sep 17 00:00:00 2001
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From: Mike Hommey <mh@glandium.org>
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Date: Tue, 28 Mar 2023 06:13:36 +0900
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Subject: [PATCH] Revert "[Passes][VectorCombine] enable early run generally
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and try load folds"
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This reverts commit 163bb6d64e5f1220777c3ec2a8b58c0666a74d91.
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It causes various reftest regressions.
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---
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llvm/lib/Passes/PassBuilderPipelines.cpp | 7 ++++---
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llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 8 ++------
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llvm/test/Other/new-pm-defaults.ll | 2 +-
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.../Other/new-pm-thinlto-postlink-defaults.ll | 1 -
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.../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 1 -
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.../new-pm-thinlto-postlink-samplepgo-defaults.ll | 1 -
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.../Other/new-pm-thinlto-prelink-pgo-defaults.ll | 1 -
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.../new-pm-thinlto-prelink-samplepgo-defaults.ll | 1 -
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.../PhaseOrdering/X86/vec-load-combine.ll | 15 +++++++++++----
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9 files changed, 18 insertions(+), 19 deletions(-)
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diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp b/llvm/lib/Passes/PassBuilderPipelines.cpp
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index eed29c25714b..b925448cd6c0 100644
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--- a/llvm/lib/Passes/PassBuilderPipelines.cpp
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+++ b/llvm/lib/Passes/PassBuilderPipelines.cpp
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@@ -611,9 +611,10 @@ PassBuilder::buildFunctionSimplificationPipeline(OptimizationLevel Level,
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// Delete small array after loop unroll.
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FPM.addPass(SROAPass(SROAOptions::ModifyCFG));
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- // Try vectorization/scalarization transforms that are both improvements
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- // themselves and can allow further folds with GVN and InstCombine.
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- FPM.addPass(VectorCombinePass(/*TryEarlyFoldsOnly=*/true));
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+ // The matrix extension can introduce large vector operations early, which can
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+ // benefit from running vector-combine early on.
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+ if (EnableMatrix)
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+ FPM.addPass(VectorCombinePass(/*TryEarlyFoldsOnly=*/true));
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// Eliminate redundancies.
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FPM.addPass(MergedLoadStoreMotionPass());
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diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
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index 2e489757ebc1..810a9f92bb7a 100644
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--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
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+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
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@@ -1715,23 +1715,6 @@ bool VectorCombine::run() {
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bool IsFixedVectorType = isa<FixedVectorType>(I.getType());
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auto Opcode = I.getOpcode();
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- // These folds should be beneficial regardless of when this pass is run
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- // in the optimization pipeline.
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- // The type checking is for run-time efficiency. We can avoid wasting time
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- // dispatching to folding functions if there's no chance of matching.
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- if (IsFixedVectorType) {
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- switch (Opcode) {
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- case Instruction::InsertElement:
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- MadeChange |= vectorizeLoadInsert(I);
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- break;
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- case Instruction::ShuffleVector:
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- MadeChange |= widenSubvectorLoad(I);
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- break;
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- default:
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- break;
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- }
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- }
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-
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// This transform works with scalable and fixed vectors
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// TODO: Identify and allow other scalable transforms
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if (isa<VectorType>(I.getType())) {
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@@ -1753,9 +1736,11 @@ bool VectorCombine::run() {
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if (IsFixedVectorType) {
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switch (Opcode) {
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case Instruction::InsertElement:
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+ MadeChange |= vectorizeLoadInsert(I);
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MadeChange |= foldInsExtFNeg(I);
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break;
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case Instruction::ShuffleVector:
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+ MadeChange |= widenSubvectorLoad(I);
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MadeChange |= foldShuffleOfBinops(I);
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MadeChange |= foldShuffleOfCastops(I);
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MadeChange |= foldSelectShuffle(I);
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diff --git a/llvm/test/Other/new-pm-defaults.ll b/llvm/test/Other/new-pm-defaults.ll
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index 13612c3bb459..5f84d28af4a6 100644
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--- a/llvm/test/Other/new-pm-defaults.ll
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+++ b/llvm/test/Other/new-pm-defaults.ll
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@@ -186,7 +186,7 @@
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; CHECK-O-NEXT: Running pass: LoopFullUnrollPass
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; CHECK-EP-LOOP-END-NEXT: Running pass: NoOpLoopPass
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; CHECK-O-NEXT: Running pass: SROAPass on foo
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-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass
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+; CHECK-MATRIX: Running pass: VectorCombinePass
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; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass
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; CHECK-O23SZ-NEXT: Running pass: GVNPass
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; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis
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diff --git a/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
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index 3f5d2d5b153d..ea07128c9f6a 100644
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--- a/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
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+++ b/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
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@@ -159,7 +159,6 @@
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; CHECK-O-NEXT: Running pass: LoopDeletionPass
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; CHECK-O-NEXT: Running pass: LoopFullUnrollPass
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; CHECK-O-NEXT: Running pass: SROAPass on foo
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-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass
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; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass
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; CHECK-O23SZ-NEXT: Running pass: GVNPass
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; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis
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diff --git a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
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index 29021ceace54..43e943cb6011 100644
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--- a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
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+++ b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
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@@ -121,7 +121,6 @@
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; CHECK-O-NEXT: Running pass: LoopDeletionPass
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; CHECK-O-NEXT: Running pass: LoopFullUnrollPass
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; CHECK-O-NEXT: Running pass: SROAPass on foo
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-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass
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; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass
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; CHECK-O23SZ-NEXT: Running pass: GVNPass
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; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis
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diff --git a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
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index daf3141a1f2c..78914d1c23b2 100644
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--- a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
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+++ b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
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@@ -130,7 +130,6 @@
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; CHECK-O-NEXT: Running pass: LoopDeletionPass
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; CHECK-O-NEXT: Running pass: LoopFullUnrollPass
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; CHECK-O-NEXT: Running pass: SROAPass on foo
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-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass
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; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass
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; CHECK-O23SZ-NEXT: Running pass: GVNPass
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; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis
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diff --git a/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
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index bfe80902f806..5b62ba39add3 100644
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--- a/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
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+++ b/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
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@@ -160,7 +160,6 @@
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; CHECK-O-NEXT: Running pass: LoopDeletionPass
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; CHECK-O-NEXT: Running pass: LoopFullUnrollPass
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; CHECK-O-NEXT: Running pass: SROAPass on foo
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-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass
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; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass
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; CHECK-O23SZ-NEXT: Running pass: GVNPass
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; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis
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diff --git a/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
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index c7daf7aa46b1..17475423d696 100644
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--- a/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
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+++ b/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
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@@ -124,7 +124,6 @@
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; CHECK-O-NEXT: Running pass: IndVarSimplifyPass
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; CHECK-O-NEXT: Running pass: LoopDeletionPass
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; CHECK-O-NEXT: Running pass: SROAPass on foo
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-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass
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; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass
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; CHECK-O23SZ-NEXT: Running pass: GVNPass
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; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis
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diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll b/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll
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index 77cbc70ff369..dd7164febea4 100644
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--- a/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll
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+++ b/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll
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@@ -12,13 +12,20 @@ $getAt = comdat any
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define dso_local noundef <4 x float> @ConvertVectors_ByRef(ptr noundef nonnull align 16 dereferenceable(16) %0) #0 {
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; SSE-LABEL: @ConvertVectors_ByRef(
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; SSE-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[TMP0:%.*]], align 16
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-; SSE-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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-; SSE-NEXT: ret <4 x float> [[TMP3]]
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+; SSE-NEXT: [[TMP3:%.*]] = getelementptr inbounds [4 x float], ptr [[TMP0]], i64 0, i64 1
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+; SSE-NEXT: [[TMP4:%.*]] = load <2 x float>, ptr [[TMP3]], align 4
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+; SSE-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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+; SSE-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> [[TMP5]], <4 x i32> <i32 0, i32 4, i32 5, i32 undef>
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+; SSE-NEXT: [[TMP7:%.*]] = shufflevector <4 x float> [[TMP6]], <4 x float> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 5>
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+; SSE-NEXT: ret <4 x float> [[TMP7]]
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;
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; AVX-LABEL: @ConvertVectors_ByRef(
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; AVX-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[TMP0:%.*]], align 16
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-; AVX-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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-; AVX-NEXT: ret <4 x float> [[TMP3]]
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+; AVX-NEXT: [[TMP3:%.*]] = getelementptr inbounds [4 x float], ptr [[TMP0]], i64 0, i64 2
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+; AVX-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP3]], align 8
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+; AVX-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP2]], float [[TMP4]], i64 2
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+; AVX-NEXT: [[TMP6:%.*]] = insertelement <4 x float> [[TMP5]], float [[TMP4]], i64 3
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+; AVX-NEXT: ret <4 x float> [[TMP6]]
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;
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%2 = alloca ptr, align 8
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%3 = alloca <4 x float>, align 16
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--
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2.39.0.1.g6739ec1790
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