зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1669428 - Properly control experimental SIMD instructions. r=jseward
This gets rid of an ad-hoc boolean constant and introduces a configuration flag for experimental SIMD instructions. The flag is on by default in Nightly if SIMD is also enabled; otherwise off. This patch therefore disables support for experimental SIMD instructions in beta and release, where they have been available with the other SIMD instructions behind a pref. This seems OK: code using unstable bits of an in-progress proposal should stick to Nightly. Differential Revision: https://phabricator.services.mozilla.com/D92554
This commit is contained in:
Lars T Hansen
Родитель
17bba3d008
Коммит
907323e1fd
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@ -681,6 +681,29 @@ def wasm_simd(value, jit_enabled, simulator, target):
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set_config('ENABLE_WASM_SIMD', wasm_simd)
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set_define('ENABLE_WASM_SIMD', wasm_simd)
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# Experimental SIMD opcodes are Nightly-only by default
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@depends(milestone.is_nightly, '--enable-wasm-simd')
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def default_wasm_simd_experimental(is_nightly, wasm_simd):
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if is_nightly and wasm_simd:
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return True
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js_option('--enable-wasm-simd-experimental',
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default=default_wasm_simd_experimental,
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help='{Enable|Disable} WebAssembly SIMD experimental opcodes')
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@depends('--enable-wasm-simd-experimental', '--enable-wasm-simd')
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def wasm_simd_experimental(value, wasm_simd):
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if not value:
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return
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if wasm_simd:
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return True
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die('--enable-wasm-simd-experimental only possible with --enable-wasm-simd')
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set_config('ENABLE_WASM_SIMD_EXPERIMENTAL', wasm_simd_experimental)
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set_define('ENABLE_WASM_SIMD_EXPERIMENTAL', wasm_simd_experimental)
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# Options for generating the shell as a script
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# ============================================
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@ -874,6 +874,17 @@ static bool WasmSimdEnabled(JSContext* cx, unsigned argc, Value* vp) {
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return true;
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}
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static bool WasmSimdExperimentalEnabled(JSContext* cx, unsigned argc,
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Value* vp) {
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CallArgs args = CallArgsFromVp(argc, vp);
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#ifdef ENABLE_WASM_SIMD_EXPERIMENTAL
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args.rval().setBoolean(wasm::SimdAvailable(cx));
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#else
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args.rval().setBoolean(false);
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#endif
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return true;
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}
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static bool WasmCompilersPresent(JSContext* cx, unsigned argc, Value* vp) {
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CallArgs args = CallArgsFromVp(argc, vp);
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@ -4988,7 +4999,6 @@ static bool EvalStencilXDR(JSContext* cx, uint32_t argc, Value* vp) {
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return false;
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}
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/* Instantiate the stencil. */
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frontend::CompilationGCOutput output(cx);
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if (!compilationInfos.get().instantiateStencils(cx, output)) {
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@ -6792,6 +6802,11 @@ gc::ZealModeHelpText),
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" Returns a boolean indicating whether WebAssembly SIMD is supported by the\n"
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" compilers and runtime."),
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JS_FN_HELP("wasmSimdExperimentalEnabled", WasmSimdExperimentalEnabled, 0, 0,
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"wasmSimdExperimentalEnabled()",
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" Returns a boolean indicating whether WebAssembly SIMD experimental instructions\n"
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" are supported by the compilers and runtime."),
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JS_FN_HELP("wasmReftypesEnabled", WasmReftypesEnabled, 1, 0,
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"wasmReftypesEnabled()",
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" Returns a boolean indicating whether the WebAssembly reftypes proposal is enabled."),
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@ -1,15 +1,9 @@
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// |jit-test| skip-if: !wasmSimdEnabled()
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// |jit-test| skip-if: !wasmSimdExperimentalEnabled()
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// Experimental opcodes. We have no text parsing support for these yet. The
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// tests will be cleaned up and moved into ad-hack.js if the opcodes are
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// adopted.
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// When simd is enabled by default in release builds we will flip the value of
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// SimdExperimentalEnabled to false in RELEASE_OR_BETA builds. At that point,
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// these tests will start failing in release or beta builds, and a guard
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// asserting !RELEASE_OR_BETA will have to be added above. That is how it
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// should be.
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load(libdir + "wasm-binary.js");
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function wasmEval(bytes, imports) {
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@ -13996,10 +13996,11 @@ bool BaseCompiler::emitBody() {
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} while (0)
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#endif
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#define CHECK_EXPERIMENTAL_SIMD() \
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if (!SimdExperimentalEnabled) { \
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break; \
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}
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#ifdef ENABLE_WASM_SIMD_EXPERIMENTAL
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# define CHECK_SIMD_EXPERIMENTAL() (void)(0)
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#else
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# define CHECK_SIMD_EXPERIMENTAL() break
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#endif
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#define CHECK(E) \
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if (!(E)) return false
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@ -14962,19 +14963,19 @@ bool BaseCompiler::emitBody() {
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case uint32_t(SimdOp::V8x16Swizzle):
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CHECK_NEXT(dispatchVectorBinary(Swizzle));
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case uint32_t(SimdOp::F32x4PMaxExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorBinary(PMaxF32x4));
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case uint32_t(SimdOp::F32x4PMinExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorBinary(PMinF32x4));
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case uint32_t(SimdOp::F64x2PMaxExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorBinary(PMaxF64x2));
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case uint32_t(SimdOp::F64x2PMinExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorBinary(PMinF64x2));
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case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorBinary(DotI16x8));
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case uint32_t(SimdOp::I8x16Neg):
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CHECK_NEXT(dispatchVectorUnary(NegI8x16));
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@ -15029,28 +15030,28 @@ bool BaseCompiler::emitBody() {
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case uint32_t(SimdOp::I32x4Abs):
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CHECK_NEXT(dispatchVectorUnary(AbsI32x4));
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case uint32_t(SimdOp::F32x4CeilExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(CeilF32x4));
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case uint32_t(SimdOp::F32x4FloorExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(FloorF32x4));
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case uint32_t(SimdOp::F32x4TruncExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(TruncF32x4));
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case uint32_t(SimdOp::F32x4NearestExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(NearestF32x4));
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case uint32_t(SimdOp::F64x2CeilExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(CeilF64x2));
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case uint32_t(SimdOp::F64x2FloorExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(FloorF64x2));
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case uint32_t(SimdOp::F64x2TruncExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(TruncF64x2));
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case uint32_t(SimdOp::F64x2NearestExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(dispatchVectorUnary(NearestF64x2));
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case uint32_t(SimdOp::I8x16Shl):
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CHECK_NEXT(dispatchVectorVariableShift(ShiftLeftI8x16));
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@ -15111,10 +15112,10 @@ bool BaseCompiler::emitBody() {
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case uint32_t(SimdOp::I64x2LoadU32x2):
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CHECK_NEXT(emitLoadExtend(Scalar::Uint32));
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case uint32_t(SimdOp::V128Load32ZeroExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(emitLoadZero(Scalar::Float32));
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case uint32_t(SimdOp::V128Load64ZeroExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK_NEXT(emitLoadZero(Scalar::Float64));
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case uint32_t(SimdOp::V128Store):
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CHECK_NEXT(emitStore(ValType::V128, Scalar::Simd128));
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@ -15420,7 +15421,7 @@ bool BaseCompiler::emitBody() {
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#undef NEXT
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#undef CHECK_NEXT
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#undef CHECK_POINTER_COUNT
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#undef CHECK_EXPERIMENTAL_SIMD
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#undef CHECK_SIMD_EXPERIMENTAL
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#undef dispatchBinary
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#undef dispatchUnary
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#undef dispatchComparison
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@ -424,11 +424,6 @@ enum class GcOp {
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// Opcodes with suffix 'Experimental' are proposed but not standardized, and are
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// compatible with those same opcodes in V8. No opcode labeled 'Experimental'
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// will ship in a Release build where SIMD is enabled by default.
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//
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// Once SIMD ships default-on in release builds, the following flag must be set
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// to false for RELEASE_OR_BETA.
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static constexpr bool SimdExperimentalEnabled = true;
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enum class SimdOp {
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V128Load = 0x00,
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@ -4307,10 +4307,11 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
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if (!(c)) return false; \
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break
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#define CHECK_EXPERIMENTAL_SIMD() \
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if (!SimdExperimentalEnabled) { \
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return f.iter().unrecognizedOpcode(&op); \
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}
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#ifdef ENABLE_WASM_SIMD_EXPERIMENTAL
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# define CHECK_SIMD_EXPERIMENTAL() (void)(0)
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#else
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# define CHECK_SIMD_EXPERIMENTAL() return f.iter().unrecognizedOpcode(&op)
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#endif
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while (true) {
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if (!f.mirGen().ensureBallast()) {
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@ -4844,7 +4845,7 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
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case uint32_t(SimdOp::F64x2Ne):
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CHECK(EmitBinarySimd128(f, /* commutative= */ true, SimdOp(op.b1)));
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case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(EmitBinarySimd128(f, /* commutative= */ true, SimdOp(op.b1)));
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case uint32_t(SimdOp::V128AndNot):
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case uint32_t(SimdOp::I8x16Sub):
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@ -4902,7 +4903,7 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
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case uint32_t(SimdOp::F32x4PMinExperimental):
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case uint32_t(SimdOp::F64x2PMaxExperimental):
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case uint32_t(SimdOp::F64x2PMinExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(
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EmitBinarySimd128(f, /* commutative= */ false, SimdOp(op.b1)));
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case uint32_t(SimdOp::I8x16Splat):
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@ -4950,7 +4951,7 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
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case uint32_t(SimdOp::F64x2FloorExperimental):
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case uint32_t(SimdOp::F64x2TruncExperimental):
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case uint32_t(SimdOp::F64x2NearestExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(EmitUnarySimd128(f, SimdOp(op.b1)));
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case uint32_t(SimdOp::I8x16AnyTrue):
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case uint32_t(SimdOp::I16x8AnyTrue):
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@ -5021,10 +5022,10 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
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case uint32_t(SimdOp::I64x2LoadU32x2):
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CHECK(EmitLoadExtendSimd128(f, SimdOp(op.b1)));
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case uint32_t(SimdOp::V128Load32ZeroExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(EmitLoadZeroSimd128(f, Scalar::Float32, 4));
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case uint32_t(SimdOp::V128Load64ZeroExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(EmitLoadZeroSimd128(f, Scalar::Float64, 8));
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default:
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return f.iter().unrecognizedOpcode(&op);
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@ -5354,7 +5355,7 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
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MOZ_CRASH("unreachable");
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#undef CHECK
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#undef CHECK_EXPERIMENTAL_SIMD
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#undef CHECK_SIMD_EXPERIMENTAL
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}
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bool wasm::IonCompileFunctions(const ModuleEnvironment& env, LifoAlloc& lifo,
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@ -483,10 +483,11 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
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if (!(c)) return false; \
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break
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#define CHECK_EXPERIMENTAL_SIMD() \
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if (!SimdExperimentalEnabled) { \
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return iter.unrecognizedOpcode(&op); \
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}
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#ifdef ENABLE_WASM_SIMD_EXPERIMENTAL
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# define CHECK_SIMD_EXPERIMENTAL() (void)(0)
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#else
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# define CHECK_SIMD_EXPERIMENTAL() return iter.unrecognizedOpcode(&op)
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#endif
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while (true) {
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OpBytes op;
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@ -1058,7 +1059,7 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
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case uint32_t(SimdOp::F64x2PMaxExperimental):
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case uint32_t(SimdOp::F64x2PMinExperimental):
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case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(iter.readBinary(ValType::V128, ¬hing, ¬hing));
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case uint32_t(SimdOp::I8x16Neg):
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@ -1097,7 +1098,7 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
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case uint32_t(SimdOp::F64x2FloorExperimental):
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case uint32_t(SimdOp::F64x2TruncExperimental):
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case uint32_t(SimdOp::F64x2NearestExperimental):
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(iter.readUnary(ValType::V128, ¬hing));
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case uint32_t(SimdOp::I8x16Shl):
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@ -1177,13 +1178,13 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
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case uint32_t(SimdOp::V128Load32ZeroExperimental): {
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LinearMemoryAddress<Nothing> addr;
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(iter.readLoadSplat(4, &addr));
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}
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case uint32_t(SimdOp::V128Load64ZeroExperimental): {
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LinearMemoryAddress<Nothing> addr;
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CHECK_EXPERIMENTAL_SIMD();
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CHECK_SIMD_EXPERIMENTAL();
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CHECK(iter.readLoadSplat(8, &addr));
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}
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@ -1507,7 +1508,7 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
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MOZ_CRASH("unreachable");
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#undef CHECK
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#undef CHECK_EXPERIMENTAL_SIMD
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#undef CHECK_SIMD_EXPERIMENTAL
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}
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bool wasm::ValidateFunctionBody(const ModuleEnvironment& env,
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