зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1323136 - wasm: MIPS: Do bounds check in 32-bit. r=nbp
--- js/src/jit/mips-shared/Assembler-mips-shared.cpp | 9 +++++++ js/src/jit/mips-shared/Assembler-mips-shared.h | 2 ++ .../jit/mips-shared/MacroAssembler-mips-shared.cpp | 11 +++++++++ .../jit/mips-shared/MacroAssembler-mips-shared.h | 7 ++++++ js/src/jit/mips32/Assembler-mips32.cpp | 28 +++++++--------------- js/src/jit/mips32/Assembler-mips32.h | 1 - js/src/jit/mips32/MacroAssembler-mips32-inl.h | 2 +- js/src/jit/mips32/MacroAssembler-mips32.cpp | 11 --------- js/src/jit/mips32/MacroAssembler-mips32.h | 7 ------ js/src/jit/mips64/MacroAssembler-mips64-inl.h | 6 ++++- js/src/jit/mips64/MacroAssembler-mips64.h | 6 ----- 11 files changed, 44 insertions(+), 46 deletions(-)
This commit is contained in:
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Родитель
ea60a24a01
Коммит
93d219b245
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@ -1744,3 +1744,12 @@ AssemblerMIPSShared::ToggleToCmp(CodeLocationLabel inst_)
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AutoFlushICache::flush(uintptr_t(inst), 4);
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}
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void
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AssemblerMIPSShared::UpdateLuiOriValue(Instruction* inst0, Instruction* inst1, uint32_t value)
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{
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MOZ_ASSERT(inst0->extractOpcode() == ((uint32_t)op_lui >> OpcodeShift));
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MOZ_ASSERT(inst1->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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((InstImm*) inst0)->setImm16(Imm16::Upper(Imm32(value)));
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((InstImm*) inst1)->setImm16(Imm16::Lower(Imm32(value)));
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}
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@ -1273,6 +1273,8 @@ class AssemblerMIPSShared : public AssemblerShared
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static void ToggleToJmp(CodeLocationLabel inst_);
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static void ToggleToCmp(CodeLocationLabel inst_);
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static void UpdateLuiOriValue(Instruction* inst0, Instruction* inst1, uint32_t value);
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void processCodeLabels(uint8_t* rawCode);
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bool bailed() {
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@ -39,6 +39,17 @@ MacroAssemblerMIPSShared::ma_li(Register dest, Imm32 imm)
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}
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}
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// This method generates lui and ori instruction pair that can be modified by
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// UpdateLuiOriValue, either during compilation (eg. Assembler::bind), or
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// during execution (eg. jit::PatchJump).
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void
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MacroAssemblerMIPSShared::ma_liPatchable(Register dest, Imm32 imm)
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{
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m_buffer.ensureSpace(2 * sizeof(uint32_t));
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as_lui(dest, Imm16::Upper(imm).encode());
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as_ori(dest, dest, Imm16::Lower(imm).encode());
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}
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// Shifts
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void
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MacroAssemblerMIPSShared::ma_sll(Register rd, Register rt, Imm32 shift)
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@ -65,6 +65,7 @@ class MacroAssemblerMIPSShared : public Assembler
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void ma_li(Register dest, ImmGCPtr ptr);
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void ma_li(Register dest, Imm32 imm);
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void ma_liPatchable(Register dest, Imm32 imm);
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// Shift operations
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void ma_sll(Register rd, Register rt, Imm32 shift);
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@ -184,6 +185,12 @@ class MacroAssemblerMIPSShared : public Assembler
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void ma_cmp_set_double(Register dst, FloatRegister lhs, FloatRegister rhs, DoubleCondition c);
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void ma_cmp_set_float32(Register dst, FloatRegister lhs, FloatRegister rhs, DoubleCondition c);
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BufferOffset ma_BoundsCheck(Register bounded) {
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BufferOffset bo = m_buffer.nextOffset();
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ma_liPatchable(bounded, Imm32(0));
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return bo;
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}
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void moveToDoubleLo(Register src, FloatRegister dest) {
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as_mtc1(src, dest);
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}
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@ -124,7 +124,7 @@ jit::PatchJump(CodeLocationJump& jump_, CodeLocationLabel label, ReprotectCode r
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Instruction* inst2 = inst1->next();
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MaybeAutoWritableJitCode awjc(inst1, 8, reprotect);
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Assembler::UpdateLuiOriValue(inst1, inst2, (uint32_t)label.raw());
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AssemblerMIPSShared::UpdateLuiOriValue(inst1, inst2, (uint32_t)label.raw());
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AutoFlushICache::flush(uintptr_t(inst1), 8);
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}
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@ -146,12 +146,12 @@ jit::PatchBackedge(CodeLocationJump& jump, CodeLocationLabel label,
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} else {
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if (target == JitRuntime::BackedgeLoopHeader) {
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Instruction* lui = &branch[1];
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Assembler::UpdateLuiOriValue(lui, lui->next(), targetAddr);
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AssemblerMIPSShared::UpdateLuiOriValue(lui, lui->next(), targetAddr);
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// Jump to ori. The lui will be executed in delay slot.
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branch->setBOffImm16(BOffImm16(2 * sizeof(uint32_t)));
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} else {
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Instruction* lui = &branch[4];
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Assembler::UpdateLuiOriValue(lui, lui->next(), targetAddr);
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AssemblerMIPSShared::UpdateLuiOriValue(lui, lui->next(), targetAddr);
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branch->setBOffImm16(BOffImm16(4 * sizeof(uint32_t)));
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}
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}
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@ -168,7 +168,7 @@ Assembler::executableCopy(uint8_t* buffer)
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Instruction* inst1 = (Instruction*) ((uint32_t)buffer + longJumps_[i]);
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uint32_t value = Assembler::ExtractLuiOriValue(inst1, inst1->next());
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Assembler::UpdateLuiOriValue(inst1, inst1->next(), (uint32_t)buffer + value);
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AssemblerMIPSShared::UpdateLuiOriValue(inst1, inst1->next(), (uint32_t)buffer + value);
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}
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AutoFlushICache::setRange(uintptr_t(buffer), m_buffer.size());
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@ -207,7 +207,7 @@ TraceOneDataRelocation(JSTracer* trc, Instruction* inst)
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TraceManuallyBarrieredGenericPointerEdge(trc, reinterpret_cast<gc::Cell**>(&ptr),
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"ion-masm-ptr");
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if (ptr != prior) {
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Assembler::UpdateLuiOriValue(inst, inst->next(), uint32_t(ptr));
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AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(), uint32_t(ptr));
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AutoFlushICache::flush(uintptr_t(inst), 8);
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}
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}
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@ -306,7 +306,7 @@ Assembler::Bind(uint8_t* rawCode, CodeOffset* label, const void* address)
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if (label->bound()) {
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intptr_t offset = label->offset();
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Instruction* inst = (Instruction*) (rawCode + offset);
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Assembler::UpdateLuiOriValue(inst, inst->next(), (uint32_t)address);
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AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(), (uint32_t)address);
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}
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}
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@ -385,7 +385,7 @@ Assembler::bind(RepatchLabel* label)
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// For unconditional long branches generated by ma_liPatchable,
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// such as under:
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// jumpWithpatch
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Assembler::UpdateLuiOriValue(inst, inst->next(), dest.getOffset());
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AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(), dest.getOffset());
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} else if (inst[1].extractOpcode() == (uint32_t(op_lui) >> OpcodeShift) ||
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BOffImm16::IsInRange(offset))
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{
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@ -466,16 +466,6 @@ Assembler::ExtractLuiOriValue(Instruction* inst0, Instruction* inst1)
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return value;
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}
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void
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Assembler::UpdateLuiOriValue(Instruction* inst0, Instruction* inst1, uint32_t value)
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{
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MOZ_ASSERT(inst0->extractOpcode() == ((uint32_t)op_lui >> OpcodeShift));
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MOZ_ASSERT(inst1->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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((InstImm*) inst0)->setImm16(Imm16::Upper(Imm32(value)));
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((InstImm*) inst1)->setImm16(Imm16::Lower(Imm32(value)));
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}
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void
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Assembler::WriteLuiOriInstructions(Instruction* inst0, Instruction* inst1,
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Register reg, uint32_t value)
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@ -503,7 +493,7 @@ Assembler::PatchDataWithValueCheck(CodeLocationLabel label, PatchedImmPtr newVal
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MOZ_ASSERT(value == uint32_t(expectedValue.value));
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// Replace with new value
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Assembler::UpdateLuiOriValue(inst, inst->next(), uint32_t(newValue.value));
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AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(), uint32_t(newValue.value));
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AutoFlushICache::flush(uintptr_t(inst), 8);
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}
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@ -512,7 +502,7 @@ void
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Assembler::PatchInstructionImmediate(uint8_t* code, PatchedImmPtr imm)
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{
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InstImm* inst = (InstImm*)code;
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Assembler::UpdateLuiOriValue(inst, inst->next(), (uint32_t)imm.value);
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AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(), (uint32_t)imm.value);
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}
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uint32_t
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@ -161,7 +161,6 @@ class Assembler : public AssemblerMIPSShared
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static uint32_t PatchWrite_NearCallSize();
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static uint32_t ExtractLuiOriValue(Instruction* inst0, Instruction* inst1);
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static void UpdateLuiOriValue(Instruction* inst0, Instruction* inst1, uint32_t value);
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static void WriteLuiOriInstructions(Instruction* inst, Instruction* inst1,
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Register reg, uint32_t value);
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@ -1042,7 +1042,7 @@ MacroAssembler::wasmPatchBoundsCheck(uint8_t* patchAt, uint32_t limit)
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InstImm* i1 = (InstImm*) i0->next();
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// Replace with new value
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Assembler::UpdateLuiOriValue(i0, i1, limit);
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AssemblerMIPSShared::UpdateLuiOriValue(i0, i1, limit);
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}
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//}}} check_macroassembler_style
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@ -202,17 +202,6 @@ MacroAssemblerMIPS::ma_li(Register dest, ImmWord imm)
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ma_li(dest, Imm32(uint32_t(imm.value)));
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}
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// This method generates lui and ori instruction pair that can be modified by
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// UpdateLuiOriValue, either during compilation (eg. Assembler::bind), or
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// during execution (eg. jit::PatchJump).
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void
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MacroAssemblerMIPS::ma_liPatchable(Register dest, Imm32 imm)
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{
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m_buffer.ensureSpace(2 * sizeof(uint32_t));
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as_lui(dest, Imm16::Upper(imm).encode());
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as_ori(dest, dest, Imm16::Lower(imm).encode());
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}
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void
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MacroAssemblerMIPS::ma_liPatchable(Register dest, ImmPtr imm)
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{
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@ -55,7 +55,6 @@ class MacroAssemblerMIPS : public MacroAssemblerMIPSShared
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void ma_li(Register dest, CodeOffset* label);
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void ma_liPatchable(Register dest, Imm32 imm);
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void ma_li(Register dest, ImmWord imm);
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void ma_liPatchable(Register dest, ImmPtr imm);
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void ma_liPatchable(Register dest, ImmWord imm);
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@ -990,12 +989,6 @@ class MacroAssemblerMIPSCompat : public MacroAssemblerMIPS
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ma_sw(imm, addr);
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}
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BufferOffset ma_BoundsCheck(Register bounded) {
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BufferOffset bo = m_buffer.nextOffset();
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ma_liPatchable(bounded, ImmWord(0));
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return bo;
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}
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void moveFloat32(FloatRegister src, FloatRegister dest) {
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as_movs(dest, src);
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}
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@ -706,8 +706,12 @@ MacroAssembler::wasmBoundsCheck(Condition cond, Register index, L label)
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void
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MacroAssembler::wasmPatchBoundsCheck(uint8_t* patchAt, uint32_t limit)
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{
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Instruction* inst = (Instruction*) patchAt;
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InstImm* i0 = (InstImm*) inst;
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InstImm* i1 = (InstImm*) i0->next();
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// Replace with new value
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Assembler::UpdateLoad64Value((Instruction*) patchAt, limit);
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AssemblerMIPSShared::UpdateLuiOriValue(i0, i1, limit);
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}
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//}}} check_macroassembler_style
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@ -1009,12 +1009,6 @@ class MacroAssemblerMIPS64Compat : public MacroAssemblerMIPS64
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as_nop();
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}
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BufferOffset ma_BoundsCheck(Register bounded) {
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BufferOffset bo = m_buffer.nextOffset();
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ma_liPatchable(bounded, ImmWord(0));
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return bo;
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}
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void moveFloat32(FloatRegister src, FloatRegister dest) {
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as_movs(dest, src);
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}
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