зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1125202 - SpiderMonkey: Minimize diffs between Architecture-x64.h and Architecture-x86.h r=mjrosenb
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facf8f7052
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99e7df7c47
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@ -106,11 +106,11 @@ class Registers {
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(1 << X86Registers::esp) |
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(1 << X86Registers::r11); // This is ScratchReg.
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static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
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// Registers that can be allocated without being saved, generally.
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static const uint32_t TempMask = VolatileMask & ~NonAllocatableMask;
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static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
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// Registers returned from a JS -> JS call.
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static const uint32_t JSCallMask =
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(1 << X86Registers::ecx);
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@ -169,10 +169,9 @@ class FloatRegisters {
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static const uint32_t WrapperMask = VolatileMask;
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static const uint32_t NonAllocatableMask =
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(1 << X86Registers::xmm15); // This is ScratchFloatReg.
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(1 << X86Registers::xmm15); // This is ScratchDoubleReg.
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static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
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};
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template <typename T>
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@ -221,7 +220,6 @@ struct FloatRegister {
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uint32_t numAliased() const {
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return 1;
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}
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// N.B. FloatRegister is an explicit outparam here because msvc-2010
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// miscompiled it on win64 when the value was simply returned
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void aliased(uint32_t aliasIdx, FloatRegister *ret) {
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@ -239,7 +237,7 @@ struct FloatRegister {
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uint32_t size() const {
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return sizeof(double);
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}
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uint32_t numAlignedAliased() {
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uint32_t numAlignedAliased() const {
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return 1;
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}
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void alignedAliased(uint32_t aliasIdx, FloatRegister *ret) {
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@ -250,7 +248,6 @@ struct FloatRegister {
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static uint32_t GetSizeInBytes(const TypedRegisterSet<FloatRegister> &s);
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static uint32_t GetPushSizeInBytes(const TypedRegisterSet<FloatRegister> &s);
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uint32_t getRegisterDumpOffsetInBytes();
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};
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// Arm/D32 has double registers that can NOT be treated as float32
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@ -146,7 +146,7 @@ class FloatRegisters {
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static const uint32_t WrapperMask = VolatileMask;
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static const uint32_t NonAllocatableMask =
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(1 << X86Registers::xmm7);
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(1 << X86Registers::xmm7); // This is ScratchDoubleReg.
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static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
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};
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@ -185,10 +185,10 @@ struct FloatRegister {
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bool volatile_() const {
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return !!((1 << code()) & FloatRegisters::VolatileMask);
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}
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bool operator != (FloatRegister other) const {
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bool operator !=(FloatRegister other) const {
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return other.code_ != code_;
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}
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bool operator == (FloatRegister other) const {
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bool operator ==(FloatRegister other) const {
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return other.code_ == code_;
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}
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bool aliases(FloatRegister other) const {
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@ -225,8 +225,6 @@ struct FloatRegister {
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static uint32_t GetSizeInBytes(const TypedRegisterSet<FloatRegister> &s);
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static uint32_t GetPushSizeInBytes(const TypedRegisterSet<FloatRegister> &s);
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uint32_t getRegisterDumpOffsetInBytes();
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};
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// Arm/D32 has double registers that can NOT be treated as float32
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