зеркало из https://github.com/mozilla/gecko-dev.git
Suppress unused arg warnings for bug 557843 (r=me.)
Took the opportunity to add a few asserts to ensure the implit RHS register for x86 shift instructions is always ECX. --HG-- extra : convert_revision : 6baccc0354a87ece92ccff6ff138986bf4d19a2c
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232b0a8236
Коммит
aa8c8d3faf
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@ -239,9 +239,27 @@ namespace nanojit
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inline void Assembler::DIV(R r) { count_alu(); ALU(0xf7, (Register)7,(r)); asm_output("idiv edx:eax, %s",gpn(r)); }
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inline void Assembler::DIV(R r) { count_alu(); ALU(0xf7, (Register)7,(r)); asm_output("idiv edx:eax, %s",gpn(r)); }
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inline void Assembler::NOT(R r) { count_alu(); ALU(0xf7, (Register)2,(r)); asm_output("not %s",gpn(r)); }
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inline void Assembler::NOT(R r) { count_alu(); ALU(0xf7, (Register)2,(r)); asm_output("not %s",gpn(r)); }
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inline void Assembler::NEG(R r) { count_alu(); ALU(0xf7, (Register)3,(r)); asm_output("neg %s",gpn(r)); }
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inline void Assembler::NEG(R r) { count_alu(); ALU(0xf7, (Register)3,(r)); asm_output("neg %s",gpn(r)); }
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inline void Assembler::SHR(R r, R s) { count_alu(); ALU(0xd3, (Register)5,(r)); asm_output("shr %s,%s",gpn(r),gpn(s)); }
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inline void Assembler::SAR(R r, R s) { count_alu(); ALU(0xd3, (Register)7,(r)); asm_output("sar %s,%s",gpn(r),gpn(s)); }
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inline void Assembler::SHR(R r, R s) {
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inline void Assembler::SHL(R r, R s) { count_alu(); ALU(0xd3, (Register)4,(r)); asm_output("shl %s,%s",gpn(r),gpn(s)); }
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count_alu();
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NanoAssert(s == ECX); (void)s;
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ALU(0xd3, (Register)5,(r));
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asm_output("shr %s,%s",gpn(r),gpn(s));
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}
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inline void Assembler::SAR(R r, R s) {
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count_alu();
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NanoAssert(s == ECX); (void)s;
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ALU(0xd3, (Register)7,(r));
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asm_output("sar %s,%s",gpn(r),gpn(s));
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}
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inline void Assembler::SHL(R r, R s) {
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count_alu();
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NanoAssert(s == ECX); (void)s;
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ALU(0xd3, (Register)4,(r));
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asm_output("shl %s,%s",gpn(r),gpn(s));
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}
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inline void Assembler::SHIFT(I32 c, R r, I32 i) {
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inline void Assembler::SHIFT(I32 c, R r, I32 i) {
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underrunProtect(3);
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underrunProtect(3);
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@ -536,7 +554,7 @@ namespace nanojit
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_nIns[0] = JCC32;
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_nIns[0] = JCC32;
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_nIns[1] = (uint8_t) ( 0x80 | o );
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_nIns[1] = (uint8_t) ( 0x80 | o );
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}
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}
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asm_output("%-5s %p", n, t);
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asm_output("%-5s %p", n, t); (void) n;
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}
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}
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inline void Assembler::JMP_long(NIns* t) {
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inline void Assembler::JMP_long(NIns* t) {
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@ -846,7 +864,7 @@ namespace nanojit
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underrunProtect(2);
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underrunProtect(2);
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ALU(0xff, 2, (r));
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ALU(0xff, 2, (r));
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verbose_only(asm_output("call %s",gpn(r));)
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verbose_only(asm_output("call %s",gpn(r));)
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debug_only(if (ci->returnType()==ARGTYPE_F) fpu_push();)
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debug_only(if (ci->returnType()==ARGTYPE_F) fpu_push();) (void)ci;
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}
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}
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void Assembler::nInit(AvmCore*)
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void Assembler::nInit(AvmCore*)
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