зеркало из https://github.com/mozilla/gecko-dev.git
Bug 969375 - MIPS port: Added BaselineCompiler code. r=jandem,froydnj
This commit is contained in:
Branislav Rankov
Родитель
d53b1eeefe
Коммит
b6f032031e
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "jit/mips/BaselineCompiler-mips.h"
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using namespace js;
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using namespace js::jit;
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BaselineCompilerMIPS::BaselineCompilerMIPS(JSContext *cx, TempAllocator &alloc,
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HandleScript script)
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: BaselineCompilerShared(cx, alloc, script)
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{
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}
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#ifndef jit_mips_BaselineCompiler_mips_h
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#define jit_mips_BaselineCompiler_mips_h
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#include "jit/shared/BaselineCompiler-shared.h"
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namespace js {
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namespace jit {
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class BaselineCompilerMIPS : public BaselineCompilerShared
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{
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protected:
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BaselineCompilerMIPS(JSContext *cx, TempAllocator &alloc, HandleScript script);
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};
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typedef BaselineCompilerMIPS BaselineCompilerSpecific;
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} // namespace jit
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} // namespace js
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#endif /* jit_mips_BaselineCompiler_mips_h */
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@ -0,0 +1,333 @@
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#ifndef jit_mips_BaselineHelpers_mips_h
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#define jit_mips_BaselineHelpers_mips_h
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#ifdef JS_ION
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#include "jit/BaselineFrame.h"
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#include "jit/BaselineIC.h"
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#include "jit/BaselineRegisters.h"
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#include "jit/IonMacroAssembler.h"
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namespace js {
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namespace jit {
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// Distance from sp to the top Value inside an IC stub (no return address on
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// the stack on MIPS).
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static const size_t ICStackValueOffset = 0;
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inline void
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EmitRestoreTailCallReg(MacroAssembler &masm)
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{
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// No-op on MIPS because ra register is always holding the return address.
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}
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inline void
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EmitRepushTailCallReg(MacroAssembler &masm)
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{
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// No-op on MIPS because ra register is always holding the return address.
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}
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inline void
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EmitCallIC(CodeOffsetLabel *patchOffset, MacroAssembler &masm)
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{
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// Move ICEntry offset into BaselineStubReg.
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CodeOffsetLabel offset = masm.movWithPatch(ImmWord(-1), BaselineStubReg);
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*patchOffset = offset;
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// Load stub pointer into BaselineStubReg.
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masm.loadPtr(Address(BaselineStubReg, ICEntry::offsetOfFirstStub()), BaselineStubReg);
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// Load stubcode pointer from BaselineStubEntry.
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// R2 won't be active when we call ICs, so we can use it as scratch.
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masm.loadPtr(Address(BaselineStubReg, ICStub::offsetOfStubCode()), R2.scratchReg());
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// Call the stubcode via a direct jump-and-link
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masm.call(R2.scratchReg());
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}
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inline void
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EmitEnterTypeMonitorIC(MacroAssembler &masm,
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size_t monitorStubOffset = ICMonitoredStub::offsetOfFirstMonitorStub())
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{
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// This is expected to be called from within an IC, when BaselineStubReg
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// is properly initialized to point to the stub.
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masm.loadPtr(Address(BaselineStubReg, (uint32_t) monitorStubOffset), BaselineStubReg);
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// Load stubcode pointer from BaselineStubEntry.
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// R2 won't be active when we call ICs, so we can use it.
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masm.loadPtr(Address(BaselineStubReg, ICStub::offsetOfStubCode()), R2.scratchReg());
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// Jump to the stubcode.
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masm.branch(R2.scratchReg());
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}
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inline void
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EmitReturnFromIC(MacroAssembler &masm)
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{
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masm.branch(ra);
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}
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inline void
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EmitChangeICReturnAddress(MacroAssembler &masm, Register reg)
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{
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masm.movePtr(reg, ra);
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}
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inline void
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EmitTailCallVM(JitCode *target, MacroAssembler &masm, uint32_t argSize)
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{
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// We assume during this that R0 and R1 have been pushed, and that R2 is
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// unused.
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MOZ_ASSERT(R2 == ValueOperand(t7, t6));
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// Compute frame size.
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masm.movePtr(BaselineFrameReg, t6);
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masm.addPtr(Imm32(BaselineFrame::FramePointerOffset), t6);
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masm.subPtr(BaselineStackReg, t6);
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// Store frame size without VMFunction arguments for GC marking.
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masm.ma_subu(t7, t6, Imm32(argSize));
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masm.storePtr(t7, Address(BaselineFrameReg, BaselineFrame::reverseOffsetOfFrameSize()));
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// Push frame descriptor and perform the tail call.
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// BaselineTailCallReg (ra) already contains the return address (as we
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// keep it there through the stub calls), but the VMWrapper code being
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// called expects the return address to also be pushed on the stack.
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MOZ_ASSERT(BaselineTailCallReg == ra);
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masm.makeFrameDescriptor(t6, IonFrame_BaselineJS);
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masm.subPtr(Imm32(sizeof(IonCommonFrameLayout)), StackPointer);
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masm.storePtr(t6, Address(StackPointer, IonCommonFrameLayout::offsetOfDescriptor()));
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masm.storePtr(ra, Address(StackPointer, IonCommonFrameLayout::offsetOfReturnAddress()));
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masm.branch(target);
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}
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inline void
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EmitCreateStubFrameDescriptor(MacroAssembler &masm, Register reg)
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{
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// Compute stub frame size. We have to add two pointers: the stub reg and
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// previous frame pointer pushed by EmitEnterStubFrame.
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masm.movePtr(BaselineFrameReg, reg);
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masm.addPtr(Imm32(sizeof(intptr_t) * 2), reg);
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masm.subPtr(BaselineStackReg, reg);
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masm.makeFrameDescriptor(reg, IonFrame_BaselineStub);
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}
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inline void
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EmitCallVM(JitCode *target, MacroAssembler &masm)
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{
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EmitCreateStubFrameDescriptor(masm, t6);
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masm.push(t6);
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masm.call(target);
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}
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struct BaselineStubFrame {
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uintptr_t savedFrame;
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uintptr_t savedStub;
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uintptr_t returnAddress;
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uintptr_t descriptor;
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};
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static const uint32_t STUB_FRAME_SIZE = sizeof(BaselineStubFrame);
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static const uint32_t STUB_FRAME_SAVED_STUB_OFFSET = offsetof(BaselineStubFrame, savedStub);
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inline void
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EmitEnterStubFrame(MacroAssembler &masm, Register scratch)
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{
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MOZ_ASSERT(scratch != BaselineTailCallReg);
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// Compute frame size.
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masm.movePtr(BaselineFrameReg, scratch);
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masm.addPtr(Imm32(BaselineFrame::FramePointerOffset), scratch);
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masm.subPtr(BaselineStackReg, scratch);
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masm.storePtr(scratch, Address(BaselineFrameReg, BaselineFrame::reverseOffsetOfFrameSize()));
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// Note: when making changes here, don't forget to update
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// BaselineStubFrame if needed.
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// Push frame descriptor and return address.
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masm.makeFrameDescriptor(scratch, IonFrame_BaselineJS);
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masm.subPtr(Imm32(STUB_FRAME_SIZE), StackPointer);
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masm.storePtr(scratch, Address(StackPointer, offsetof(BaselineStubFrame, descriptor)));
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masm.storePtr(BaselineTailCallReg, Address(StackPointer,
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offsetof(BaselineStubFrame, returnAddress)));
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// Save old frame pointer, stack pointer and stub reg.
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masm.storePtr(BaselineStubReg, Address(StackPointer,
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offsetof(BaselineStubFrame, savedStub)));
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masm.storePtr(BaselineFrameReg, Address(StackPointer,
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offsetof(BaselineStubFrame, savedFrame)));
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masm.movePtr(BaselineStackReg, BaselineFrameReg);
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// We pushed 4 words, so the stack is still aligned to 8 bytes.
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masm.checkStackAlignment();
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}
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inline void
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EmitLeaveStubFrame(MacroAssembler &masm, bool calledIntoIon = false)
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{
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// Ion frames do not save and restore the frame pointer. If we called
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// into Ion, we have to restore the stack pointer from the frame descriptor.
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// If we performed a VM call, the descriptor has been popped already so
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// in that case we use the frame pointer.
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if (calledIntoIon) {
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masm.pop(ScratchRegister);
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masm.rshiftPtr(Imm32(FRAMESIZE_SHIFT), ScratchRegister);
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masm.addPtr(ScratchRegister, BaselineStackReg);
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} else {
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masm.movePtr(BaselineFrameReg, BaselineStackReg);
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}
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masm.loadPtr(Address(StackPointer, offsetof(BaselineStubFrame, savedFrame)),
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BaselineFrameReg);
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masm.loadPtr(Address(StackPointer, offsetof(BaselineStubFrame, savedStub)),
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BaselineStubReg);
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// Load the return address.
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masm.loadPtr(Address(StackPointer, offsetof(BaselineStubFrame, returnAddress)),
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BaselineTailCallReg);
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// Discard the frame descriptor.
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masm.loadPtr(Address(StackPointer, offsetof(BaselineStubFrame, descriptor)), ScratchRegister);
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masm.addPtr(Imm32(STUB_FRAME_SIZE), StackPointer);
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}
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inline void
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EmitStowICValues(MacroAssembler &masm, int values)
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{
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MOZ_ASSERT(values >= 0 && values <= 2);
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switch(values) {
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case 1:
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// Stow R0
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masm.pushValue(R0);
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break;
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case 2:
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// Stow R0 and R1
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masm.pushValue(R0);
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masm.pushValue(R1);
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break;
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}
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}
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inline void
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EmitUnstowICValues(MacroAssembler &masm, int values, bool discard = false)
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{
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MOZ_ASSERT(values >= 0 && values <= 2);
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switch(values) {
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case 1:
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// Unstow R0.
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if (discard)
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masm.addPtr(Imm32(sizeof(Value)), BaselineStackReg);
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else
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masm.popValue(R0);
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break;
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case 2:
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// Unstow R0 and R1.
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if (discard) {
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masm.addPtr(Imm32(sizeof(Value) * 2), BaselineStackReg);
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} else {
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masm.popValue(R1);
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masm.popValue(R0);
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}
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break;
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}
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}
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inline void
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EmitCallTypeUpdateIC(MacroAssembler &masm, JitCode *code, uint32_t objectOffset)
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{
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// R0 contains the value that needs to be typechecked.
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// The object we're updating is a boxed Value on the stack, at offset
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// objectOffset from $sp, excluding the return address.
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// Save the current BaselineStubReg to stack, as well as the TailCallReg,
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// since on mips, the $ra is live.
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masm.subPtr(Imm32(2 * sizeof(intptr_t)), StackPointer);
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masm.storePtr(BaselineStubReg, Address(StackPointer, sizeof(intptr_t)));
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masm.storePtr(BaselineTailCallReg, Address(StackPointer, 0));
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// This is expected to be called from within an IC, when BaselineStubReg
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// is properly initialized to point to the stub.
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masm.loadPtr(Address(BaselineStubReg, ICUpdatedStub::offsetOfFirstUpdateStub()),
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BaselineStubReg);
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// Load stubcode pointer from BaselineStubReg into BaselineTailCallReg.
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masm.loadPtr(Address(BaselineStubReg, ICStub::offsetOfStubCode()), R2.scratchReg());
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// Call the stubcode.
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masm.call(R2.scratchReg());
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// Restore the old stub reg and tailcall reg.
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masm.loadPtr(Address(StackPointer, 0), BaselineTailCallReg);
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masm.loadPtr(Address(StackPointer, sizeof(intptr_t)), BaselineStubReg);
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masm.addPtr(Imm32(2 * sizeof(intptr_t)), StackPointer);
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// The update IC will store 0 or 1 in R1.scratchReg() reflecting if the
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// value in R0 type-checked properly or not.
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Label success;
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masm.ma_b(R1.scratchReg(), Imm32(1), &success, Assembler::Equal, ShortJump);
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// If the IC failed, then call the update fallback function.
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EmitEnterStubFrame(masm, R1.scratchReg());
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masm.loadValue(Address(BaselineStackReg, STUB_FRAME_SIZE + objectOffset), R1);
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masm.pushValue(R0);
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masm.pushValue(R1);
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masm.push(BaselineStubReg);
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// Load previous frame pointer, push BaselineFrame *.
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masm.loadPtr(Address(BaselineFrameReg, 0), R0.scratchReg());
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masm.pushBaselineFramePtr(R0.scratchReg(), R0.scratchReg());
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EmitCallVM(code, masm);
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EmitLeaveStubFrame(masm);
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// Success at end.
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masm.bind(&success);
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}
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template <typename AddrType>
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inline void
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EmitPreBarrier(MacroAssembler &masm, const AddrType &addr, MIRType type)
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{
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// On MIPS, $ra is clobbered by patchableCallPreBarrier. Save it first.
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masm.push(ra);
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masm.patchableCallPreBarrier(addr, type);
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masm.pop(ra);
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}
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inline void
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EmitStubGuardFailure(MacroAssembler &masm)
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{
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// NOTE: This routine assumes that the stub guard code left the stack in
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// the same state it was in when it was entered.
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// BaselineStubEntry points to the current stub.
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// Load next stub into BaselineStubReg
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masm.loadPtr(Address(BaselineStubReg, ICStub::offsetOfNext()), BaselineStubReg);
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// Load stubcode pointer from BaselineStubEntry into scratch register.
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masm.loadPtr(Address(BaselineStubReg, ICStub::offsetOfStubCode()), R2.scratchReg());
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// Return address is already loaded, just jump to the next stubcode.
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MOZ_ASSERT(BaselineTailCallReg == ra);
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masm.branch(R2.scratchReg());
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}
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} // namespace jit
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} // namespace js
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#endif // JS_ION
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#endif /* jit_mips_BaselineHelpers_mips_h */
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@ -0,0 +1,223 @@
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
|
||||
* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
|
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|
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#include "jsiter.h"
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#include "jit/BaselineCompiler.h"
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#include "jit/BaselineHelpers.h"
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#include "jit/BaselineIC.h"
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#include "jit/BaselineJIT.h"
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#include "jit/IonLinker.h"
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#include "jsboolinlines.h"
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using namespace js;
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using namespace js::jit;
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namespace js {
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namespace jit {
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// ICCompare_Int32
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bool
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ICCompare_Int32::Compiler::generateStubCode(MacroAssembler &masm)
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{
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// Guard that R0 is an integer and R1 is an integer.
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Label failure;
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Label conditionTrue;
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masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
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masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
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// Compare payload regs of R0 and R1.
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Assembler::Condition cond = JSOpToCondition(op, /* signed = */true);
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masm.ma_cmp_set(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), cond);
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masm.tagValue(JSVAL_TYPE_BOOLEAN, R0.payloadReg(), R0);
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EmitReturnFromIC(masm);
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// Failure case - jump to next stub
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masm.bind(&failure);
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EmitStubGuardFailure(masm);
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return true;
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}
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bool
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ICCompare_Double::Compiler::generateStubCode(MacroAssembler &masm)
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{
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Label failure, isNaN;
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masm.ensureDouble(R0, FloatReg0, &failure);
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masm.ensureDouble(R1, FloatReg1, &failure);
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Register dest = R0.scratchReg();
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Assembler::DoubleCondition doubleCond = JSOpToDoubleCondition(op);
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||||
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masm.ma_cmp_set_double(dest, FloatReg0, FloatReg1, doubleCond);
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masm.tagValue(JSVAL_TYPE_BOOLEAN, dest, R0);
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EmitReturnFromIC(masm);
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// Failure case - jump to next stub
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masm.bind(&failure);
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EmitStubGuardFailure(masm);
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||||
return true;
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||||
}
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||||
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||||
// ICBinaryArith_Int32
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||||
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||||
bool
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||||
ICBinaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
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||||
{
|
||||
// Guard that R0 is an integer and R1 is an integer.
|
||||
Label failure;
|
||||
masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
|
||||
masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
|
||||
|
||||
// Add R0 and R1. Don't need to explicitly unbox, just use R2's payloadReg.
|
||||
Register scratchReg = R2.payloadReg();
|
||||
|
||||
// DIV and MOD need an extra non-volatile ValueOperand to hold R0.
|
||||
GeneralRegisterSet savedRegs = availableGeneralRegs(2);
|
||||
savedRegs = GeneralRegisterSet::Intersect(GeneralRegisterSet::NonVolatile(), savedRegs);
|
||||
ValueOperand savedValue = savedRegs.takeAnyValue();
|
||||
|
||||
Label goodMul, divTest1, divTest2;
|
||||
switch(op_) {
|
||||
case JSOP_ADD:
|
||||
// We know R0.typeReg() already contains the integer tag. No boxing
|
||||
// required.
|
||||
masm.ma_addTestOverflow(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), &failure);
|
||||
break;
|
||||
case JSOP_SUB:
|
||||
masm.ma_subTestOverflow(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), &failure);
|
||||
break;
|
||||
case JSOP_MUL: {
|
||||
masm.ma_mul_branch_overflow(scratchReg, R0.payloadReg(), R1.payloadReg(), &failure);
|
||||
|
||||
masm.ma_b(scratchReg, Imm32(0), &goodMul, Assembler::NotEqual, ShortJump);
|
||||
|
||||
// Result is -0 if operands have different signs.
|
||||
masm.as_xor(t8, R0.payloadReg(), R1.payloadReg());
|
||||
masm.ma_b(t8, Imm32(0), &failure, Assembler::LessThan, ShortJump);
|
||||
|
||||
masm.bind(&goodMul);
|
||||
masm.move32(scratchReg, R0.payloadReg());
|
||||
break;
|
||||
}
|
||||
case JSOP_DIV:
|
||||
case JSOP_MOD: {
|
||||
// Check for INT_MIN / -1, it results in a double.
|
||||
masm.ma_b(R0.payloadReg(), Imm32(INT_MIN), &divTest1, Assembler::NotEqual, ShortJump);
|
||||
masm.ma_b(R1.payloadReg(), Imm32(-1), &failure, Assembler::Equal, ShortJump);
|
||||
masm.bind(&divTest1);
|
||||
|
||||
// Check for division by zero
|
||||
masm.ma_b(R1.payloadReg(), Imm32(0), &failure, Assembler::Equal, ShortJump);
|
||||
|
||||
// Check for 0 / X with X < 0 (results in -0).
|
||||
masm.ma_b(R0.payloadReg(), Imm32(0), &divTest2, Assembler::NotEqual, ShortJump);
|
||||
masm.ma_b(R1.payloadReg(), Imm32(0), &failure, Assembler::LessThan, ShortJump);
|
||||
masm.bind(&divTest2);
|
||||
|
||||
masm.as_div(R0.payloadReg(), R1.payloadReg());
|
||||
|
||||
if (op_ == JSOP_DIV) {
|
||||
// Result is a double if the remainder != 0.
|
||||
masm.as_mfhi(scratchReg);
|
||||
masm.ma_b(scratchReg, Imm32(0), &failure, Assembler::NotEqual, ShortJump);
|
||||
masm.as_mflo(scratchReg);
|
||||
masm.tagValue(JSVAL_TYPE_INT32, scratchReg, R0);
|
||||
} else {
|
||||
Label done;
|
||||
// If X % Y == 0 and X < 0, the result is -0.
|
||||
masm.as_mfhi(scratchReg);
|
||||
masm.ma_b(scratchReg, Imm32(0), &done, Assembler::NotEqual, ShortJump);
|
||||
masm.ma_b(R0.payloadReg(), Imm32(0), &failure, Assembler::LessThan, ShortJump);
|
||||
masm.bind(&done);
|
||||
masm.tagValue(JSVAL_TYPE_INT32, scratchReg, R0);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case JSOP_BITOR:
|
||||
masm.ma_or(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
|
||||
break;
|
||||
case JSOP_BITXOR:
|
||||
masm.ma_xor(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
|
||||
break;
|
||||
case JSOP_BITAND:
|
||||
masm.ma_and(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
|
||||
break;
|
||||
case JSOP_LSH:
|
||||
// MIPS will only use 5 lowest bits in R1 as shift offset.
|
||||
masm.ma_sll(R0.payloadReg(), R0.payloadReg(), R1.payloadReg());
|
||||
break;
|
||||
case JSOP_RSH:
|
||||
masm.ma_sra(R0.payloadReg(), R0.payloadReg(), R1.payloadReg());
|
||||
break;
|
||||
case JSOP_URSH:
|
||||
masm.ma_srl(scratchReg, R0.payloadReg(), R1.payloadReg());
|
||||
if (allowDouble_) {
|
||||
Label toUint;
|
||||
masm.ma_b(scratchReg, Imm32(0), &toUint, Assembler::LessThan, ShortJump);
|
||||
|
||||
// Move result and box for return.
|
||||
masm.move32(scratchReg, R0.payloadReg());
|
||||
EmitReturnFromIC(masm);
|
||||
|
||||
masm.bind(&toUint);
|
||||
masm.convertUInt32ToDouble(scratchReg, FloatReg1);
|
||||
masm.boxDouble(FloatReg1, R0);
|
||||
} else {
|
||||
masm.ma_b(scratchReg, Imm32(0), &failure, Assembler::LessThan, ShortJump);
|
||||
// Move result for return.
|
||||
masm.move32(scratchReg, R0.payloadReg());
|
||||
}
|
||||
break;
|
||||
default:
|
||||
MOZ_ASSUME_UNREACHABLE("Unhandled op for BinaryArith_Int32.");
|
||||
}
|
||||
|
||||
EmitReturnFromIC(masm);
|
||||
|
||||
// Failure case - jump to next stub
|
||||
masm.bind(&failure);
|
||||
EmitStubGuardFailure(masm);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool
|
||||
ICUnaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
|
||||
{
|
||||
Label failure;
|
||||
masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
|
||||
|
||||
switch (op) {
|
||||
case JSOP_BITNOT:
|
||||
masm.not32(R0.payloadReg());
|
||||
break;
|
||||
case JSOP_NEG:
|
||||
// Guard against 0 and MIN_INT, both result in a double.
|
||||
masm.branchTest32(Assembler::Zero, R0.payloadReg(), Imm32(INT32_MAX), &failure);
|
||||
|
||||
masm.neg32(R0.payloadReg());
|
||||
break;
|
||||
default:
|
||||
MOZ_ASSUME_UNREACHABLE("Unexpected op");
|
||||
return false;
|
||||
}
|
||||
|
||||
EmitReturnFromIC(masm);
|
||||
|
||||
masm.bind(&failure);
|
||||
EmitStubGuardFailure(masm);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
} // namespace jit
|
||||
} // namespace js
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
|
||||
* vim: set ts=8 sts=4 et sw=4 tw=99:
|
||||
* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
|
||||
|
||||
#ifndef jit_mips_BaselineRegisters_mips_h
|
||||
#define jit_mips_BaselineRegisters_mips_h
|
||||
|
||||
#ifdef JS_ION
|
||||
|
||||
#include "jit/IonMacroAssembler.h"
|
||||
|
||||
namespace js {
|
||||
namespace jit {
|
||||
|
||||
static MOZ_CONSTEXPR_VAR Register BaselineFrameReg = s5;
|
||||
static MOZ_CONSTEXPR_VAR Register BaselineStackReg = sp;
|
||||
|
||||
static MOZ_CONSTEXPR_VAR ValueOperand R0(v1, v0);
|
||||
static MOZ_CONSTEXPR_VAR ValueOperand R1(s7, s6);
|
||||
static MOZ_CONSTEXPR_VAR ValueOperand R2(t7, t6);
|
||||
|
||||
// BaselineTailCallReg and BaselineStubReg
|
||||
// These use registers that are not preserved across calls.
|
||||
static MOZ_CONSTEXPR_VAR Register BaselineTailCallReg = ra;
|
||||
static MOZ_CONSTEXPR_VAR Register BaselineStubReg = t5;
|
||||
|
||||
static MOZ_CONSTEXPR_VAR Register ExtractTemp0 = InvalidReg;
|
||||
static MOZ_CONSTEXPR_VAR Register ExtractTemp1 = InvalidReg;
|
||||
|
||||
// Register used internally by MacroAssemblerMIPS.
|
||||
static MOZ_CONSTEXPR_VAR Register BaselineSecondScratchReg = SecondScratchReg;
|
||||
|
||||
// Note that BaselineTailCallReg is actually just the link register.
|
||||
// In MIPS code emission, we do not clobber BaselineTailCallReg since we keep
|
||||
// the return address for calls there.
|
||||
|
||||
// FloatReg0 must be equal to ReturnFloatReg.
|
||||
static MOZ_CONSTEXPR_VAR FloatRegister FloatReg0 = f0;
|
||||
static MOZ_CONSTEXPR_VAR FloatRegister FloatReg1 = f2;
|
||||
|
||||
} // namespace jit
|
||||
} // namespace js
|
||||
|
||||
#endif // JS_ION
|
||||
|
||||
#endif /* jit_mips_BaselineRegisters_mips_h */
|
||||
|
||||
|
|
@ -1585,6 +1585,12 @@ MacroAssemblerMIPSCompat::addPtr(const Address &src, Register dest)
|
|||
ma_addu(dest, ScratchRegister);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::subPtr(Register src, Register dest)
|
||||
{
|
||||
ma_subu(dest, dest, src);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::not32(Register reg)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -908,6 +908,7 @@ public:
|
|||
void andPtr(Imm32 imm, Register dest);
|
||||
void andPtr(Register src, Register dest);
|
||||
void addPtr(Register src, Register dest);
|
||||
void subPtr(Register src, Register dest);
|
||||
void addPtr(const Address &src, Register dest);
|
||||
void not32(Register reg);
|
||||
|
||||
|
|
|
|||
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