зеркало из https://github.com/mozilla/gecko-dev.git
Bug 1230005: Hide specifics of the LDR instruction; r=jolesen
--HG-- extra : commitid : 9ZRpi8bN8fE extra : rebase_source : 0c3fa8f441a3857714ea005504ebba0928fbbb50 extra : histedit_source : b3ede24e43775e2416c1bb5d4f4cfd17b79cb2f1%2C2a24f2b472d879c2724f1889f0650022780fc28d
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bcfe875382
Коммит
c15a416116
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@ -751,20 +751,8 @@ Assembler::GetCF32Target(Iter* iter)
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return dest;
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}
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if (inst1->is<InstLDR>()) {
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InstLDR* load = inst1->as<InstLDR>();
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uint32_t inst = load->encode();
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// Get the address of the instruction as a raw pointer.
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char* dataInst = reinterpret_cast<char*>(load);
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IsUp_ iu = IsUp_(inst & IsUp);
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int32_t offset = inst & 0xfff;
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if (iu != IsUp) {
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offset = - offset;
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}
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uint32_t** ptr = (uint32_t**)&dataInst[offset + 8];
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return *ptr;
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}
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if (inst1->is<InstLDR>())
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return *(uint32_t**) inst1->as<InstLDR>()->dest();
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MOZ_CRASH("unsupported branch relocation");
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}
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@ -785,6 +773,9 @@ Assembler::GetPtr32Target(Iter* start, Register* dest, RelocStyle* style)
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Instruction* load2 = start->next();
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if (load1->is<InstMovW>() && load2->is<InstMovT>()) {
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if (style)
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*style = L_MOVWT;
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// See if we have the complex case:
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// movw r_temp, #imm1
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// movt r_temp, #imm2
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@ -807,27 +798,17 @@ Assembler::GetPtr32Target(Iter* start, Register* dest, RelocStyle* style)
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if (dest)
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*dest = temp;
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if (style)
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*style = L_MOVWT;
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uint32_t* value = (uint32_t*) (targ_bot.decode() | (targ_top.decode() << 16));
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return value;
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}
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if (load1->is<InstLDR>()) {
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InstLDR* load = load1->as<InstLDR>();
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uint32_t inst = load->encode();
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// Get the address of the instruction as a raw pointer.
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char* dataInst = reinterpret_cast<char*>(load);
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IsUp_ iu = IsUp_(inst & IsUp);
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int32_t offset = inst & 0xfff;
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if (iu == IsDown)
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offset = - offset;
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if (dest)
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*dest = toRD(*load);
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if (style)
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*style = L_LDR;
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uint32_t** ptr = (uint32_t**)&dataInst[offset + 8];
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return *ptr;
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if (dest)
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*dest = toRD(*load1);
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return *(uint32_t**) load1->as<InstLDR>()->dest();
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}
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MOZ_CRASH("unsupported relocation");
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@ -2127,12 +2108,7 @@ Assembler::as_Imm32Pool(Register dest, uint32_t value, Condition c)
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Assembler::WritePoolEntry(Instruction* addr, Condition c, uint32_t data)
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{
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MOZ_ASSERT(addr->is<InstLDR>());
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int32_t offset = addr->encode() & 0xfff;
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if ((addr->encode() & IsUp) != IsUp)
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offset = -offset;
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char * rawAddr = reinterpret_cast<char*>(addr);
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uint32_t * dest = reinterpret_cast<uint32_t*>(&rawAddr[offset + 8]);
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*dest = data;
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*addr->as<InstLDR>()->dest() = data;
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MOZ_ASSERT(addr->extractCond() == c);
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}
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@ -2017,6 +2017,23 @@ class InstLDR : public InstDTR
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static bool IsTHIS(const Instruction& i);
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static InstLDR* AsTHIS(const Instruction& i);
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int32_t signedOffset() const {
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int32_t offset = encode() & 0xfff;
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if (IsUp_(encode() & IsUp) != IsUp)
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return -offset;
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return offset;
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}
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uint32_t* dest() const {
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int32_t offset = signedOffset();
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// When patching the load in PatchConstantPoolLoad, we ensure that the
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// offset is a multiple of 4, offset by 8 bytes from the actual
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// location. Indeed, when the base register is PC, ARM's 3 stages
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// pipeline design makes it that PC is off by 8 bytes (= 2 *
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// sizeof(uint32*)) when we actually executed it.
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MOZ_ASSERT(offset % 4 == 0);
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offset >>= 2;
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return (uint32_t*)raw() + offset + 2;
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}
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};
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JS_STATIC_ASSERT(sizeof(InstDTR) == sizeof(InstLDR));
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