From c44a614250dc50bf66779e71fa5aca993ed17ee6 Mon Sep 17 00:00:00 2001 From: Steve Singer Date: Sat, 13 Feb 2016 23:23:50 -0500 Subject: [PATCH] Bug 1246501 - Add ppc specific atomic operations to ipc/chromium. r=Waldo --- ipc/chromium/src/base/atomicops.h | 2 + .../src/base/atomicops_internals_ppc_gcc.h | 132 ++++++++++++++++++ 2 files changed, 134 insertions(+) create mode 100644 ipc/chromium/src/base/atomicops_internals_ppc_gcc.h diff --git a/ipc/chromium/src/base/atomicops.h b/ipc/chromium/src/base/atomicops.h index f9ad55b9b9d4..714e0892805b 100644 --- a/ipc/chromium/src/base/atomicops.h +++ b/ipc/chromium/src/base/atomicops.h @@ -144,6 +144,8 @@ Atomic64 Release_Load(volatile const Atomic64* ptr); #include "base/atomicops_internals_arm64_gcc.h" #elif defined(COMPILER_GCC) && defined(ARCH_CPU_MIPS) #include "base/atomicops_internals_mips_gcc.h" +#elif defined(COMPILER_GCC) && defined(ARCH_CPU_PPC_FAMILY) +#include "base/atomicops_internals_ppc_gcc.h" #else #include "base/atomicops_internals_mutex.h" #endif diff --git a/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h b/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h new file mode 100644 index 000000000000..d5c4231af1b3 --- /dev/null +++ b/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h @@ -0,0 +1,132 @@ +// Copyright 2012 the V8 project authors. All rights reserved. +// Use of this source code is governed by a BSD-style license that can be +// found in the LICENSE file. +// This file is an internal atomic implementation, use atomicops.h instead. +// +#ifndef BASE_ATOMICOPS_INTERNALS_PPC_H_ +#define BASE_ATOMICOPS_INTERNALS_PPC_H_ +namespace base { +namespace subtle { +inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, + Atomic32 old_value, + Atomic32 new_value) { + return (__sync_val_compare_and_swap(ptr, old_value, new_value)); +} +inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, + Atomic32 new_value) { + Atomic32 old_value; + do { + old_value = *ptr; + } while (__sync_bool_compare_and_swap(ptr, old_value, new_value) == false); + return old_value; +} +inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, + Atomic32 increment) { + return Barrier_AtomicIncrement(ptr, increment); +} +inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, + Atomic32 increment) { + for (;;) { + Atomic32 old_value = *ptr; + Atomic32 new_value = old_value + increment; + if (__sync_bool_compare_and_swap(ptr, old_value, new_value)) { + return new_value; + // The exchange took place as expected. + } + // Otherwise, *ptr changed mid-loop and we need to retry. + } +} +inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, + Atomic32 old_value, Atomic32 new_value) { + return NoBarrier_CompareAndSwap(ptr, old_value, new_value); +} +inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, + Atomic32 old_value, Atomic32 new_value) { + return NoBarrier_CompareAndSwap(ptr, old_value, new_value); +} +inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) { + *ptr = value; +} +inline void MemoryBarrier() { + __asm__ __volatile__("sync" : : : "memory"); } +inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) { + *ptr = value; + MemoryBarrier(); +} +inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) { + MemoryBarrier(); + *ptr = value; +} +inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) { return *ptr; } +inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) { + Atomic32 value = *ptr; + MemoryBarrier(); + return value; +} +inline Atomic32 Release_Load(volatile const Atomic32* ptr) { + MemoryBarrier(); + return *ptr; +} +#ifdef ARCH_CPU_PPC64 +inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr, + Atomic64 old_value, + Atomic64 new_value) { + return (__sync_val_compare_and_swap(ptr, old_value, new_value)); +} +inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, + Atomic64 new_value) { + Atomic64 old_value; + do { + old_value = *ptr; + } while (__sync_bool_compare_and_swap(ptr, old_value, new_value) == false); + return old_value; +} +inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, + Atomic64 increment) { + return Barrier_AtomicIncrement(ptr, increment); +} +inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, + Atomic64 increment) { + for (;;) { + Atomic64 old_value = *ptr; + Atomic64 new_value = old_value + increment; + if (__sync_bool_compare_and_swap(ptr, old_value, new_value)) { + return new_value; + // The exchange took place as expected. + } + // Otherwise, *ptr changed mid-loop and we need to retry. + } +} +inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, + Atomic64 old_value, Atomic64 new_value) { + return NoBarrier_CompareAndSwap(ptr, old_value, new_value); +} +inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, + Atomic64 old_value, Atomic64 new_value) { + return NoBarrier_CompareAndSwap(ptr, old_value, new_value); +} +inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) { + *ptr = value; +} +inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) { + *ptr = value; + MemoryBarrier(); +} +inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) { + MemoryBarrier(); + *ptr = value; +} +inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) { return *ptr; } +inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) { + Atomic64 value = *ptr; + MemoryBarrier(); + return value; +} +inline Atomic64 Release_Load(volatile const Atomic64* ptr) { + MemoryBarrier(); + return *ptr; +} +#endif +} // namespace base::subtle +} // namespace base +#endif // BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_