mozilla
/
gecko-dev
зеркало из https://github.com/mozilla/gecko-dev.git
1
0
Форкнуть 0
Код Задачи Пакеты Проекты Релизы Вики Активность

Bug 1278283 - Expose many simple operations in the MacroAssembler. r=nbp 

--HG--
extra : rebase_source : 099c3f1cf33cb1f34929499bac241e741dc68f48
This commit is contained in:
Lars T Hansen 2016-06-28 11:32:04 +02:00
Родитель 27fb1d56c1
Коммит d869ef34b6
9 изменённых файлов: 489 добавлений и 14 удалений
Показать статистику Скачать Patch файл Скачать Diff файл Показать все файлы Свернуть все файлы

60
js/src/jit/MacroAssembler.h
Просмотреть файл

@ -443,7 +443,7 @@ class MacroAssembler : public MacroAssemblerSpecific
void Pop(const Operand op) DEFINED_ON(x86_shared);
void Pop(Register reg) PER_SHARED_ARCH;
void Pop(FloatRegister t) DEFINED_ON(x86_shared);
void Pop(FloatRegister t) DEFINED_ON(x86_shared, arm, arm64);
void Pop(const ValueOperand& val) PER_SHARED_ARCH;
void popRooted(VMFunction::RootType rootType, Register cellReg, const ValueOperand& valueReg);
@ -691,6 +691,9 @@ class MacroAssembler : public MacroAssemblerSpecific
inline void move64(Imm64 imm, Register64 dest) PER_ARCH;
inline void move64(Register64 src, Register64 dest) PER_ARCH;
inline void moveFloat32ToGPR(FloatRegister src, Register dest) DEFINED_ON(arm, arm64, x86_shared);
inline void moveGPRToFloat32(Register src, FloatRegister dest) DEFINED_ON(arm, arm64, x86_shared);
// ===============================================================
// Logical instructions
@ -719,7 +722,7 @@ class MacroAssembler : public MacroAssemblerSpecific
inline void or64(Register64 src, Register64 dest) PER_ARCH;
inline void xor64(Register64 src, Register64 dest) PER_ARCH;
inline void xor32(Register src, Register dest) DEFINED_ON(x86_shared);
inline void xor32(Register src, Register dest) DEFINED_ON(x86_shared, arm, arm64);
inline void xor32(Imm32 imm, Register dest) PER_SHARED_ARCH;
inline void xorPtr(Register src, Register dest) PER_ARCH;
@ -746,7 +749,7 @@ class MacroAssembler : public MacroAssemblerSpecific
inline void add64(Register64 src, Register64 dest) PER_ARCH;
inline void add64(Imm32 imm, Register64 dest) PER_ARCH;
inline void addFloat32(FloatRegister src, FloatRegister dest) DEFINED_ON(x86_shared);
inline void addFloat32(FloatRegister src, FloatRegister dest) DEFINED_ON(x86_shared, arm, arm64);
inline void addDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
inline void addConstantDouble(double d, FloatRegister dest) DEFINED_ON(x86);
@ -761,18 +764,39 @@ class MacroAssembler : public MacroAssemblerSpecific
inline void subPtr(ImmWord imm, Register dest) DEFINED_ON(x64);
inline void subPtr(const Address& addr, Register dest) DEFINED_ON(mips_shared, arm, arm64, x86, x64);
inline void subFloat32(FloatRegister src, FloatRegister dest) DEFINED_ON(x86_shared, arm, arm64);
inline void subDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
// On x86-shared, srcDest must be eax and edx will be clobbered.
inline void mul32(Register rhs, Register srcDest) DEFINED_ON(arm, arm64, x86_shared);
inline void mul32(Register src1, Register src2, Register dest, Label* onOver, Label* onZero) DEFINED_ON(arm64);
inline void mul64(Imm64 imm, const Register64& dest) PER_ARCH;
inline void mulBy3(Register src, Register dest) PER_ARCH;
inline void mulFloat32(FloatRegister src, FloatRegister dest) DEFINED_ON(x86_shared, arm, arm64);
inline void mulDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
inline void mulDoublePtr(ImmPtr imm, Register temp, FloatRegister dest) DEFINED_ON(mips_shared, arm, arm64, x86, x64);
// Perform an integer division, returning the integer part rounded toward zero.
// rhs must not be zero, and the division must not overflow.
//
// On x86_shared, srcDest must be eax and edx will be clobbered.
// On ARM, the chip must have hardware division instructions.
inline void quotient32(Register rhs, Register srcDest, bool isUnsigned) DEFINED_ON(x86_shared, arm, arm64);
// Perform an integer division, returning the remainder part.
// rhs must not be zero, and the division must not overflow.
//
// On x86_shared, srcDest must be eax and edx will be clobbered.
// On ARM, the chip must have hardware division instructions.
inline void remainder32(Register rhs, Register srcDest, bool isUnsigned) DEFINED_ON(x86_shared, arm, arm64);
inline void divFloat32(FloatRegister src, FloatRegister dest) DEFINED_ON(x86_shared, arm, arm64);
inline void divDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
inline void inc32(RegisterOrInt32Constant* key);
@ -782,13 +806,27 @@ class MacroAssembler : public MacroAssemblerSpecific
inline void neg32(Register reg) PER_SHARED_ARCH;
inline void negateFloat(FloatRegister reg) DEFINED_ON(arm64, x86_shared);
inline void negateFloat(FloatRegister reg) DEFINED_ON(arm, arm64, x86_shared);
inline void negateDouble(FloatRegister reg) PER_SHARED_ARCH;
inline void absFloat32(FloatRegister src, FloatRegister dest) DEFINED_ON(arm, arm64, x86_shared);
inline void absDouble(FloatRegister src, FloatRegister dest) DEFINED_ON(arm, arm64, x86_shared);
inline void sqrtFloat32(FloatRegister src, FloatRegister dest) DEFINED_ON(arm, arm64, x86_shared);
inline void sqrtDouble(FloatRegister src, FloatRegister dest) DEFINED_ON(arm, arm64, x86_shared);
// ===============================================================
// Shift functions
// For shift-by-register there may be platform-specific
// variations, for example, x86 will perform the shift mod 32 but
// ARM will perform the shift mod 256.
//
// For shift-by-immediate the platform assembler may restrict the
// immediate, for example, the ARM assembler requires the count
// for 32-bit shifts to be in the range [0,31].
inline void lshiftPtr(Imm32 imm, Register dest) PER_ARCH;
inline void lshift64(Imm32 imm, Register64 dest) PER_ARCH;
@ -801,9 +839,13 @@ class MacroAssembler : public MacroAssemblerSpecific
inline void rshift64(Imm32 imm, Register64 dest) PER_ARCH;
// On x86_shared these have the constraint that shift must be in CL.
inline void lshift32(Register shift, Register srcDest) DEFINED_ON(x86_shared);
inline void rshift32(Register shift, Register srcDest) DEFINED_ON(x86_shared);
inline void rshift32Arithmetic(Register shift, Register srcDest) DEFINED_ON(x86_shared);
inline void lshift32(Register shift, Register srcDest) DEFINED_ON(x86_shared, arm, arm64);
inline void rshift32(Register shift, Register srcDest) DEFINED_ON(x86_shared, arm, arm64);
inline void rshift32Arithmetic(Register shift, Register srcDest) DEFINED_ON(x86_shared, arm, arm64);
inline void lshift32(Imm32 shift, Register srcDest) DEFINED_ON(x86_shared, arm, arm64);
inline void rshift32(Imm32 shift, Register srcDest) DEFINED_ON(x86_shared, arm, arm64);
inline void rshift32Arithmetic(Imm32 shift, Register srcDest) DEFINED_ON(x86_shared, arm, arm64);
// ===============================================================
// Rotation functions
@ -816,8 +858,8 @@ class MacroAssembler : public MacroAssemblerSpecific
// Bit counting functions
// knownNotZero may be true only if the src is known not to be zero.
inline void clz32(Register src, Register dest, bool knownNotZero) DEFINED_ON(x86_shared);
inline void ctz32(Register src, Register dest, bool knownNotZero) DEFINED_ON(x86_shared);
inline void clz32(Register src, Register dest, bool knownNotZero) DEFINED_ON(x86_shared, arm, arm64);
inline void ctz32(Register src, Register dest, bool knownNotZero) DEFINED_ON(x86_shared, arm, arm64);
inline void clz64(Register64 src, Register64 dest) DEFINED_ON(x64);
inline void ctz64(Register64 src, Register64 dest) DEFINED_ON(x64);

1
js/src/jit/arm/Assembler-arm.cpp
Просмотреть файл

@ -1911,6 +1911,7 @@ Assembler::as_udiv(Register rd, Register rn, Register rm, Condition c)
BufferOffset
Assembler::as_clz(Register dest, Register src, Condition c)
{
MOZ_ASSERT(src != pc && dest != pc);
return writeInst(RD(dest) | src.code() | c | 0x016f0f10);
}

153
js/src/jit/arm/MacroAssembler-arm-inl.h
Просмотреть файл

@ -28,6 +28,18 @@ MacroAssembler::move64(Imm64 imm, Register64 dest)
move32(Imm32((imm.value >> 32) & 0xFFFFFFFFL), dest.high);
}
void
MacroAssembler::moveFloat32ToGPR(FloatRegister src, Register dest)
{
ma_vxfer(src, dest);
}
void
MacroAssembler::moveGPRToFloat32(Register src, FloatRegister dest)
{
ma_vxfer(src, dest);
}
// ===============================================================
// Logical instructions
@ -146,6 +158,12 @@ MacroAssembler::xor64(Register64 src, Register64 dest)
ma_eor(src.high, dest.high);
}
void
MacroAssembler::xor32(Register src, Register dest)
{
ma_eor(src, dest, SetCC);
}
void
MacroAssembler::xor32(Imm32 imm, Register dest)
{
@ -243,6 +261,12 @@ MacroAssembler::addDouble(FloatRegister src, FloatRegister dest)
ma_vadd(dest, src, dest);
}
void
MacroAssembler::addFloat32(FloatRegister src, FloatRegister dest)
{
ma_vadd_f32(dest, src, dest);
}
void
MacroAssembler::sub32(Register src, Register dest)
{
@ -298,6 +322,18 @@ MacroAssembler::subDouble(FloatRegister src, FloatRegister dest)
ma_vsub(dest, src, dest);
}
void
MacroAssembler::subFloat32(FloatRegister src, FloatRegister dest)
{
ma_vsub_f32(dest, src, dest);
}
void
MacroAssembler::mul32(Register rhs, Register srcDest)
{
as_mul(srcDest, srcDest, rhs);
}
void
MacroAssembler::mul64(Imm64 imm, const Register64& dest)
{
@ -333,6 +369,12 @@ MacroAssembler::mulBy3(Register src, Register dest)
as_add(dest, src, lsl(src, 1));
}
void
MacroAssembler::mulFloat32(FloatRegister src, FloatRegister dest)
{
ma_vmul_f32(dest, src, dest);
}
void
MacroAssembler::mulDouble(FloatRegister src, FloatRegister dest)
{
@ -347,6 +389,32 @@ MacroAssembler::mulDoublePtr(ImmPtr imm, Register temp, FloatRegister dest)
mulDouble(ScratchDoubleReg, dest);
}
void
MacroAssembler::quotient32(Register rhs, Register srcDest, bool isUnsigned)
{
MOZ_ASSERT(HasIDIV());
if (isUnsigned)
ma_udiv(srcDest, rhs, srcDest);
else
ma_sdiv(srcDest, rhs, srcDest);
}
void
MacroAssembler::remainder32(Register rhs, Register srcDest, bool isUnsigned)
{
MOZ_ASSERT(HasIDIV());
if (isUnsigned)
ma_umod(srcDest, rhs, srcDest);
else
ma_smod(srcDest, rhs, srcDest);
}
void
MacroAssembler::divFloat32(FloatRegister src, FloatRegister dest)
{
ma_vdiv_f32(dest, src, dest);
}
void
MacroAssembler::divDouble(FloatRegister src, FloatRegister dest)
{
@ -382,6 +450,40 @@ MacroAssembler::negateDouble(FloatRegister reg)
ma_vneg(reg, reg);
}
void
MacroAssembler::negateFloat(FloatRegister reg)
{
ma_vneg_f32(reg, reg);
}
void
MacroAssembler::absFloat32(FloatRegister src, FloatRegister dest)
{
if (src != dest)
ma_vmov_f32(src, dest);
ma_vabs_f32(dest, dest);
}
void
MacroAssembler::absDouble(FloatRegister src, FloatRegister dest)
{
if (src != dest)
ma_vmov(src, dest);
ma_vabs(dest, dest);
}
void
MacroAssembler::sqrtFloat32(FloatRegister src, FloatRegister dest)
{
ma_vsqrt_f32(src, dest);
}
void
MacroAssembler::sqrtDouble(FloatRegister src, FloatRegister dest)
{
ma_vsqrt(src, dest);
}
// ===============================================================
// Shift functions
@ -399,18 +501,54 @@ MacroAssembler::lshift64(Imm32 imm, Register64 dest)
as_mov(dest.low, lsl(dest.low, imm.value));
}
void
MacroAssembler::lshift32(Register src, Register dest)
{
ma_lsl(src, dest, dest);
}
void
MacroAssembler::lshift32(Imm32 imm, Register dest)
{
lshiftPtr(imm, dest);
}
void
MacroAssembler::rshiftPtr(Imm32 imm, Register dest)
{
ma_lsr(imm, dest, dest);
}
void
MacroAssembler::rshift32(Register src, Register dest)
{
ma_lsr(src, dest, dest);
}
void
MacroAssembler::rshift32(Imm32 imm, Register dest)
{
rshiftPtr(imm, dest);
}
void
MacroAssembler::rshiftPtrArithmetic(Imm32 imm, Register dest)
{
ma_asr(imm, dest, dest);
}
void
MacroAssembler::rshift32Arithmetic(Register src, Register dest)
{
ma_asr(src, dest, dest);
}
void
MacroAssembler::rshift32Arithmetic(Imm32 imm, Register dest)
{
rshiftPtrArithmetic(imm, dest);
}
void
MacroAssembler::rshift64(Imm32 imm, Register64 dest)
{
@ -451,6 +589,21 @@ MacroAssembler::rotateRight(Register count, Register input, Register dest)
ma_ror(count, input, dest);
}
// ===============================================================
// Bit counting functions
void
MacroAssembler::clz32(Register src, Register dest, bool knownNotZero)
{
ma_clz(src, dest);
}
void
MacroAssembler::ctz32(Register src, Register dest, bool knownNotZero)
{
ma_ctz(src, dest);
}
// ===============================================================
// Branch functions

20
js/src/jit/arm/MacroAssembler-arm.cpp
Просмотреть файл

@ -1009,6 +1009,19 @@ MacroAssemblerARM::ma_clz(Register src, Register dest, Condition cond)
as_clz(dest, src, cond);
}
void
MacroAssemblerARM::ma_ctz(Register src, Register dest)
{
// int c = __clz(a & -a);
// return a ? 31 - c : c;
ScratchRegisterScope scratch(asMasm());
as_rsb(scratch, src, Imm8(0), SetCC);
as_and(dest, src, O2Reg(scratch), LeaveCC);
as_clz(dest, dest);
as_rsb(dest, dest, Imm8(0x1F), LeaveCC, Assembler::NotEqual);
}
// Memory.
// Shortcut for when we know we're transferring 32 bits of data.
void
@ -4670,6 +4683,13 @@ MacroAssembler::Pop(Register reg)
adjustFrame(-sizeof(intptr_t));
}
void
MacroAssembler::Pop(FloatRegister reg)
{
ma_vpop(reg);
adjustFrame(-reg.size());
}
void
MacroAssembler::Pop(const ValueOperand& val)
{

1
js/src/jit/arm/MacroAssembler-arm.h
Просмотреть файл

@ -277,6 +277,7 @@ class MacroAssemblerARM : public Assembler
void ma_udiv(Register num, Register div, Register dest, Condition cond = Always);
// Misc operations
void ma_clz(Register src, Register dest, Condition cond = Always);
void ma_ctz(Register src, Register dest);
// Memory:
// Shortcut for when we know we're transferring 32 bits of data.
void ma_dtr(LoadStore ls, Register rn, Imm32 offset, Register rt,

143
js/src/jit/arm64/MacroAssembler-arm64-inl.h
Просмотреть файл

@ -26,6 +26,18 @@ MacroAssembler::move64(Imm64 imm, Register64 dest)
movePtr(ImmWord(imm.value), dest.reg);
}
void
MacroAssembler::moveFloat32ToGPR(FloatRegister src, Register dest)
{
MOZ_CRASH("NYI: moveFloat32ToGPR");
}
void
MacroAssembler::moveGPRToFloat32(Register src, FloatRegister dest)
{
MOZ_CRASH("NYI: moveGPRToFloat32");
}
// ===============================================================
// Logical instructions
@ -160,6 +172,12 @@ MacroAssembler::xor64(Register64 src, Register64 dest)
xorPtr(src.reg, dest.reg);
}
void
MacroAssembler::xor32(Register src, Register dest)
{
Eor(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
}
void
MacroAssembler::xor32(Imm32 imm, Register dest)
{
@ -276,6 +294,12 @@ MacroAssembler::addDouble(FloatRegister src, FloatRegister dest)
fadd(ARMFPRegister(dest, 64), ARMFPRegister(dest, 64), ARMFPRegister(src, 64));
}
void
MacroAssembler::addFloat32(FloatRegister src, FloatRegister dest)
{
fadd(ARMFPRegister(dest, 32), ARMFPRegister(dest, 32), ARMFPRegister(src, 32));
}
void
MacroAssembler::sub32(Imm32 imm, Register dest)
{
@ -339,6 +363,18 @@ MacroAssembler::subDouble(FloatRegister src, FloatRegister dest)
fsub(ARMFPRegister(dest, 64), ARMFPRegister(dest, 64), ARMFPRegister(src, 64));
}
void
MacroAssembler::subFloat32(FloatRegister src, FloatRegister dest)
{
fsub(ARMFPRegister(dest, 32), ARMFPRegister(dest, 32), ARMFPRegister(src, 32));
}
void
MacroAssembler::mul32(Register rhs, Register srcDest)
{
MOZ_CRASH("NYI - mul32");
}
void
MacroAssembler::mul32(Register src1, Register src2, Register dest, Label* onOver, Label* onZero)
{
@ -372,6 +408,12 @@ MacroAssembler::mulBy3(Register src, Register dest)
Add(xdest, xsrc, Operand(xsrc, vixl::LSL, 1));
}
void
MacroAssembler::mulFloat32(FloatRegister src, FloatRegister dest)
{
fmul(ARMFPRegister(dest, 32), ARMFPRegister(dest, 32), ARMFPRegister(src, 32));
}
void
MacroAssembler::mulDouble(FloatRegister src, FloatRegister dest)
{
@ -390,6 +432,24 @@ MacroAssembler::mulDoublePtr(ImmPtr imm, Register temp, FloatRegister dest)
fmul(ARMFPRegister(dest, 64), ARMFPRegister(dest, 64), scratchDouble);
}
void
MacroAssembler::quotient32(Register rhs, Register srcDest, bool isUnsigned)
{
MOZ_CRASH("NYI - quotient32");
}
void
MacroAssembler::remainder32(Register rhs, Register srcDest, bool isUnsigned)
{
MOZ_CRASH("NYI - remainder32");
}
void
MacroAssembler::divFloat32(FloatRegister src, FloatRegister dest)
{
fdiv(ARMFPRegister(dest, 32), ARMFPRegister(dest, 32), ARMFPRegister(src, 32));
}
void
MacroAssembler::divDouble(FloatRegister src, FloatRegister dest)
{
@ -427,6 +487,30 @@ MacroAssembler::negateDouble(FloatRegister reg)
fneg(ARMFPRegister(reg, 64), ARMFPRegister(reg, 64));
}
void
MacroAssembler::absFloat32(FloatRegister src, FloatRegister dest)
{
MOZ_CRASH("NYI - absFloat32");
}
void
MacroAssembler::absDouble(FloatRegister src, FloatRegister dest)
{
MOZ_CRASH("NYI - absDouble");
}
void
MacroAssembler::sqrtFloat32(FloatRegister src, FloatRegister dest)
{
MOZ_CRASH("NYI - sqrtFloat32");
}
void
MacroAssembler::sqrtDouble(FloatRegister src, FloatRegister dest)
{
MOZ_CRASH("NYI - sqrtDouble");
}
// ===============================================================
// Shift functions
@ -442,6 +526,18 @@ MacroAssembler::lshift64(Imm32 imm, Register64 dest)
lshiftPtr(imm, dest.reg);
}
void
MacroAssembler::lshift32(Register shift, Register dest)
{
Lsl(ARMRegister(dest, 32), ARMRegister(dest, 32), ARMRegister(shift, 32));
}
void
MacroAssembler::lshift32(Imm32 imm, Register dest)
{
Lsl(ARMRegister(dest, 32), ARMRegister(dest, 32), imm.value);
}
void
MacroAssembler::rshiftPtr(Imm32 imm, Register dest)
{
@ -454,12 +550,36 @@ MacroAssembler::rshiftPtr(Imm32 imm, Register src, Register dest)
Lsr(ARMRegister(dest, 64), ARMRegister(src, 64), imm.value);
}
void
MacroAssembler::rshift32(Register shift, Register dest)
{
Lsr(ARMRegister(dest, 32), ARMRegister(dest, 32), ARMRegister(shift, 32));
}
void
MacroAssembler::rshift32(Imm32 imm, Register dest)
{
Lsr(ARMRegister(dest, 32), ARMRegister(dest, 32), imm.value);
}
void
MacroAssembler::rshiftPtrArithmetic(Imm32 imm, Register dest)
{
Asr(ARMRegister(dest, 64), ARMRegister(dest, 64), imm.value);
}
void
MacroAssembler::rshift32Arithmetic(Register shift, Register dest)
{
Asr(ARMRegister(dest, 32), ARMRegister(dest, 32), ARMRegister(shift, 32));
}
void
MacroAssembler::rshift32Arithmetic(Imm32 imm, Register dest)
{
Asr(ARMRegister(dest, 32), ARMRegister(dest, 32), imm.value);
}
void
MacroAssembler::rshift64(Imm32 imm, Register64 dest)
{
@ -471,22 +591,37 @@ MacroAssembler::rshift64(Imm32 imm, Register64 dest)
void
MacroAssembler::rotateLeft(Imm32 count, Register input, Register dest)
{
MOZ_CRASH("NYI");
MOZ_CRASH("NYI: rotateLeft by immediate");
}
void
MacroAssembler::rotateLeft(Register count, Register input, Register dest)
{
MOZ_CRASH("NYI");
MOZ_CRASH("NYI: rotateLeft by register");
}
void
MacroAssembler::rotateRight(Imm32 count, Register input, Register dest)
{
MOZ_CRASH("NYI");
MOZ_CRASH("NYI: rotateRight by immediate");
}
void
MacroAssembler::rotateRight(Register count, Register input, Register dest)
{
MOZ_CRASH("NYI");
MOZ_CRASH("NYI: rotateRight by register");
}
// ===============================================================
// Bit counting functions
void
MacroAssembler::clz32(Register src, Register dest, bool knownNotZero)
{
MOZ_CRASH("NYI: clz32");
}
void
MacroAssembler::ctz32(Register src, Register dest, bool knownNotZero)
{
MOZ_CRASH("NYI: ctz32");
}
// ===============================================================

6
js/src/jit/arm64/MacroAssembler-arm64.cpp
Просмотреть файл

@ -457,6 +457,12 @@ MacroAssembler::Pop(Register reg)
adjustFrame(-1 * int64_t(sizeof(int64_t)));
}
void
MacroAssembler::Pop(FloatRegister f)
{
MOZ_CRASH("NYI: Pop(FloatRegister)");
}
void
MacroAssembler::Pop(const ValueOperand& val)
{

2
js/src/jit/arm64/MacroAssembler-arm64.h
Просмотреть файл

@ -1512,7 +1512,7 @@ class MacroAssemblerCompat : public vixl::MacroAssembler
Mov(ScratchReg64, immediate);
Eor(ScratchReg64, ScratchReg2_64, ScratchReg64);
}
Tst(ScratchReg64, Operand(-1ll << JSVAL_TAG_SHIFT));
Tst(ScratchReg64, Operand((unsigned long long)(-1ll) << JSVAL_TAG_SHIFT));
return cond;
}

117
js/src/jit/x86-shared/MacroAssembler-x86-shared-inl.h
Просмотреть файл

@ -13,6 +13,21 @@ namespace js {
namespace jit {
//{{{ check_macroassembler_style
// ===============================================================
// Move instructions
void
MacroAssembler::moveFloat32ToGPR(FloatRegister src, Register dest)
{
vmovd(src, dest);
}
void
MacroAssembler::moveGPRToFloat32(Register src, FloatRegister dest)
{
vmovd(src, dest);
}
// ===============================================================
// Logical instructions
@ -199,12 +214,68 @@ MacroAssembler::subDouble(FloatRegister src, FloatRegister dest)
vsubsd(src, dest, dest);
}
void
MacroAssembler::subFloat32(FloatRegister src, FloatRegister dest)
{
vsubss(src, dest, dest);
}
void
MacroAssembler::mul32(Register rhs, Register srcDest)
{
MOZ_ASSERT(srcDest == eax);
imull(rhs, srcDest); // Clobbers edx
}
void
MacroAssembler::mulFloat32(FloatRegister src, FloatRegister dest)
{
vmulss(src, dest, dest);
}
void
MacroAssembler::mulDouble(FloatRegister src, FloatRegister dest)
{
vmulsd(src, dest, dest);
}
void
MacroAssembler::quotient32(Register rhs, Register srcDest, bool isUnsigned)
{
MOZ_ASSERT(srcDest == eax);
// Sign extend eax into edx to make (edx:eax): idiv/udiv are 64-bit.
if (isUnsigned) {
mov(ImmWord(0), edx);
udiv(rhs);
} else {
cdq();
idiv(rhs);
}
}
void
MacroAssembler::remainder32(Register rhs, Register srcDest, bool isUnsigned)
{
MOZ_ASSERT(srcDest == eax);
// Sign extend eax into edx to make (edx:eax): idiv/udiv are 64-bit.
if (isUnsigned) {
mov(ImmWord(0), edx);
udiv(rhs);
} else {
cdq();
idiv(rhs);
}
mov(edx, eax);
}
void
MacroAssembler::divFloat32(FloatRegister src, FloatRegister dest)
{
vdivss(src, dest, dest);
}
void
MacroAssembler::divDouble(FloatRegister src, FloatRegister dest)
{
@ -240,6 +311,34 @@ MacroAssembler::negateDouble(FloatRegister reg)
vxorpd(scratch, reg, reg); // s ^ 0x80000000000000
}
void
MacroAssembler::absFloat32(FloatRegister src, FloatRegister dest)
{
ScratchFloat32Scope scratch(*this);
loadConstantFloat32(mozilla::SpecificNaN<float>(0, mozilla::FloatingPoint<float>::kSignificandBits), scratch);
vandps(scratch, src, dest);
}
void
MacroAssembler::absDouble(FloatRegister src, FloatRegister dest)
{
ScratchDoubleScope scratch(*this);
loadConstantDouble(mozilla::SpecificNaN<double>(0, mozilla::FloatingPoint<double>::kSignificandBits), scratch);
vandpd(scratch, src, dest);
}
void
MacroAssembler::sqrtFloat32(FloatRegister src, FloatRegister dest)
{
vsqrtss(src, src, dest);
}
void
MacroAssembler::sqrtDouble(FloatRegister src, FloatRegister dest)
{
vsqrtsd(src, src, dest);
}
// ===============================================================
// Rotation instructions
void
@ -298,6 +397,24 @@ MacroAssembler::rshift32Arithmetic(Register shift, Register srcDest)
sarl_cl(srcDest);
}
void
MacroAssembler::lshift32(Imm32 shift, Register srcDest)
{
shll(shift, srcDest);
}
void
MacroAssembler::rshift32(Imm32 shift, Register srcDest)
{
shrl(shift, srcDest);
}
void
MacroAssembler::rshift32Arithmetic(Imm32 shift, Register srcDest)
{
sarl(shift, srcDest);
}
// ===============================================================
// Branch instructions