From ed8cd694ade0fb0c9045613e71d233ee6d2c4739 Mon Sep 17 00:00:00 2001 From: Jan de Mooij Date: Fri, 29 Jan 2016 10:15:30 +0100 Subject: [PATCH] Bug 1206652 part 1 - Remove ma_mov's SBit argument. r=nbp --- js/src/jit/arm/BaselineIC-arm.cpp | 6 +++--- js/src/jit/arm/CodeGenerator-arm.cpp | 12 +++++------ js/src/jit/arm/MacroAssembler-arm.cpp | 22 +++++++------------- js/src/jit/arm/MacroAssembler-arm.h | 30 +++++++-------------------- 4 files changed, 24 insertions(+), 46 deletions(-) diff --git a/js/src/jit/arm/BaselineIC-arm.cpp b/js/src/jit/arm/BaselineIC-arm.cpp index 2f56a01b8ef2..8534638882e8 100644 --- a/js/src/jit/arm/BaselineIC-arm.cpp +++ b/js/src/jit/arm/BaselineIC-arm.cpp @@ -31,8 +31,8 @@ ICCompare_Int32::Compiler::generateStubCode(MacroAssembler& masm) // Compare payload regs of R0 and R1. Assembler::Condition cond = JSOpToCondition(op, /* signed = */true); masm.cmp32(R0.payloadReg(), R1.payloadReg()); - masm.ma_mov(Imm32(1), R0.payloadReg(), LeaveCC, cond); - masm.ma_mov(Imm32(0), R0.payloadReg(), LeaveCC, Assembler::InvertCondition(cond)); + masm.ma_mov(Imm32(1), R0.payloadReg(), cond); + masm.ma_mov(Imm32(0), R0.payloadReg(), Assembler::InvertCondition(cond)); // Result is implicitly boxed already. masm.tagValue(JSVAL_TYPE_BOOLEAN, R0.payloadReg(), R0); @@ -59,7 +59,7 @@ ICCompare_Double::Compiler::generateStubCode(MacroAssembler& masm) masm.compareDouble(FloatReg0, FloatReg1); masm.ma_mov(Imm32(0), dest); - masm.ma_mov(Imm32(1), dest, LeaveCC, cond); + masm.ma_mov(Imm32(1), dest, cond); masm.tagValue(JSVAL_TYPE_BOOLEAN, dest, R0); EmitReturnFromIC(masm); diff --git a/js/src/jit/arm/CodeGenerator-arm.cpp b/js/src/jit/arm/CodeGenerator-arm.cpp index 202dc5752b52..f35f9d899766 100644 --- a/js/src/jit/arm/CodeGenerator-arm.cpp +++ b/js/src/jit/arm/CodeGenerator-arm.cpp @@ -90,7 +90,7 @@ CodeGeneratorARM::visitCompare(LCompare* comp) else masm.ma_cmp(ToRegister(left), ToOperand(right)); masm.ma_mov(Imm32(0), ToRegister(def)); - masm.ma_mov(Imm32(1), ToRegister(def), LeaveCC, cond); + masm.ma_mov(Imm32(1), ToRegister(def), cond); } void @@ -1583,8 +1583,8 @@ CodeGeneratorARM::visitNotD(LNotD* ins) } else { masm.as_vmrs(pc); masm.ma_mov(Imm32(0), dest); - masm.ma_mov(Imm32(1), dest, LeaveCC, Assembler::Equal); - masm.ma_mov(Imm32(1), dest, LeaveCC, Assembler::Overflow); + masm.ma_mov(Imm32(1), dest, Assembler::Equal); + masm.ma_mov(Imm32(1), dest, Assembler::Overflow); } } @@ -1611,8 +1611,8 @@ CodeGeneratorARM::visitNotF(LNotF* ins) } else { masm.as_vmrs(pc); masm.ma_mov(Imm32(0), dest); - masm.ma_mov(Imm32(1), dest, LeaveCC, Assembler::Equal); - masm.ma_mov(Imm32(1), dest, LeaveCC, Assembler::Overflow); + masm.ma_mov(Imm32(1), dest, Assembler::Equal); + masm.ma_mov(Imm32(1), dest, Assembler::Overflow); } } @@ -2183,7 +2183,7 @@ CodeGeneratorARM::visitAsmJSLoadHeap(LAsmJSLoadHeap* ins) if (mir->isAtomicAccess()) masm.ma_b(masm.asmOnOutOfBoundsLabel(), Assembler::AboveOrEqual); else - masm.ma_mov(Imm32(0), d, LeaveCC, Assembler::AboveOrEqual); + masm.ma_mov(Imm32(0), d, Assembler::AboveOrEqual); masm.ma_dataTransferN(IsLoad, size, isSigned, HeapReg, ptrReg, d, Offset, Assembler::Below); } memoryBarrier(mir->barrierAfter()); diff --git a/js/src/jit/arm/MacroAssembler-arm.cpp b/js/src/jit/arm/MacroAssembler-arm.cpp index 13a497d2734e..4ee318c07582 100644 --- a/js/src/jit/arm/MacroAssembler-arm.cpp +++ b/js/src/jit/arm/MacroAssembler-arm.cpp @@ -479,17 +479,15 @@ MacroAssemblerARM::ma_mov(Register src, Register dest, SBit s, Assembler::Condit } void -MacroAssemblerARM::ma_mov(Imm32 imm, Register dest, - SBit s, Assembler::Condition c) +MacroAssemblerARM::ma_mov(Imm32 imm, Register dest, Assembler::Condition c) { - ma_alu(InvalidReg, imm, dest, OpMov, s, c); + ma_alu(InvalidReg, imm, dest, OpMov, LeaveCC, c); } void -MacroAssemblerARM::ma_mov(ImmWord imm, Register dest, - SBit s, Assembler::Condition c) +MacroAssemblerARM::ma_mov(ImmWord imm, Register dest, Assembler::Condition c) { - ma_alu(InvalidReg, Imm32(imm.value), dest, OpMov, s, c); + ma_mov(Imm32(imm.value), dest, c); } void @@ -566,12 +564,6 @@ MacroAssemblerARM::ma_rol(Register shift, Register src, Register dst) } // Move not (dest <- ~src) -void -MacroAssemblerARM::ma_mvn(Imm32 imm, Register dest, SBit s, Assembler::Condition c) -{ - ma_alu(InvalidReg, imm, dest, OpMvn, s, c); -} - void MacroAssemblerARM::ma_mvn(Register src1, Register dest, SBit s, Assembler::Condition c) { @@ -1015,7 +1007,7 @@ MacroAssemblerARM::ma_mod_mask(Register src, Register dest, Register hold, Regis ma_mov(Imm32(0), dest); // Set the hold appropriately. ma_mov(Imm32(1), hold); - ma_mov(Imm32(-1), hold, LeaveCC, Signed); + ma_mov(Imm32(-1), hold, Signed); ma_rsb(Imm32(0), tmp, SetCC, Signed); // Begin the main loop. @@ -2410,10 +2402,10 @@ MacroAssembler::clampDoubleToUint8(FloatRegister input, Register output) // Copy the converted value out. as_vxfer(output, InvalidReg, scratchDouble, FloatToCore); as_vmrs(pc); - ma_mov(Imm32(0), output, LeaveCC, Overflow); // NaN => 0 + ma_mov(Imm32(0), output, Overflow); // NaN => 0 ma_b(&outOfRange, Overflow); // NaN ma_cmp(output, Imm32(0xff)); - ma_mov(Imm32(0xff), output, LeaveCC, Above); + ma_mov(Imm32(0xff), output, Above); ma_b(&outOfRange, Above); // Convert it back to see if we got the same value back. as_vcvt(scratchDouble, VFPRegister(scratchDouble).uintOverlay()); diff --git a/js/src/jit/arm/MacroAssembler-arm.h b/js/src/jit/arm/MacroAssembler-arm.h index 6b486c637ff9..7b6fb5e0f095 100644 --- a/js/src/jit/arm/MacroAssembler-arm.h +++ b/js/src/jit/arm/MacroAssembler-arm.h @@ -123,19 +123,12 @@ class MacroAssemblerARM : public Assembler static void ma_mov_patch(ImmPtr imm, Register dest, Assembler::Condition c, RelocStyle rs, Instruction* i); - // These should likely be wrapped up as a set of macros or something like - // that. I cannot think of a good reason to explicitly have all of this - // code. - // ALU based ops // mov - void ma_mov(Register src, Register dest, - SBit s = LeaveCC, Condition c = Always); + void ma_mov(Register src, Register dest, SBit s = LeaveCC, Condition c = Always); - void ma_mov(Imm32 imm, Register dest, - SBit s = LeaveCC, Condition c = Always); - void ma_mov(ImmWord imm, Register dest, - SBit s = LeaveCC, Condition c = Always); + void ma_mov(Imm32 imm, Register dest, Condition c = Always); + void ma_mov(ImmWord imm, Register dest, Condition c = Always); void ma_mov(ImmGCPtr ptr, Register dest); @@ -145,7 +138,7 @@ class MacroAssemblerARM : public Assembler void ma_asr(Imm32 shift, Register src, Register dst); void ma_ror(Imm32 shift, Register src, Register dst); void ma_rol(Imm32 shift, Register src, Register dst); - // Shifts (just a move with a shifting op2) + void ma_lsl(Register shift, Register src, Register dst); void ma_lsr(Register shift, Register src, Register dst); void ma_asr(Register shift, Register src, Register dst); @@ -153,12 +146,7 @@ class MacroAssemblerARM : public Assembler void ma_rol(Register shift, Register src, Register dst); // Move not (dest <- ~src) - void ma_mvn(Imm32 imm, Register dest, - SBit s = LeaveCC, Condition c = Always); - - - void ma_mvn(Register src1, Register dest, - SBit s = LeaveCC, Condition c = Always); + void ma_mvn(Register src1, Register dest, SBit s = LeaveCC, Condition c = Always); // Negate (dest <- -src) implemented as rsb dest, src, 0 void ma_neg(Register src, Register dest, @@ -177,8 +165,6 @@ class MacroAssemblerARM : public Assembler void ma_and(Imm32 imm, Register src1, Register dest, SBit s = LeaveCC, Condition c = Always); - - // Bit clear (dest <- dest & ~imm) or (dest <- src1 & ~src2) void ma_bic(Imm32 imm, Register dest, SBit s = LeaveCC, Condition c = Always); @@ -1595,8 +1581,8 @@ class MacroAssemblerARMCompat : public MacroAssemblerARM // <0, then we want to clamp to 0, otherwise, we wish to clamp to 255 ScratchRegisterScope scratch(asMasm()); as_mov(scratch, asr(reg, 8), SetCC); - ma_mov(Imm32(0xff), reg, LeaveCC, NotEqual); - ma_mov(Imm32(0), reg, LeaveCC, Signed); + ma_mov(Imm32(0xff), reg, NotEqual); + ma_mov(Imm32(0), reg, Signed); } inline void incrementInt32Value(const Address& addr); @@ -1648,7 +1634,7 @@ class MacroAssemblerARMCompat : public MacroAssemblerARM emitSet(Assembler::Condition cond, Register dest) { ma_mov(Imm32(0), dest); - ma_mov(Imm32(1), dest, LeaveCC, cond); + ma_mov(Imm32(1), dest, cond); } template