зеркало из https://github.com/mozilla/gecko-dev.git
269 строки
9.2 KiB
C
269 строки
9.2 KiB
C
/*
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* Copyright (c) 2016, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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* was not distributed with this source code in the LICENSE file, you can
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
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* Media Patent License 1.0 was not distributed with this source code in the
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* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#include <assert.h>
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#include <immintrin.h>
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#include "config/aom_config.h"
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#include "aom_ports/mem.h"
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#include "aom/aom_integer.h"
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#include "aom_dsp/aom_dsp_common.h"
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#include "aom_dsp/x86/obmc_intrinsic_ssse3.h"
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#include "aom_dsp/x86/synonyms.h"
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////////////////////////////////////////////////////////////////////////////////
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// 8 bit
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////////////////////////////////////////////////////////////////////////////////
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static AOM_FORCE_INLINE unsigned int obmc_sad_w4(const uint8_t *pre,
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const int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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const int height) {
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const int pre_step = pre_stride - 4;
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int n = 0;
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__m128i v_sad_d = _mm_setzero_si128();
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do {
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const __m128i v_p_b = xx_loadl_32(pre + n);
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const __m128i v_m_d = xx_load_128(mask + n);
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const __m128i v_w_d = xx_load_128(wsrc + n);
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const __m128i v_p_d = _mm_cvtepu8_epi32(v_p_b);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm_d = _mm_madd_epi16(v_p_d, v_m_d);
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const __m128i v_diff_d = _mm_sub_epi32(v_w_d, v_pm_d);
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const __m128i v_absdiff_d = _mm_abs_epi32(v_diff_d);
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// Rounded absolute difference
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const __m128i v_rad_d = xx_roundn_epu32(v_absdiff_d, 12);
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v_sad_d = _mm_add_epi32(v_sad_d, v_rad_d);
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n += 4;
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if (n % 4 == 0) pre += pre_step;
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} while (n < 4 * height);
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return xx_hsum_epi32_si32(v_sad_d);
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}
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static AOM_FORCE_INLINE unsigned int obmc_sad_w8n(
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const uint8_t *pre, const int pre_stride, const int32_t *wsrc,
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const int32_t *mask, const int width, const int height) {
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const int pre_step = pre_stride - width;
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int n = 0;
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__m128i v_sad_d = _mm_setzero_si128();
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assert(width >= 8);
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assert(IS_POWER_OF_TWO(width));
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do {
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const __m128i v_p1_b = xx_loadl_32(pre + n + 4);
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const __m128i v_m1_d = xx_load_128(mask + n + 4);
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const __m128i v_w1_d = xx_load_128(wsrc + n + 4);
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const __m128i v_p0_b = xx_loadl_32(pre + n);
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const __m128i v_m0_d = xx_load_128(mask + n);
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const __m128i v_w0_d = xx_load_128(wsrc + n);
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const __m128i v_p0_d = _mm_cvtepu8_epi32(v_p0_b);
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const __m128i v_p1_d = _mm_cvtepu8_epi32(v_p1_b);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm0_d = _mm_madd_epi16(v_p0_d, v_m0_d);
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const __m128i v_pm1_d = _mm_madd_epi16(v_p1_d, v_m1_d);
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const __m128i v_diff0_d = _mm_sub_epi32(v_w0_d, v_pm0_d);
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const __m128i v_diff1_d = _mm_sub_epi32(v_w1_d, v_pm1_d);
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const __m128i v_absdiff0_d = _mm_abs_epi32(v_diff0_d);
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const __m128i v_absdiff1_d = _mm_abs_epi32(v_diff1_d);
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// Rounded absolute difference
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const __m128i v_rad0_d = xx_roundn_epu32(v_absdiff0_d, 12);
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const __m128i v_rad1_d = xx_roundn_epu32(v_absdiff1_d, 12);
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v_sad_d = _mm_add_epi32(v_sad_d, v_rad0_d);
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v_sad_d = _mm_add_epi32(v_sad_d, v_rad1_d);
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n += 8;
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if (n % width == 0) pre += pre_step;
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} while (n < width * height);
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return xx_hsum_epi32_si32(v_sad_d);
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}
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#define OBMCSADWXH(w, h) \
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unsigned int aom_obmc_sad##w##x##h##_sse4_1( \
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const uint8_t *pre, int pre_stride, const int32_t *wsrc, \
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const int32_t *msk) { \
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if (w == 4) { \
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return obmc_sad_w4(pre, pre_stride, wsrc, msk, h); \
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} else { \
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return obmc_sad_w8n(pre, pre_stride, wsrc, msk, w, h); \
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} \
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}
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OBMCSADWXH(128, 128)
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OBMCSADWXH(128, 64)
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OBMCSADWXH(64, 128)
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OBMCSADWXH(64, 64)
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OBMCSADWXH(64, 32)
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OBMCSADWXH(32, 64)
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OBMCSADWXH(32, 32)
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OBMCSADWXH(32, 16)
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OBMCSADWXH(16, 32)
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OBMCSADWXH(16, 16)
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OBMCSADWXH(16, 8)
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OBMCSADWXH(8, 16)
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OBMCSADWXH(8, 8)
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OBMCSADWXH(8, 4)
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OBMCSADWXH(4, 8)
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OBMCSADWXH(4, 4)
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OBMCSADWXH(4, 16)
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OBMCSADWXH(16, 4)
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OBMCSADWXH(8, 32)
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OBMCSADWXH(32, 8)
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OBMCSADWXH(16, 64)
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OBMCSADWXH(64, 16)
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////////////////////////////////////////////////////////////////////////////////
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// High bit-depth
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////////////////////////////////////////////////////////////////////////////////
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static AOM_FORCE_INLINE unsigned int hbd_obmc_sad_w4(const uint8_t *pre8,
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const int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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const int height) {
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const uint16_t *pre = CONVERT_TO_SHORTPTR(pre8);
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const int pre_step = pre_stride - 4;
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int n = 0;
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__m128i v_sad_d = _mm_setzero_si128();
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do {
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const __m128i v_p_w = xx_loadl_64(pre + n);
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const __m128i v_m_d = xx_load_128(mask + n);
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const __m128i v_w_d = xx_load_128(wsrc + n);
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const __m128i v_p_d = _mm_cvtepu16_epi32(v_p_w);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm_d = _mm_madd_epi16(v_p_d, v_m_d);
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const __m128i v_diff_d = _mm_sub_epi32(v_w_d, v_pm_d);
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const __m128i v_absdiff_d = _mm_abs_epi32(v_diff_d);
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// Rounded absolute difference
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const __m128i v_rad_d = xx_roundn_epu32(v_absdiff_d, 12);
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v_sad_d = _mm_add_epi32(v_sad_d, v_rad_d);
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n += 4;
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if (n % 4 == 0) pre += pre_step;
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} while (n < 4 * height);
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return xx_hsum_epi32_si32(v_sad_d);
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}
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static AOM_FORCE_INLINE unsigned int hbd_obmc_sad_w8n(
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const uint8_t *pre8, const int pre_stride, const int32_t *wsrc,
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const int32_t *mask, const int width, const int height) {
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const uint16_t *pre = CONVERT_TO_SHORTPTR(pre8);
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const int pre_step = pre_stride - width;
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int n = 0;
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__m128i v_sad_d = _mm_setzero_si128();
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assert(width >= 8);
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assert(IS_POWER_OF_TWO(width));
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do {
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const __m128i v_p1_w = xx_loadl_64(pre + n + 4);
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const __m128i v_m1_d = xx_load_128(mask + n + 4);
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const __m128i v_w1_d = xx_load_128(wsrc + n + 4);
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const __m128i v_p0_w = xx_loadl_64(pre + n);
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const __m128i v_m0_d = xx_load_128(mask + n);
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const __m128i v_w0_d = xx_load_128(wsrc + n);
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const __m128i v_p0_d = _mm_cvtepu16_epi32(v_p0_w);
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const __m128i v_p1_d = _mm_cvtepu16_epi32(v_p1_w);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm0_d = _mm_madd_epi16(v_p0_d, v_m0_d);
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const __m128i v_pm1_d = _mm_madd_epi16(v_p1_d, v_m1_d);
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const __m128i v_diff0_d = _mm_sub_epi32(v_w0_d, v_pm0_d);
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const __m128i v_diff1_d = _mm_sub_epi32(v_w1_d, v_pm1_d);
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const __m128i v_absdiff0_d = _mm_abs_epi32(v_diff0_d);
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const __m128i v_absdiff1_d = _mm_abs_epi32(v_diff1_d);
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// Rounded absolute difference
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const __m128i v_rad0_d = xx_roundn_epu32(v_absdiff0_d, 12);
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const __m128i v_rad1_d = xx_roundn_epu32(v_absdiff1_d, 12);
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v_sad_d = _mm_add_epi32(v_sad_d, v_rad0_d);
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v_sad_d = _mm_add_epi32(v_sad_d, v_rad1_d);
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n += 8;
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if (n % width == 0) pre += pre_step;
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} while (n < width * height);
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return xx_hsum_epi32_si32(v_sad_d);
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}
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#define HBD_OBMCSADWXH(w, h) \
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unsigned int aom_highbd_obmc_sad##w##x##h##_sse4_1( \
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const uint8_t *pre, int pre_stride, const int32_t *wsrc, \
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const int32_t *mask) { \
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if (w == 4) { \
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return hbd_obmc_sad_w4(pre, pre_stride, wsrc, mask, h); \
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} else { \
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return hbd_obmc_sad_w8n(pre, pre_stride, wsrc, mask, w, h); \
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} \
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}
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HBD_OBMCSADWXH(128, 128)
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HBD_OBMCSADWXH(128, 64)
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HBD_OBMCSADWXH(64, 128)
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HBD_OBMCSADWXH(64, 64)
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HBD_OBMCSADWXH(64, 32)
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HBD_OBMCSADWXH(32, 64)
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HBD_OBMCSADWXH(32, 32)
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HBD_OBMCSADWXH(32, 16)
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HBD_OBMCSADWXH(16, 32)
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HBD_OBMCSADWXH(16, 16)
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HBD_OBMCSADWXH(16, 8)
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HBD_OBMCSADWXH(8, 16)
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HBD_OBMCSADWXH(8, 8)
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HBD_OBMCSADWXH(8, 4)
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HBD_OBMCSADWXH(4, 8)
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HBD_OBMCSADWXH(4, 4)
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HBD_OBMCSADWXH(4, 16)
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HBD_OBMCSADWXH(16, 4)
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HBD_OBMCSADWXH(8, 32)
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HBD_OBMCSADWXH(32, 8)
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HBD_OBMCSADWXH(16, 64)
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HBD_OBMCSADWXH(64, 16)
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