зеркало из https://github.com/mozilla/gecko-dev.git
242 строки
7.4 KiB
C++
242 строки
7.4 KiB
C++
// Copyright (c) 2012 The Chromium Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include "base/cpu.h"
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#include <limits.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <string.h>
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#include <algorithm>
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#include "base/macros.h"
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#include "build/build_config.h"
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#if defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
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#include "base/files/file_util.h"
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#include "base/lazy_instance.h"
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#endif
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#if defined(ARCH_CPU_X86_FAMILY)
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#if defined(_MSC_VER)
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#include <intrin.h>
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#include <immintrin.h> // For _xgetbv()
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#endif
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#endif
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namespace base {
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CPU::CPU()
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: signature_(0),
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type_(0),
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family_(0),
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model_(0),
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stepping_(0),
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ext_model_(0),
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ext_family_(0),
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has_mmx_(false),
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has_sse_(false),
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has_sse2_(false),
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has_sse3_(false),
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has_ssse3_(false),
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has_sse41_(false),
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has_sse42_(false),
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has_popcnt_(false),
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has_avx_(false),
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has_avx2_(false),
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has_aesni_(false),
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has_non_stop_time_stamp_counter_(false),
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cpu_vendor_("unknown") {
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Initialize();
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}
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namespace {
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#if defined(ARCH_CPU_X86_FAMILY)
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#ifndef _MSC_VER
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#if defined(__pic__) && defined(__i386__)
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void __cpuid(int cpu_info[4], int info_type) {
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__asm__ volatile (
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"mov %%ebx, %%edi\n"
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"cpuid\n"
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"xchg %%edi, %%ebx\n"
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: "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type)
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);
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}
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#else
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void __cpuid(int cpu_info[4], int info_type) {
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__asm__ volatile (
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"cpuid\n"
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: "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type)
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);
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}
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#endif
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// _xgetbv returns the value of an Intel Extended Control Register (XCR).
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// Currently only XCR0 is defined by Intel so |xcr| should always be zero.
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uint64_t _xgetbv(uint32_t xcr) {
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uint32_t eax, edx;
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__asm__ volatile (
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"xgetbv" : "=a"(eax), "=d"(edx) : "c"(xcr));
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return (static_cast<uint64_t>(edx) << 32) | eax;
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}
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#endif // !_MSC_VER
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#endif // ARCH_CPU_X86_FAMILY
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#if defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
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class LazyCpuInfoValue {
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public:
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LazyCpuInfoValue() {
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// This function finds the value from /proc/cpuinfo under the key "model
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// name" or "Processor". "model name" is used in Linux 3.8 and later (3.7
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// and later for arm64) and is shown once per CPU. "Processor" is used in
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// earler versions and is shown only once at the top of /proc/cpuinfo
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// regardless of the number CPUs.
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const char kModelNamePrefix[] = "model name\t: ";
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const char kProcessorPrefix[] = "Processor\t: ";
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std::string contents;
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ReadFileToString(FilePath("/proc/cpuinfo"), &contents);
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DCHECK(!contents.empty());
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if (contents.empty()) {
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return;
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}
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std::istringstream iss(contents);
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std::string line;
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while (std::getline(iss, line)) {
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if (brand_.empty() &&
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(line.compare(0, strlen(kModelNamePrefix), kModelNamePrefix) == 0 ||
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line.compare(0, strlen(kProcessorPrefix), kProcessorPrefix) == 0)) {
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brand_.assign(line.substr(strlen(kModelNamePrefix)));
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}
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}
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}
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const std::string& brand() const { return brand_; }
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private:
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std::string brand_;
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DISALLOW_COPY_AND_ASSIGN(LazyCpuInfoValue);
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};
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base::LazyInstance<LazyCpuInfoValue>::Leaky g_lazy_cpuinfo =
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LAZY_INSTANCE_INITIALIZER;
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#endif // defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) ||
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// defined(OS_LINUX))
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} // anonymous namespace
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void CPU::Initialize() {
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#if defined(ARCH_CPU_X86_FAMILY)
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int cpu_info[4] = {-1};
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char cpu_string[48];
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// __cpuid with an InfoType argument of 0 returns the number of
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// valid Ids in CPUInfo[0] and the CPU identification string in
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// the other three array elements. The CPU identification string is
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// not in linear order. The code below arranges the information
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// in a human readable form. The human readable order is CPUInfo[1] |
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// CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
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// before using memcpy to copy these three array elements to cpu_string.
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__cpuid(cpu_info, 0);
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int num_ids = cpu_info[0];
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std::swap(cpu_info[2], cpu_info[3]);
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memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1]));
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cpu_vendor_.assign(cpu_string, 3 * sizeof(cpu_info[1]));
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// Interpret CPU feature information.
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if (num_ids > 0) {
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int cpu_info7[4] = {0};
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__cpuid(cpu_info, 1);
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if (num_ids >= 7) {
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__cpuid(cpu_info7, 7);
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}
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signature_ = cpu_info[0];
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stepping_ = cpu_info[0] & 0xf;
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model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
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family_ = (cpu_info[0] >> 8) & 0xf;
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type_ = (cpu_info[0] >> 12) & 0x3;
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ext_model_ = (cpu_info[0] >> 16) & 0xf;
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ext_family_ = (cpu_info[0] >> 20) & 0xff;
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has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
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has_sse_ = (cpu_info[3] & 0x02000000) != 0;
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has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
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has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
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has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
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has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
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has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
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has_popcnt_ = (cpu_info[2] & 0x00800000) != 0;
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// AVX instructions will generate an illegal instruction exception unless
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// a) they are supported by the CPU,
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// b) XSAVE is supported by the CPU and
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// c) XSAVE is enabled by the kernel.
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// See http://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled
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//
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// In addition, we have observed some crashes with the xgetbv instruction
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// even after following Intel's example code. (See crbug.com/375968.)
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// Because of that, we also test the XSAVE bit because its description in
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// the CPUID documentation suggests that it signals xgetbv support.
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has_avx_ =
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(cpu_info[2] & 0x10000000) != 0 &&
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(cpu_info[2] & 0x04000000) != 0 /* XSAVE */ &&
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(cpu_info[2] & 0x08000000) != 0 /* OSXSAVE */ &&
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(_xgetbv(0) & 6) == 6 /* XSAVE enabled by kernel */;
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has_aesni_ = (cpu_info[2] & 0x02000000) != 0;
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has_avx2_ = has_avx_ && (cpu_info7[1] & 0x00000020) != 0;
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}
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// Get the brand string of the cpu.
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__cpuid(cpu_info, 0x80000000);
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const int parameter_end = 0x80000004;
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int max_parameter = cpu_info[0];
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if (cpu_info[0] >= parameter_end) {
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char* cpu_string_ptr = cpu_string;
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for (int parameter = 0x80000002; parameter <= parameter_end &&
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cpu_string_ptr < &cpu_string[sizeof(cpu_string)]; parameter++) {
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__cpuid(cpu_info, parameter);
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memcpy(cpu_string_ptr, cpu_info, sizeof(cpu_info));
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cpu_string_ptr += sizeof(cpu_info);
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}
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cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string);
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}
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const int parameter_containing_non_stop_time_stamp_counter = 0x80000007;
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if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) {
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__cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter);
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has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
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}
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#elif defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
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cpu_brand_.assign(g_lazy_cpuinfo.Get().brand());
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#endif
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}
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CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const {
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if (has_avx2()) return AVX2;
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if (has_avx()) return AVX;
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if (has_sse42()) return SSE42;
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if (has_sse41()) return SSE41;
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if (has_ssse3()) return SSSE3;
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if (has_sse3()) return SSE3;
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if (has_sse2()) return SSE2;
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if (has_sse()) return SSE;
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return PENTIUM;
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}
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} // namespace base
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