зеркало из https://github.com/mozilla/pjs.git
Rematerialize ALU+IMM operations on ARM (bug 555255 r=jbramley+)
The ARM backend already supported single-instruction folding of immediates into add/sub/and/or/xor instructions. This patch enables the same instructions to be rematerialized without spilling them. --HG-- extra : convert_revision : c5fca9078e37d7d79f66cf6023fcbf707d11d57b
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ad50b202ee
Коммит
617d47bec1
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@ -1230,10 +1230,28 @@ Assembler::asm_store32(LOpcode op, LIns *value, int dr, LIns *base)
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}
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}
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}
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}
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bool
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canRematALU(LIns *ins)
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{
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// Return true if we can generate code for this instruction that neither
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// sets CCs, clobbers an input register, nor requires allocating a register.
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switch (ins->opcode()) {
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case LIR_addi:
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case LIR_subi:
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case LIR_andi:
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case LIR_ori:
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case LIR_xori:
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return ins->oprnd1()->isInReg() && ins->oprnd2()->isImmI();
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default:
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;
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}
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return false;
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}
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bool
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bool
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Assembler::canRemat(LIns* ins)
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Assembler::canRemat(LIns* ins)
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{
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{
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return ins->isImmI() || ins->isop(LIR_alloc);
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return ins->isImmI() || ins->isop(LIR_alloc) || canRematALU(ins);
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}
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}
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void
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void
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@ -1243,8 +1261,17 @@ Assembler::asm_restore(LInsp i, Register r)
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asm_add_imm(r, FP, deprecated_disp(i));
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asm_add_imm(r, FP, deprecated_disp(i));
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} else if (i->isImmI()) {
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} else if (i->isImmI()) {
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asm_ld_imm(r, i->immI());
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asm_ld_imm(r, i->immI());
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}
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} else if (canRematALU(i)) {
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else {
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Register rn = i->oprnd1()->getReg();
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int32_t imm = i->oprnd2()->immI();
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switch (i->opcode()) {
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case LIR_addi: asm_add_imm(r, rn, imm, /*stat=*/ 0); break;
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case LIR_subi: asm_sub_imm(r, rn, imm, /*stat=*/ 0); break;
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case LIR_andi: asm_and_imm(r, rn, imm, /*stat=*/ 0); break;
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case LIR_ori: asm_orr_imm(r, rn, imm, /*stat=*/ 0); break;
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case LIR_xori: asm_eor_imm(r, rn, imm, /*stat=*/ 0); break;
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}
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} else {
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// We can't easily load immediate values directly into FP registers, so
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// We can't easily load immediate values directly into FP registers, so
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// ensure that memory is allocated for the constant and load it from
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// ensure that memory is allocated for the constant and load it from
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// memory.
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// memory.
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