434 строки
10 KiB
ArmAsm
434 строки
10 KiB
ArmAsm
/* cipher-gcm-armv8-aarch32-ce.S - ARM/CE accelerated GHASH
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* Copyright (C) 2016 Jussi Kivilinna <jussi.kivilinna@iki.fi>
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*
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* This file is part of Libgcrypt.
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*
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* Libgcrypt is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as
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* published by the Free Software Foundation; either version 2.1 of
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* the License, or (at your option) any later version.
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*
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* Libgcrypt is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <config.h>
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#if defined(HAVE_ARM_ARCH_V6) && defined(__ARMEL__) && \
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defined(HAVE_COMPATIBLE_GCC_ARM_PLATFORM_AS) && \
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defined(HAVE_GCC_INLINE_ASM_AARCH32_CRYPTO)
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.syntax unified
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.arch armv8-a
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.fpu crypto-neon-fp-armv8
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.arm
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.text
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#ifdef __PIC__
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# define GET_DATA_POINTER(reg, name, rtmp) \
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ldr reg, 1f; \
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ldr rtmp, 2f; \
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b 3f; \
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1: .word _GLOBAL_OFFSET_TABLE_-(3f+8); \
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2: .word name(GOT); \
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3: add reg, pc, reg; \
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ldr reg, [reg, rtmp];
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#else
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# define GET_DATA_POINTER(reg, name, rtmp) ldr reg, =name
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#endif
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/* Constants */
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.align 4
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gcry_gcm_reduction_constant:
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.Lrconst64:
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.quad 0xc200000000000000
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/* Register macros */
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#define rhash q0
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#define rhash_l d0
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#define rhash_h d1
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#define rh1 q1
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#define rh1_l d2
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#define rh1_h d3
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#define rbuf q2
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#define rbuf_l d4
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#define rbuf_h d5
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#define rbuf1 q3
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#define rbuf1_l d6
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#define rbuf1_h d7
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#define rbuf2 q4
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#define rbuf2_l d8
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#define rbuf2_h d9
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#define rbuf3 q5
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#define rbuf3_l d10
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#define rbuf3_h d11
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#define rh2 q6
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#define rh2_l d12
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#define rh2_h d13
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#define rh3 q7
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#define rh3_l d14
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#define rh3_h d15
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#define rh4 q8
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#define rh4_l d16
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#define rh4_h d17
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#define rr2 q9
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#define rr2_l d18
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#define rr2_h d19
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#define rr3 q10
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#define rr3_l d20
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#define rr3_h d21
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#define rr0 q11
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#define rr0_l d22
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#define rr0_h d23
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#define rr1 q12
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#define rr1_l d24
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#define rr1_h d25
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#define rt0 q13
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#define rt0_l d26
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#define rt0_h d27
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#define rt1 q14
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#define rt1_l d28
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#define rt1_h d29
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#define rrconst q15
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#define rrconst_l d30
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#define rrconst_h d31
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/* GHASH macros */
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/* See "Gouvêa, C. P. L. & López, J. Implementing GCM on ARMv8. Topics in
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* Cryptology — CT-RSA 2015" for details.
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*/
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/* Input: 'a' and 'b', Output: 'r0:r1' (low 128-bits in r0, high in r1)
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* Note: 'r1' may be 'a' or 'b', 'r0' must not be either 'a' or 'b'.
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*/
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#define PMUL_128x128(r0, r1, a, b, t, interleave_op) \
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veor t##_h, b##_l, b##_h; \
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veor t##_l, a##_l, a##_h; \
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vmull.p64 r0, a##_l, b##_l; \
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vmull.p64 r1, a##_h, b##_h; \
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vmull.p64 t, t##_h, t##_l; \
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interleave_op; \
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veor t, r0; \
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veor t, r1; \
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veor r0##_h, t##_l; \
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veor r1##_l, t##_h;
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/* Input: 'aA' and 'bA', Output: 'r0A:r1A' (low 128-bits in r0A, high in r1A)
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* Note: 'r1A' may be 'aA' or 'bA', 'r0A' must not be either 'aA' or 'bA'.
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* Input: 'aB' and 'bB', Output: 'r0B:r1B' (low 128-bits in r0B, high in r1B)
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* Note: 'r1B' may be 'aB' or 'bB', 'r0B' must not be either 'aB' or 'bB'.
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*/
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#define PMUL_128x128_2(r0A, r1A, aA, bA, r0B, r1B, aB, bB, tA, tB, interleave_op) \
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veor tA##_h, bA##_l, bA##_h; \
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veor tA##_l, aA##_l, aA##_h; \
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veor tB##_h, bB##_l, bB##_h; \
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veor tB##_l, aB##_l, aB##_h; \
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vmull.p64 r0A, aA##_l, bA##_l; \
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vmull.p64 r1A, aA##_h, bA##_h; \
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vmull.p64 tA, tA##_h, tA##_l; \
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vmull.p64 r0B, aB##_l, bB##_l; \
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vmull.p64 r1B, aB##_h, bB##_h; \
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vmull.p64 tB, tB##_h, tB##_l; \
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interleave_op; \
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veor tA, r0A; \
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veor tA, r1A; \
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veor tB, r0B; \
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veor tB, r1B; \
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veor r0A##_h, tA##_l; \
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veor r1A##_l, tA##_h; \
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veor r0B##_h, tB##_l; \
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veor r1B##_l, tB##_h; \
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/* Input: 'r0:r1', Output: 'a' */
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#define REDUCTION(a, r0, r1, rconst, t, interleave_op) \
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vmull.p64 t, r0##_l, rconst; \
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veor r0##_h, t##_l; \
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veor r1##_l, t##_h; \
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interleave_op; \
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vmull.p64 t, r0##_h, rconst; \
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veor r1, t; \
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veor a, r0, r1;
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#define _(...) __VA_ARGS__
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#define __ _()
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/* Other functional macros */
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#define CLEAR_REG(reg) veor reg, reg;
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/*
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* unsigned int _gcry_ghash_armv8_ce_pmull (void *gcm_key, byte *result,
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* const byte *buf, size_t nblocks,
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* void *gcm_table);
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*/
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.align 3
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.globl _gcry_ghash_armv8_ce_pmull
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.type _gcry_ghash_armv8_ce_pmull,%function;
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_gcry_ghash_armv8_ce_pmull:
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/* input:
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* r0: gcm_key
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* r1: result/hash
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* r2: buf
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* r3: nblocks
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* %st+0: gcm_table
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*/
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push {r4-r6, lr}
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cmp r3, #0
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beq .Ldo_nothing
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GET_DATA_POINTER(r4, .Lrconst64, lr)
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vld1.64 {rhash}, [r1]
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vld1.64 {rh1}, [r0]
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vrev64.8 rhash, rhash /* byte-swap */
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vld1.64 {rrconst_h}, [r4]
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vext.8 rhash, rhash, rhash, #8
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cmp r3, #4
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blo .Less_than_4
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/* Bulk processing of 4 blocks per loop iteration. */
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ldr r5, [sp, #(4*4)];
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add r6, r5, #32
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vpush {q4-q7}
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vld1.64 {rh2-rh3}, [r5]
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vld1.64 {rh4}, [r6]
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vld1.64 {rbuf-rbuf1}, [r2]!
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sub r3, r3, #4
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vld1.64 {rbuf2-rbuf3}, [r2]!
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cmp r3, #4
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vrev64.8 rbuf, rbuf /* byte-swap */
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vrev64.8 rbuf1, rbuf1 /* byte-swap */
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vrev64.8 rbuf2, rbuf2 /* byte-swap */
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vrev64.8 rbuf3, rbuf3 /* byte-swap */
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vext.8 rbuf, rbuf, rbuf, #8
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vext.8 rbuf1, rbuf1, rbuf1, #8
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vext.8 rbuf2, rbuf2, rbuf2, #8
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vext.8 rbuf3, rbuf3, rbuf3, #8
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veor rhash, rhash, rbuf /* in0 ^ hash */
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blo .Lend_4
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.Loop_4:
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/* (in0 ^ hash) * H⁴ => rr2:rr3 */
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/* (in1) * H³ => rr0:rr1 */
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PMUL_128x128_2(rr0, rr1, rbuf1, rh3, rr2, rr3, rhash, rh4, rt1, rt0, __)
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vld1.64 {rbuf-rbuf1}, [r2]!
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sub r3, r3, #4
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veor rr0, rr0, rr2
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veor rr1, rr1, rr3
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/* (in2) * H² => rr2:rr3 */
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/* (in3) * H¹ => rhash:rbuf3 */
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PMUL_128x128_2(rr2, rr3, rbuf2, rh2, rhash, rbuf3, rbuf3, rh1, rt0, rt1,
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_(vrev64.8 rbuf, rbuf))
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vld1.64 {rbuf2}, [r2]!
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vrev64.8 rbuf1, rbuf1
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veor rr0, rr0, rr2
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veor rr1, rr1, rr3
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cmp r3, #4
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vext.8 rbuf, rbuf, rbuf, #8
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vext.8 rbuf1, rbuf1, rbuf1, #8
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veor rr0, rr0, rhash
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veor rr1, rr1, rbuf3
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vld1.64 {rbuf3}, [r2]!
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REDUCTION(rhash, rr0, rr1, rrconst_h, rt1,
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_(vrev64.8 rbuf2, rbuf2;
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vrev64.8 rbuf3, rbuf3))
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vext.8 rbuf2, rbuf2, rbuf2, #8
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vext.8 rbuf3, rbuf3, rbuf3, #8
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veor rhash, rhash, rbuf /* in0 ^ hash */
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bhs .Loop_4
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.Lend_4:
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/* (in0 ^ hash) * H⁴ => rr2:rr3 */
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/* (in1) * H³ => rr0:rr1 */
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PMUL_128x128_2(rr0, rr1, rbuf1, rh3, rr2, rr3, rhash, rh4, rt1, rt0, __)
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/* (in2) * H² => rhash:rbuf */
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/* (in3) * H¹ => rbuf1:rbuf2 */
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PMUL_128x128_2(rhash, rbuf, rbuf2, rh2, rbuf1, rbuf2, rbuf3, rh1, rt0, rt1,
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_(veor rr0, rr0, rr2;
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veor rr1, rr1, rr3))
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veor rr0, rr0, rhash
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veor rr1, rr1, rbuf
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veor rr0, rr0, rbuf1
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veor rr1, rr1, rbuf2
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REDUCTION(rhash, rr0, rr1, rrconst_h, rt1,
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_(CLEAR_REG(rr2);
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CLEAR_REG(rr3);
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CLEAR_REG(rbuf1);
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CLEAR_REG(rbuf2);
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CLEAR_REG(rbuf3);
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CLEAR_REG(rh2);
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CLEAR_REG(rh3);
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CLEAR_REG(rh4)))
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vpop {q4-q7}
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cmp r3, #0
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beq .Ldone
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.Less_than_4:
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/* Handle remaining blocks. */
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vld1.64 {rbuf}, [r2]!
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subs r3, r3, #1
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vrev64.8 rbuf, rbuf /* byte-swap */
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vext.8 rbuf, rbuf, rbuf, #8
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veor rhash, rhash, rbuf
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beq .Lend
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.Loop:
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vld1.64 {rbuf}, [r2]!
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subs r3, r3, #1
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PMUL_128x128(rr0, rr1, rhash, rh1, rt0, _(vrev64.8 rbuf, rbuf))
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REDUCTION(rhash, rr0, rr1, rrconst_h, rt0, _(vext.8 rbuf, rbuf, rbuf, #8))
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veor rhash, rhash, rbuf
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bne .Loop
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.Lend:
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PMUL_128x128(rr0, rr1, rhash, rh1, rt0, _(CLEAR_REG(rbuf)))
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REDUCTION(rhash, rr0, rr1, rrconst_h, rt0, _(CLEAR_REG(rh1)))
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.Ldone:
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CLEAR_REG(rr1)
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vrev64.8 rhash, rhash /* byte-swap */
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CLEAR_REG(rt0)
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CLEAR_REG(rr0)
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vext.8 rhash, rhash, rhash, #8
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CLEAR_REG(rt1)
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vst1.64 {rhash}, [r1]
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CLEAR_REG(rhash)
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.Ldo_nothing:
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mov r0, #0
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pop {r4-r6, pc}
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.size _gcry_ghash_armv8_ce_pmull,.-_gcry_ghash_armv8_ce_pmull;
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/*
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* void _gcry_ghash_setup_armv8_ce_pmull (void *gcm_key, void *gcm_table);
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*/
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.align 3
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.globl _gcry_ghash_setup_armv8_ce_pmull
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.type _gcry_ghash_setup_armv8_ce_pmull,%function;
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_gcry_ghash_setup_armv8_ce_pmull:
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/* input:
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* r0: gcm_key
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* r1: gcm_table
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*/
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vpush {q4-q7}
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GET_DATA_POINTER(r2, .Lrconst64, r3)
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vld1.64 {rrconst_h}, [r2]
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#define GCM_LSH_1(r_out, ia, ib, const_d, oa, ob, ma) \
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/* H <<< 1 */ \
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vshr.s64 ma, ib, #63; \
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vshr.u64 oa, ib, #63; \
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vshr.u64 ob, ia, #63; \
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vand ma, const_d; \
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vshl.u64 ib, ib, #1; \
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vshl.u64 ia, ia, #1; \
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vorr ob, ib; \
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vorr oa, ia; \
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veor ob, ma; \
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vst1.64 {oa, ob}, [r_out]
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vld1.64 {rhash}, [r0]
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vrev64.8 rhash, rhash /* byte-swap */
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vext.8 rhash, rhash, rhash, #8
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vmov rbuf1, rhash
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GCM_LSH_1(r0, rhash_l, rhash_h, rrconst_h, rh1_l, rh1_h, rt1_l) /* H<<<1 */
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/* H² */
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PMUL_128x128(rr0, rr1, rbuf1, rh1, rt0, __)
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REDUCTION(rh2, rr0, rr1, rrconst_h, rt0, __)
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vmov rhash, rh2
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GCM_LSH_1(r1, rh2_l, rh2_h, rrconst_h, rbuf1_l, rbuf1_h, rt1_l) /* H²<<<1 */
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add r1, r1, #16
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/* H³ */
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PMUL_128x128(rr0, rr1, rhash, rh1, rt1, __)
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REDUCTION(rh3, rr0, rr1, rrconst_h, rt1, __)
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/* H⁴ */
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PMUL_128x128(rr0, rr1, rhash, rbuf1, rt0, __)
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REDUCTION(rh4, rr0, rr1, rrconst_h, rt0, __)
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GCM_LSH_1(r1, rh3_l, rh3_h, rrconst_h, rt0_l, rt0_h, rt1_l) /* H³<<<1 */
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add r1, r1, #16
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GCM_LSH_1(r1, rh4_l, rh4_h, rrconst_h, rt0_l, rt0_h, rt1_l) /* H⁴<<<1 */
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CLEAR_REG(rt0)
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CLEAR_REG(rt1)
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CLEAR_REG(rr1)
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CLEAR_REG(rr0)
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CLEAR_REG(rh1)
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CLEAR_REG(rh2)
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CLEAR_REG(rh3)
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CLEAR_REG(rh4)
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CLEAR_REG(rhash)
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CLEAR_REG(rbuf1)
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CLEAR_REG(rrconst)
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vpop {q4-q7}
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bx lr
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.size _gcry_ghash_setup_armv8_ce_pmull,.-_gcry_ghash_setup_armv8_ce_pmull;
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#endif
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