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STM32CubeF4
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Release v1.25.1

This commit is contained in:
Eya 2020-09-09 12:33:40 +01:00
Родитель 5d01400afd
Коммит 9f5ea7421d
18 изменённых файлов: 677 добавлений и 337 удалений
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8
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_fmpsmbus.h
Просмотреть файл

@ -133,7 +133,11 @@ typedef struct
* @brief FMPSMBUS handle Structure definition
* @{
*/
#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
typedef struct __FMPSMBUS_HandleTypeDef
#else
typedef struct
#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
{
FMPI2C_TypeDef *Instance; /*!< FMPSMBUS registers base address */
@ -327,6 +331,7 @@ typedef void (*pFMPSMBUS_AddrCallbackTypeDef)(FMPSMBUS_HandleTypeDef *hfmpsmbus
#define FMPSMBUS_NEXT_FRAME ((uint32_t)(FMPSMBUS_RELOAD_MODE | FMPSMBUS_SOFTEND_MODE))
#define FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC FMPSMBUS_AUTOEND_MODE
#define FMPSMBUS_LAST_FRAME_NO_PEC FMPSMBUS_AUTOEND_MODE
#define FMPSMBUS_FIRST_FRAME_WITH_PEC ((uint32_t)(FMPSMBUS_SOFTEND_MODE | FMPSMBUS_SENDPEC_MODE))
#define FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(FMPSMBUS_AUTOEND_MODE | FMPSMBUS_SENDPEC_MODE))
#define FMPSMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(FMPSMBUS_AUTOEND_MODE | FMPSMBUS_SENDPEC_MODE))
@ -583,11 +588,12 @@ typedef void (*pFMPSMBUS_AddrCallbackTypeDef)(FMPSMBUS_HandleTypeDef *hfmpsmbus
((REQUEST) == FMPSMBUS_NO_STARTSTOP))
#define IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) || \
#define IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) || \
((REQUEST) == FMPSMBUS_FIRST_FRAME) || \
((REQUEST) == FMPSMBUS_NEXT_FRAME) || \
((REQUEST) == FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
((REQUEST) == FMPSMBUS_LAST_FRAME_NO_PEC) || \
((REQUEST) == FMPSMBUS_FIRST_FRAME_WITH_PEC) || \
((REQUEST) == FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
((REQUEST) == FMPSMBUS_LAST_FRAME_WITH_PEC))

37
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h
Просмотреть файл

@ -143,9 +143,9 @@ typedef struct
/* Exported macro ------------------------------------------------------------*/
/** @defgroup HCD_Exported_Macros HCD Exported Macros
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
#define __HAL_HCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_HCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
@ -214,10 +214,16 @@ typedef void (*pHCD_HC_NotifyURBChangeCallbackTypeDef)(HCD_HandleTypeDef *hhcd,
* @}
*/
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID, pHCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
HAL_HCD_CallbackIDTypeDef CallbackID,
pHCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd,
HAL_HCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd, pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd);
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
/**
@ -235,6 +241,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, uint8_t ch_n
/* Non-Blocking mode: Interrupt */
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
void HAL_HCD_WKUP_IRQHandler(HCD_HandleTypeDef *hhcd);
void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
@ -256,6 +263,9 @@ HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
/**
* @}
*/
/**
* @}
*/
/* Peripheral State functions ************************************************/
/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
@ -267,6 +277,7 @@ HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chn
uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
/**
* @}
*/
@ -277,13 +288,11 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
/* Private macros ------------------------------------------------------------*/
/** @defgroup HCD_Private_Macros HCD Private Macros
* @{
*/
* @{
*/
/**
* @}
*/
/* Private functions prototypes ----------------------------------------------*/
/** @defgroup HCD_Private_Functions_Prototypes HCD Private Functions Prototypes
* @{
@ -298,14 +307,6 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
* @{
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/

4
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h
Просмотреть файл

@ -182,7 +182,11 @@ typedef enum
* @brief I2C handle Structure definition
* @{
*/
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
typedef struct __I2C_HandleTypeDef
#else
typedef struct
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
{
I2C_TypeDef *Instance; /*!< I2C registers base address */

82
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h
Просмотреть файл

@ -187,9 +187,9 @@ typedef struct
/* Exported macros -----------------------------------------------------------*/
/** @defgroup PCD_Exported_Macros PCD Exported Macros
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
@ -199,12 +199,11 @@ typedef struct
#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
~(USB_OTG_PCGCCTL_STOPCLK)
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= (USB_OTG_HS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)
@ -212,20 +211,20 @@ typedef struct
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \
EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE; \
} while(0U)
do { \
EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE; \
} while(0U)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \
EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
} while(0U)
do { \
EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
} while(0U)
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
@ -287,25 +286,41 @@ typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgType
* @}
*/
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
HAL_PCD_CallbackIDTypeDef CallbackID,
pPCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
HAL_PCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataOutStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataInStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoOutIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoInIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd,
pPCD_BcdCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd,
pPCD_LpmCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/**
@ -320,6 +335,7 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
@ -344,16 +360,24 @@ void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type);
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
/**
* @}
*/
@ -419,8 +443,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
/* Private macros ------------------------------------------------------------*/
/** @defgroup PCD_Private_Macros PCD Private Macros
* @{
*/
* @{
*/
/**
* @}

74
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmpi2c.h
Просмотреть файл

@ -68,38 +68,38 @@ extern "C" {
typedef struct
{
uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
This parameter can be a value of @ref FMPI2C_LL_EC_PERIPHERAL_MODE
This parameter can be a value of @ref FMPI2C_LL_EC_PERIPHERAL_MODE.
This feature can be modified afterwards using unitary function @ref LL_FMPI2C_SetMode(). */
uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
This parameter must be set by referring to the STM32CubeMX Tool and
the helper macro @ref __LL_FMPI2C_CONVERT_TIMINGS()
the helper macro @ref __LL_FMPI2C_CONVERT_TIMINGS().
This feature can be modified afterwards using unitary function @ref LL_FMPI2C_SetTiming(). */
uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
This parameter can be a value of @ref FMPI2C_LL_EC_ANALOGFILTER_SELECTION
This parameter can be a value of @ref FMPI2C_LL_EC_ANALOGFILTER_SELECTION.
This feature can be modified afterwards using unitary functions @ref LL_FMPI2C_EnableAnalogFilter() or LL_FMPI2C_DisableAnalogFilter(). */
uint32_t DigitalFilter; /*!< Configures the digital noise filter.
This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F.
This feature can be modified afterwards using unitary function @ref LL_FMPI2C_SetDigitalFilter(). */
uint32_t OwnAddress1; /*!< Specifies the device own address 1.
This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF.
This feature can be modified afterwards using unitary function @ref LL_FMPI2C_SetOwnAddress1(). */
uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
This parameter can be a value of @ref FMPI2C_LL_EC_I2C_ACKNOWLEDGE
This parameter can be a value of @ref FMPI2C_LL_EC_I2C_ACKNOWLEDGE.
This feature can be modified afterwards using unitary function @ref LL_FMPI2C_AcknowledgeNextData(). */
uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
This parameter can be a value of @ref FMPI2C_LL_EC_OWNADDRESS1
This parameter can be a value of @ref FMPI2C_LL_EC_OWNADDRESS1.
This feature can be modified afterwards using unitary function @ref LL_FMPI2C_SetOwnAddress1(). */
} LL_FMPI2C_InitTypeDef;
@ -579,7 +579,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsEnabledDMAReq_RX(FMPI2C_TypeDef *FMPI2Cx)
*/
__STATIC_INLINE uint32_t LL_FMPI2C_DMA_GetRegAddr(FMPI2C_TypeDef *FMPI2Cx, uint32_t Direction)
{
register uint32_t data_reg_addr;
uint32_t data_reg_addr;
if (Direction == LL_FMPI2C_DMA_REG_DATA_TRANSMIT)
{
@ -903,7 +903,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_GetDataSetupTime(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Configure peripheral mode.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll CR1 SMBHEN LL_FMPI2C_SetMode\n
* CR1 SMBDEN LL_FMPI2C_SetMode
@ -922,7 +922,7 @@ __STATIC_INLINE void LL_FMPI2C_SetMode(FMPI2C_TypeDef *FMPI2Cx, uint32_t Periphe
/**
* @brief Get peripheral mode.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll CR1 SMBHEN LL_FMPI2C_GetMode\n
* CR1 SMBDEN LL_FMPI2C_GetMode
@ -940,7 +940,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_GetMode(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Enable SMBus alert (Host or Device mode)
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is drived low and
@ -958,7 +958,7 @@ __STATIC_INLINE void LL_FMPI2C_EnableSMBusAlert(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Disable SMBus alert (Host or Device mode)
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
@ -976,7 +976,7 @@ __STATIC_INLINE void LL_FMPI2C_DisableSMBusAlert(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll CR1 ALERTEN LL_FMPI2C_IsEnabledSMBusAlert
* @param FMPI2Cx FMPI2C Instance.
@ -989,7 +989,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsEnabledSMBusAlert(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Enable SMBus Packet Error Calculation (PEC).
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll CR1 PECEN LL_FMPI2C_EnableSMBusPEC
* @param FMPI2Cx FMPI2C Instance.
@ -1002,7 +1002,7 @@ __STATIC_INLINE void LL_FMPI2C_EnableSMBusPEC(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Disable SMBus Packet Error Calculation (PEC).
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll CR1 PECEN LL_FMPI2C_DisableSMBusPEC
* @param FMPI2Cx FMPI2C Instance.
@ -1015,7 +1015,7 @@ __STATIC_INLINE void LL_FMPI2C_DisableSMBusPEC(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll CR1 PECEN LL_FMPI2C_IsEnabledSMBusPEC
* @param FMPI2Cx FMPI2C Instance.
@ -1028,7 +1028,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsEnabledSMBusPEC(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Configure the SMBus Clock Timeout.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
* @rmtoll TIMEOUTR TIMEOUTA LL_FMPI2C_ConfigSMBusTimeout\n
@ -1051,7 +1051,7 @@ __STATIC_INLINE void LL_FMPI2C_ConfigSMBusTimeout(FMPI2C_TypeDef *FMPI2Cx, uint3
/**
* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note These bits can only be programmed when TimeoutA is disabled.
* @rmtoll TIMEOUTR TIMEOUTA LL_FMPI2C_SetSMBusTimeoutA
@ -1066,7 +1066,7 @@ __STATIC_INLINE void LL_FMPI2C_SetSMBusTimeoutA(FMPI2C_TypeDef *FMPI2Cx, uint32_
/**
* @brief Get the SMBus Clock TimeoutA setting.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll TIMEOUTR TIMEOUTA LL_FMPI2C_GetSMBusTimeoutA
* @param FMPI2Cx FMPI2C Instance.
@ -1079,7 +1079,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_GetSMBusTimeoutA(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Set the SMBus Clock TimeoutA mode.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note This bit can only be programmed when TimeoutA is disabled.
* @rmtoll TIMEOUTR TIDLE LL_FMPI2C_SetSMBusTimeoutAMode
@ -1096,7 +1096,7 @@ __STATIC_INLINE void LL_FMPI2C_SetSMBusTimeoutAMode(FMPI2C_TypeDef *FMPI2Cx, uin
/**
* @brief Get the SMBus Clock TimeoutA mode.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll TIMEOUTR TIDLE LL_FMPI2C_GetSMBusTimeoutAMode
* @param FMPI2Cx FMPI2C Instance.
@ -1111,7 +1111,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_GetSMBusTimeoutAMode(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note These bits can only be programmed when TimeoutB is disabled.
* @rmtoll TIMEOUTR TIMEOUTB LL_FMPI2C_SetSMBusTimeoutB
@ -1126,7 +1126,7 @@ __STATIC_INLINE void LL_FMPI2C_SetSMBusTimeoutB(FMPI2C_TypeDef *FMPI2Cx, uint32_
/**
* @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll TIMEOUTR TIMEOUTB LL_FMPI2C_GetSMBusTimeoutB
* @param FMPI2Cx FMPI2C Instance.
@ -1139,7 +1139,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_GetSMBusTimeoutB(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Enable the SMBus Clock Timeout.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll TIMEOUTR TIMOUTEN LL_FMPI2C_EnableSMBusTimeout\n
* TIMEOUTR TEXTEN LL_FMPI2C_EnableSMBusTimeout
@ -1157,7 +1157,7 @@ __STATIC_INLINE void LL_FMPI2C_EnableSMBusTimeout(FMPI2C_TypeDef *FMPI2Cx, uint3
/**
* @brief Disable the SMBus Clock Timeout.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll TIMEOUTR TIMOUTEN LL_FMPI2C_DisableSMBusTimeout\n
* TIMEOUTR TEXTEN LL_FMPI2C_DisableSMBusTimeout
@ -1175,7 +1175,7 @@ __STATIC_INLINE void LL_FMPI2C_DisableSMBusTimeout(FMPI2C_TypeDef *FMPI2Cx, uint
/**
* @brief Check if the SMBus Clock Timeout is enabled or disabled.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll TIMEOUTR TIMOUTEN LL_FMPI2C_IsEnabledSMBusTimeout\n
* TIMEOUTR TEXTEN LL_FMPI2C_IsEnabledSMBusTimeout
@ -1405,7 +1405,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsEnabledIT_TC(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Enable Error interrupts.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note Any of these errors will generate interrupt :
* Arbitration Loss (ARLO)
@ -1425,7 +1425,7 @@ __STATIC_INLINE void LL_FMPI2C_EnableIT_ERR(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Disable Error interrupts.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note Any of these errors will generate interrupt :
* Arbitration Loss (ARLO)
@ -1607,7 +1607,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsActiveFlag_OVR(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Indicate the status of SMBus PEC error flag in reception.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note RESET: Clear default value.
* SET: When the received PEC does not match with the PEC register content.
@ -1622,7 +1622,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsActiveSMBusFlag_PECERR(FMPI2C_TypeDef *FMPI
/**
* @brief Indicate the status of SMBus Timeout detection flag.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note RESET: Clear default value.
* SET: When a timeout or extended clock timeout occurs.
@ -1637,7 +1637,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsActiveSMBusFlag_TIMEOUT(FMPI2C_TypeDef *FMP
/**
* @brief Indicate the status of SMBus alert flag.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note RESET: Clear default value.
* SET: When SMBus host configuration, SMBus alert enabled and
@ -1744,7 +1744,7 @@ __STATIC_INLINE void LL_FMPI2C_ClearFlag_OVR(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Clear SMBus PEC error flag.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll ICR PECCF LL_FMPI2C_ClearSMBusFlag_PECERR
* @param FMPI2Cx FMPI2C Instance.
@ -1757,7 +1757,7 @@ __STATIC_INLINE void LL_FMPI2C_ClearSMBusFlag_PECERR(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Clear SMBus Timeout detection flag.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll ICR TIMOUTCF LL_FMPI2C_ClearSMBusFlag_TIMEOUT
* @param FMPI2Cx FMPI2C Instance.
@ -1770,7 +1770,7 @@ __STATIC_INLINE void LL_FMPI2C_ClearSMBusFlag_TIMEOUT(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Clear SMBus Alert flag.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll ICR ALERTCF LL_FMPI2C_ClearSMBusFlag_ALERT
* @param FMPI2Cx FMPI2C Instance.
@ -2085,7 +2085,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_GetAddressMatchCode(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
* This bit has no effect when RELOAD bit is set.
@ -2101,7 +2101,7 @@ __STATIC_INLINE void LL_FMPI2C_EnableSMBusPECCompare(FMPI2C_TypeDef *FMPI2Cx)
/**
* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll CR2 PECBYTE LL_FMPI2C_IsEnabledSMBusPECCompare
* @param FMPI2Cx FMPI2C Instance.
@ -2114,7 +2114,7 @@ __STATIC_INLINE uint32_t LL_FMPI2C_IsEnabledSMBusPECCompare(FMPI2C_TypeDef *FMPI
/**
* @brief Get the SMBus Packet Error byte calculated.
* @note Macro @ref IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* @note Macro IS_FMPSMBUS_ALL_INSTANCE(FMPI2Cx) can be used to check whether or not
* SMBus feature is supported by the FMPI2Cx Instance.
* @rmtoll PECR PEC LL_FMPI2C_GetSMBusPEC
* @param FMPI2Cx FMPI2C Instance.

4
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h
Просмотреть файл

@ -837,8 +837,8 @@ __STATIC_INLINE uint32_t LL_I2C_GetClockPeriod(I2C_TypeDef *I2Cx)
__STATIC_INLINE void LL_I2C_ConfigSpeed(I2C_TypeDef *I2Cx, uint32_t PeriphClock, uint32_t ClockSpeed,
uint32_t DutyCycle)
{
register uint32_t freqrange = 0x0U;
register uint32_t clockconfig = 0x0U;
uint32_t freqrange = 0x0U;
uint32_t clockconfig = 0x0U;
/* Compute frequency range */
freqrange = __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock);

29
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
Просмотреть файл

@ -81,7 +81,7 @@ typedef enum
} USB_OTG_HCStateTypeDef;
/**
* @brief USB OTG Initialization Structure definition
* @brief USB Instance Initialization Structure definition
*/
typedef struct
{
@ -94,14 +94,14 @@ typedef struct
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
uint32_t speed; /*!< USB Core speed.
This parameter can be any value of @ref USB_Core_Speed_ */
This parameter can be any value of @ref USB_Core_Speed */
uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA used only for OTG HS. */
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
uint32_t phy_itface; /*!< Select the used PHY interface.
This parameter can be any value of @ref USB_Core_PHY_ */
This parameter can be any value of @ref USB_Core_PHY */
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
@ -116,6 +116,7 @@ typedef struct
uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
} USB_OTG_CfgTypeDef;
typedef struct
@ -197,13 +198,13 @@ typedef struct
uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
uint32_t ErrCnt; /*!< Host channel error count.*/
uint32_t ErrCnt; /*!< Host channel error count. */
USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
} USB_OTG_HCTypeDef;
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
@ -313,10 +314,10 @@ typedef struct
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
* @{
*/
#define DEP0CTL_MPS_64 0U
#define DEP0CTL_MPS_32 1U
#define DEP0CTL_MPS_16 2U
#define DEP0CTL_MPS_8 3U
#define EP_MPS_64 0U
#define EP_MPS_32 1U
#define EP_MPS_16 2U
#define EP_MPS_8 3U
/**
* @}
*/
@ -402,7 +403,7 @@ typedef struct
#define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)(USBx_BASE + USB_OTG_HOST_CHANNEL_BASE + ((i) * USB_OTG_HOST_CHANNEL_SIZE)))
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
#define EP_ADDR_MSK 0xFU
#define EP_ADDR_MSK 0xFU
/**
* @}
*/
@ -442,7 +443,9 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB
HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma);
HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma);
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len, uint8_t dma);
void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
@ -470,7 +473,9 @@ uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
uint8_t epnum, uint8_t dev_address, uint8_t speed,
uint8_t ep_type, uint16_t mps);
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx,
USB_OTG_HCTypeDef *hc, uint8_t dma);
uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);
HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num);

3
Drivers/STM32F4xx_HAL_Driver/License.md Normal file
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@ -0,0 +1,3 @@
# Copyright (c) 2016 STMicroelectronics
This software component is licensed by STMicroelectronics under the **BSD-3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).

52
Drivers/STM32F4xx_HAL_Driver/README.md Normal file
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@ -0,0 +1,52 @@
# STM32CubeF4 HAL Driver MCU Component
## Overview
**STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost.
**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series.
* The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product.
* The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio.
* The BSP Drivers of each evaluation or demonstration board provided by this STM32 series.
* A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library...
* A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series.
Two models of publication are proposed for the STM32Cube embedded software:
* The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repo (usual name **STM32Cubexx**, xx corresponding to the STM32 series).
* The **MCU component** : progressively from November 2019, each STM32Cube software module being part of the STM32Cube MCU Package, will be delivered as an individual repo, allowing the user to select and get only the required software functions.
## Description
This **stm32f4xx_hal_driver** MCU component repository is one element of the STM32CubeF4 MCU embedded software package, providing the **HAL-LL Drivers** part.
## License
Copyright (c) 2016 STMicroelectronics.
This software component is licensed by STMicroelectronics under BSD-3-Clause license. You may not use this file except in compliance with the License.
You may obtain a copy of the License [here](https://opensource.org/licenses/BSD-3-Clause).
## Release note
Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32f4xx_hal_driver/blob/master/Release_Notes.html).
## Compatibility information
In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package:
It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in this table.
HAL Driver F4 | CMSIS Device F4 | CMSIS Core | Was delivered in the full MCU package
------------- | --------------- | ---------- | -------------------------------------
Tag v1.7.6 | Tag v2.6.3 | Tag v5.4.0_cm4 | Tag v1.24.1 (and following, if any, till next tag)
Tag v1.7.7 | Tag v2.6.4 | Tag v5.4.0_cm4 | Tag v1.24.2 (and following, if any, till next tag)
Tag v1.7.8 | Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.0 (and following, if any, till next tag)
Tag v1.7.9 | Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.1 (and following, if any, till next tag)
The full **STM32CubeF4** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF4).
## Troubleshooting
If you have any issue with the **Software content** of this repository, you can file an issue into the firmware repository [STM32CubeF4](https://github.com/STMicroelectronics/STM32CubeF4/issues/new/choose).
For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).

100
Drivers/STM32F4xx_HAL_Driver/Release_Notes.html
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Различия файлов скрыты, потому что одна или несколько строк слишком длинны

4
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c
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@ -50,11 +50,11 @@
* @{
*/
/**
* @brief STM32F4xx HAL Driver version number V1.7.8
* @brief STM32F4xx HAL Driver version number V1.7.9
*/
#define __STM32F4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32F4xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */
#define __STM32F4xx_HAL_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */
#define __STM32F4xx_HAL_VERSION_SUB2 (0x09U) /*!< [15:8] sub2 version */
#define __STM32F4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24U)\
|(__STM32F4xx_HAL_VERSION_SUB1 << 16U)\

17
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c.c
Просмотреть файл

@ -5478,7 +5478,7 @@ static void FMPI2C_ITMasterCplt(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags)
{
uint32_t tmperror;
uint32_t tmpITFlags = ITFlags;
uint32_t tmp;
__IO uint32_t tmpreg;
/* Clear STOP Flag */
__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
@ -5519,9 +5519,8 @@ static void FMPI2C_ITMasterCplt(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags)
if ((hfmpi2c->State == HAL_FMPI2C_STATE_ABORT) && (FMPI2C_CHECK_FLAG(tmpITFlags, FMPI2C_FLAG_RXNE) != RESET))
{
/* Read data from RXDR */
tmp = (uint8_t)hfmpi2c->Instance->RXDR;
UNUSED(tmp);
tmpreg = (uint8_t)hfmpi2c->Instance->RXDR;
UNUSED(tmpreg);
}
/* Flush TX register */
@ -6190,8 +6189,14 @@ static void FMPI2C_DMAAbort(DMA_HandleTypeDef *hdma)
FMPI2C_HandleTypeDef *hfmpi2c = (FMPI2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
/* Reset AbortCpltCallback */
hfmpi2c->hdmatx->XferAbortCallback = NULL;
hfmpi2c->hdmarx->XferAbortCallback = NULL;
if (hfmpi2c->hdmatx != NULL)
{
hfmpi2c->hdmatx->XferAbortCallback = NULL;
}
if (hfmpi2c->hdmarx != NULL)
{
hfmpi2c->hdmarx->XferAbortCallback = NULL;
}
FMPI2C_TreatErrorCallback(hfmpi2c);
}

32
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus.c
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@ -204,18 +204,18 @@
/** @addtogroup FMPSMBUS_Private_Functions FMPSMBUS Private Functions
* @{
*/
static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
static void FMPSMBUS_Enable_IRQ(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
static void FMPSMBUS_Disable_IRQ(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
static HAL_StatusTypeDef FMPSMBUS_Master_ISR(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
static void FMPSMBUS_Enable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
static void FMPSMBUS_Disable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
static HAL_StatusTypeDef FMPSMBUS_Master_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
static void FMPSMBUS_ConvertOtherXferOptions(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
static void FMPSMBUS_ConvertOtherXferOptions(FMPSMBUS_HandleTypeDef *hfmpsmbus);
static void FMPSMBUS_ITErrorHandler(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
static void FMPSMBUS_ITErrorHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus);
static void FMPSMBUS_TransferConfig(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
static void FMPSMBUS_TransferConfig(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
/**
* @}
*/
@ -1802,7 +1802,7 @@ uint32_t HAL_FMPSMBUS_GetError(FMPSMBUS_HandleTypeDef *hfmpsmbus)
* @param StatusFlags Value of Interrupt Flags.
* @retval HAL status
*/
static HAL_StatusTypeDef FMPSMBUS_Master_ISR(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
static HAL_StatusTypeDef FMPSMBUS_Master_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
{
uint16_t DevAddress;
@ -2086,7 +2086,7 @@ static HAL_StatusTypeDef FMPSMBUS_Master_ISR(struct __FMPSMBUS_HandleTypeDef *hf
* @param StatusFlags Value of Interrupt Flags.
* @retval HAL status
*/
static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
{
uint8_t TransferDirection;
uint16_t SlaveAddrCode;
@ -2342,7 +2342,7 @@ static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(struct __FMPSMBUS_HandleTypeDef *hfm
* @param InterruptRequest Value of @ref FMPSMBUS_Interrupt_configuration_definition.
* @retval HAL status
*/
static void FMPSMBUS_Enable_IRQ(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
static void FMPSMBUS_Enable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
{
uint32_t tmpisr = 0UL;
@ -2382,7 +2382,7 @@ static void FMPSMBUS_Enable_IRQ(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint
* @param InterruptRequest Value of @ref FMPSMBUS_Interrupt_configuration_definition.
* @retval HAL status
*/
static void FMPSMBUS_Disable_IRQ(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
static void FMPSMBUS_Disable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
{
uint32_t tmpisr = 0UL;
uint32_t tmpstate = hfmpsmbus->State;
@ -2454,7 +2454,7 @@ static void FMPSMBUS_Disable_IRQ(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uin
* @param hfmpsmbus FMPSMBUS handle.
* @retval None
*/
static void FMPSMBUS_ITErrorHandler(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus)
static void FMPSMBUS_ITErrorHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
{
uint32_t itflags = READ_REG(hfmpsmbus->Instance->ISR);
uint32_t itsources = READ_REG(hfmpsmbus->Instance->CR1);
@ -2555,7 +2555,7 @@ static void FMPSMBUS_ITErrorHandler(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus)
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
{
uint32_t tickstart = HAL_GetTick();
@ -2604,7 +2604,7 @@ static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(struct __FMPSMBUS_Handl
* @arg @ref FMPSMBUS_GENERATE_START_WRITE Generate Restart for write request.
* @retval None
*/
static void FMPSMBUS_TransferConfig(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
static void FMPSMBUS_TransferConfig(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
{
/* Check the parameters */
assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
@ -2621,7 +2621,7 @@ static void FMPSMBUS_TransferConfig(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus,
* @param hfmpsmbus FMPSMBUS handle.
* @retval None
*/
static void FMPSMBUS_ConvertOtherXferOptions(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus)
static void FMPSMBUS_ConvertOtherXferOptions(FMPSMBUS_HandleTypeDef *hfmpsmbus)
{
/* if user set XferOptions to FMPSMBUS_OTHER_FRAME_NO_PEC */
/* it request implicitly to generate a restart condition */

35
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c
Просмотреть файл

@ -91,8 +91,8 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd);
*/
/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
@ -599,6 +599,18 @@ void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd)
}
}
/**
* @brief Handles HCD Wakeup interrupt request.
* @param hhcd HCD handle
* @retval HAL status
*/
void HAL_HCD_WKUP_IRQHandler(HCD_HandleTypeDef *hhcd)
{
UNUSED(hhcd);
}
/**
* @brief SOF callback.
* @param hhcd HCD handle
@ -718,7 +730,9 @@ __weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID, pHCD_CallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
HAL_HCD_CallbackIDTypeDef CallbackID,
pHCD_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -806,7 +820,7 @@ HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_Call
/**
* @brief Unregister an USB HCD Callback
* USB HCD callabck is redirected to the weak predefined callback
* USB HCD callback is redirected to the weak predefined callback
* @param hhcd USB HCD handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@ -910,7 +924,8 @@ HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_Ca
* @param pCallback pointer to the USB HCD Host Channel Notify URB Change Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd, pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -945,7 +960,7 @@ HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *
}
/**
* @brief UnRegister the USB HCD Host Channel Notify URB Change Callback
* @brief Unregister the USB HCD Host Channel Notify URB Change Callback
* USB HCD Host Channel Notify URB Change Callback is redirected to the weak HAL_HCD_HC_NotifyURBChange_Callback() predefined callback
* @param hhcd HCD handle
* @retval HAL status
@ -982,8 +997,8 @@ HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef
*/
/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions
* @brief Management functions
*
* @brief Management functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
@ -1041,8 +1056,8 @@ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
*/
/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions
* @brief Peripheral State functions
*
* @brief Peripheral State functions
*
@verbatim
===============================================================================
##### Peripheral State functions #####

255
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c
Просмотреть файл

@ -319,6 +319,7 @@
*/
#define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
#define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
#define I2C_TIMEOUT_STOP_FLAG 5U /*!< Timeout 5 ms */
#define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
/* Private define for @ref PreviousState usage */
@ -359,6 +360,7 @@ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
/* Private functions for I2C transfer IRQ handler */
@ -3040,6 +3042,27 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
/* Send Slave Address and Memory Address */
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
{
/* Abort the ongoing DMA */
dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
/* Prevent unused argument(s) compilation and MISRA warning */
UNUSED(dmaxferstatus);
/* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
if (hi2c->hdmatx != NULL)
{
hi2c->hdmatx->XferCpltCallback = NULL;
}
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
hi2c->XferSize = 0U;
hi2c->XferCount = 0U;
/* Disable I2C peripheral to prevent dummy data in buffer */
__HAL_I2C_DISABLE(hi2c);
return HAL_ERROR;
}
@ -3185,6 +3208,27 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
/* Send Slave Address and Memory Address */
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
{
/* Abort the ongoing DMA */
dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
/* Prevent unused argument(s) compilation and MISRA warning */
UNUSED(dmaxferstatus);
/* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
if (hi2c->hdmarx != NULL)
{
hi2c->hdmarx->XferCpltCallback = NULL;
}
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
hi2c->XferSize = 0U;
hi2c->XferCount = 0U;
/* Disable I2C peripheral to prevent dummy data in buffer */
__HAL_I2C_DISABLE(hi2c);
return HAL_ERROR;
}
@ -3309,7 +3353,7 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
{
if (hi2c->Instance->CR1 & I2C_CR1_START)
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
@ -3415,7 +3459,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -3514,7 +3558,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -3680,7 +3724,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -3805,7 +3849,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -4507,11 +4551,14 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
*/
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
{
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
/* Prevent unused argument(s) compilation warning */
UNUSED(DevAddress);
/* Abort Master transfer during Receive or Transmit process */
if (hi2c->Mode == HAL_I2C_MODE_MASTER)
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && (CurrentMode == HAL_I2C_MODE_MASTER))
{
/* Process Locked */
__HAL_LOCK(hi2c);
@ -4542,6 +4589,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevA
{
/* Wrong usage of abort function */
/* This function should be used only in case of abort monitored by master device */
/* Or periphal is not in busy state, mean there is no active sequence to be abort */
return HAL_ERROR;
}
}
@ -4613,7 +4661,14 @@ void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
/* BTF set -------------------------------------------------------------*/
else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
{
I2C_MasterTransmit_BTF(hi2c);
if (CurrentMode == HAL_I2C_MODE_MASTER)
{
I2C_MasterTransmit_BTF(hi2c);
}
else /* HAL_I2C_MODE_MEM */
{
I2C_MemoryTransmit_TXE_BTF(hi2c);
}
}
else
{
@ -5166,33 +5221,16 @@ static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
if (hi2c->Mode == HAL_I2C_MODE_MEM)
{
hi2c->Mode = HAL_I2C_MODE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MemTxCpltCallback(hi2c);
#else
HAL_I2C_MemTxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->Mode = HAL_I2C_MODE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterTxCpltCallback(hi2c);
hi2c->MasterTxCpltCallback(hi2c);
#else
HAL_I2C_MasterTxCpltCallback(hi2c);
HAL_I2C_MasterTxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
}
}
else if (hi2c->Mode == HAL_I2C_MODE_MEM)
{
I2C_MemoryTransmit_TXE_BTF(hi2c);
}
else
{
/* Do nothing */
@ -5207,6 +5245,9 @@ static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
*/
static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c)
{
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
if (hi2c->EventCount == 0U)
{
/* If Memory address size is 8Bit */
@ -5235,12 +5276,12 @@ static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c)
}
else if (hi2c->EventCount == 2U)
{
if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
if (CurrentState == HAL_I2C_STATE_BUSY_RX)
{
/* Generate Restart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
{
/* Write data to DR */
hi2c->Instance->DR = *hi2c->pBuffPtr;
@ -5251,6 +5292,24 @@ static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c)
/* Update counter */
hi2c->XferCount--;
}
else if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
{
/* Generate Stop condition then Call TxCpltCallback() */
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MemTxCpltCallback(hi2c);
#else
HAL_I2C_MemTxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
else
{
/* Do nothing */
@ -5296,43 +5355,70 @@ static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
}
else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U)))
{
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
hi2c->State = HAL_I2C_STATE_READY;
if (hi2c->Mode == HAL_I2C_MODE_MEM)
if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK)
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_NONE;
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
hi2c->State = HAL_I2C_STATE_READY;
if (hi2c->Mode == HAL_I2C_MODE_MEM)
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MemRxCpltCallback(hi2c);
hi2c->MemRxCpltCallback(hi2c);
#else
HAL_I2C_MemRxCpltCallback(hi2c);
HAL_I2C_MemRxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterRxCpltCallback(hi2c);
#else
HAL_I2C_MasterRxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
/* Call user error callback */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterRxCpltCallback(hi2c);
hi2c->ErrorCallback(hi2c);
#else
HAL_I2C_MasterRxCpltCallback(hi2c);
HAL_I2C_ErrorCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
@ -6117,9 +6203,10 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c)
{
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
uint32_t CurrentError;
if ((hi2c->Mode == HAL_I2C_MODE_MASTER) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
if (((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
{
/* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
hi2c->Instance->CR1 &= ~I2C_CR1_POS;
@ -6138,9 +6225,9 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c)
if ((READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) && (CurrentState != HAL_I2C_STATE_ABORT))
{
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
}
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->Mode = HAL_I2C_MODE_NONE;
}
/* Abort DMA transfer */
@ -6302,7 +6389,7 @@ static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
if (hi2c->Instance->CR1 & I2C_CR1_START)
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
@ -6375,7 +6462,7 @@ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
if (hi2c->Instance->CR1 & I2C_CR1_START)
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
@ -6416,7 +6503,7 @@ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
if (hi2c->Instance->CR1 & I2C_CR1_START)
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
@ -6456,7 +6543,7 @@ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
if (hi2c->Instance->CR1 & I2C_CR1_START)
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
@ -6539,7 +6626,7 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
if (hi2c->Instance->CR1 & I2C_CR1_START)
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
@ -6613,7 +6700,7 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
if (hi2c->Instance->CR1 & I2C_CR1_START)
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
@ -6818,11 +6905,26 @@ static void I2C_DMAError(DMA_HandleTypeDef *hdma)
*/
static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
{
__IO uint32_t count = 0U;
I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
/* During abort treatment, check that there is no pending STOP request */
/* Wait until STOP flag is reset */
count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
do
{
if (count == 0U)
{
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
break;
}
count--;
}
while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
/* Clear Complete callback */
if (hi2c->hdmatx != NULL)
{
@ -7092,6 +7194,33 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
return HAL_OK;
}
/**
* @brief This function handles I2C Communication Timeout for specific usage of STOP request through Interrupt.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c)
{
__IO uint32_t count = 0U;
/* Wait until STOP flag is reset */
count = I2C_TIMEOUT_STOP_FLAG * (SystemCoreClock / 25U / 1000U);
do
{
count--;
if (count == 0U)
{
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
return HAL_ERROR;
}
}
while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
return HAL_OK;
}
/**
* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains

131
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c
Просмотреть файл

@ -102,8 +102,8 @@ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint
*/
/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
@ -230,7 +230,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
(void)HAL_PCDEx_ActivateLPM(hpcd);
}
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
(void)USB_DevDisconnect(hpcd->Instance);
return HAL_OK;
@ -252,7 +252,10 @@ HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
hpcd->State = HAL_PCD_STATE_BUSY;
/* Stop Device */
(void)HAL_PCD_Stop(hpcd);
if (USB_StopDevice(hpcd->Instance) != HAL_OK)
{
return HAL_ERROR;
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
if (hpcd->MspDeInitCallback == NULL)
@ -321,7 +324,9 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
HAL_PCD_CallbackIDTypeDef CallbackID,
pPCD_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -531,7 +536,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_Ca
* @param pCallback pointer to the USB PCD Data OUT Stage Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataOutStageCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -566,7 +572,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
}
/**
* @brief UnRegister the USB PCD Data OUT Stage Callback
* @brief Unregister the USB PCD Data OUT Stage Callback
* USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataOutStageCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -604,7 +610,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd
* @param pCallback pointer to the USB PCD Data IN Stage Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataInStageCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -639,7 +646,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, p
}
/**
* @brief UnRegister the USB PCD Data IN Stage Callback
* @brief Unregister the USB PCD Data IN Stage Callback
* USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataInStageCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -677,7 +684,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd)
* @param pCallback pointer to the USB PCD Iso OUT incomplete Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoOutIncpltCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -712,7 +720,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
}
/**
* @brief UnRegister the USB PCD Iso OUT incomplete Callback
* @brief Unregister the USB PCD Iso OUT incomplete Callback
* USB PCD Iso OUT incomplete Callback is redirected to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -750,7 +758,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd
* @param pCallback pointer to the USB PCD Iso IN incomplete Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoInIncpltCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -785,7 +794,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, p
}
/**
* @brief UnRegister the USB PCD Iso IN incomplete Callback
* @brief Unregister the USB PCD Iso IN incomplete Callback
* USB PCD Iso IN incomplete Callback is redirected to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -858,7 +867,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdC
}
/**
* @brief UnRegister the USB PCD BCD Callback
* @brief Unregister the USB PCD BCD Callback
* USB BCD Callback is redirected to the weak HAL_PCDEx_BCD_Callback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -931,7 +940,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmC
}
/**
* @brief UnRegister the USB PCD LPM Callback
* @brief Unregister the USB PCD LPM Callback
* USB LPM Callback is redirected to the weak HAL_PCDEx_LPM_Callback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -968,8 +977,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd)
*/
/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions
* @brief Data transfers functions
*
* @brief Data transfers functions
*
@verbatim
===============================================================================
##### IO operation functions #####
@ -989,22 +998,21 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd)
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
__HAL_LOCK(hpcd);
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
if ((hpcd->Init.battery_charging_enable == 1U) &&
(hpcd->Init.phy_itface != USB_OTG_ULPI_PHY))
{
/* Enable USB Transceiver */
USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
}
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
(void)USB_DevConnect(hpcd->Instance);
__HAL_PCD_ENABLE(hpcd);
(void)USB_DevConnect(hpcd->Instance);
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
@ -1015,20 +1023,25 @@ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
*/
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
__HAL_LOCK(hpcd);
__HAL_PCD_DISABLE(hpcd);
if (USB_StopDevice(hpcd->Instance) != HAL_OK)
{
__HAL_UNLOCK(hpcd);
return HAL_ERROR;
}
(void)USB_DevDisconnect(hpcd->Instance);
(void)USB_FlushTxFifo(hpcd->Instance, 0x10U);
if ((hpcd->Init.battery_charging_enable == 1U) &&
(hpcd->Init.phy_itface != USB_OTG_ULPI_PHY))
{
/* Disable USB Transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
}
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
/**
* @brief Handles PCD interrupt request.
@ -1058,7 +1071,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS);
}
/* Handle RxQLevel Interrupt */
/* Handle RxQLevel Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
{
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
@ -1243,7 +1256,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP);
}
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
/* Handle LPM Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT))
{
@ -1269,7 +1282,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
}
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
/* Handle Reset Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST))
{
@ -1413,6 +1426,30 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
}
}
}
/**
* @brief Handles PCD Wakeup interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx;
USBx = hpcd->Instance;
if ((USBx->CID & (0x1U << 8)) == 0U)
{
/* Clear EXTI pending Bit */
__HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG();
}
else
{
/* Clear EXTI pending Bit */
__HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG();
}
}
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
@ -1593,8 +1630,8 @@ __weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
*/
/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions
* @brief management functions
*
* @brief management functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
@ -1629,6 +1666,7 @@ HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
(void)USB_DevConnect(hpcd->Instance);
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
@ -1639,9 +1677,24 @@ HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
*/
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
{
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
__HAL_LOCK(hpcd);
(void)USB_DevDisconnect(hpcd->Instance);
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
if ((hpcd->Init.battery_charging_enable == 1U) &&
(hpcd->Init.phy_itface != USB_OTG_ULPI_PHY))
{
/* Disable USB Transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
}
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
@ -1657,6 +1710,7 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
hpcd->USB_Address = address;
(void)USB_SetDevAddress(hpcd->Instance, address);
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
/**
@ -1667,7 +1721,8 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
HAL_StatusTypeDef ret = HAL_OK;
PCD_EPTypeDef *ep;
@ -1852,10 +1907,12 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
__HAL_LOCK(hpcd);
(void)USB_EPSetStall(hpcd->Instance, ep);
if ((ep_addr & EP_ADDR_MSK) == 0U)
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup);
}
__HAL_UNLOCK(hpcd);
return HAL_OK;
@ -1946,8 +2003,8 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
*/
/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions
* @brief Peripheral State functions
*
* @brief Peripheral State functions
*
@verbatim
===============================================================================
##### Peripheral State functions #####

4
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c
Просмотреть файл

@ -49,7 +49,7 @@
/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
* @brief PCDEx control functions
*
*
@verbatim
===============================================================================
##### Extended features functions #####
@ -260,7 +260,7 @@ HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd)
USBx->GCCFG &= ~(USB_OTG_GCCFG_PDEN);
USBx->GCCFG &= ~(USB_OTG_GCCFG_SDEN);
/* Power Down USB tranceiver */
/* Power Down USB transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
/* Enable Battery charging */

143
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c
Просмотреть файл

@ -61,8 +61,8 @@ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
*/
/** @defgroup USB_LL_Exported_Functions_Group1 Initialization/de-initialization functions
* @brief Initialization and Configuration functions
*
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization/de-initialization functions #####
@ -104,7 +104,7 @@ HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
/* Select FS Embedded PHY */
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
/* Reset after a PHY select and set Host mode */
/* Reset after a PHY select */
ret = USB_CoreReset(USBx);
if (cfg.battery_charging_enable == 0U)
@ -229,7 +229,7 @@ HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
@ -237,13 +237,12 @@ HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
}
/**
* @brief USB_SetCurrentMode : Set functional mode
* @brief USB_SetCurrentMode Set functional mode
* @param USBx Selected device
* @param mode current core mode
* @param mode current core mode
* This parameter can be one of these values:
* @arg USB_DEVICE_MODE: Peripheral mode
* @arg USB_HOST_MODE: Host mode
* @arg USB_DRD_MODE: Dual Role Device mode
* @arg USB_DEVICE_MODE Peripheral mode
* @arg USB_HOST_MODE Host mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode)
@ -268,7 +267,7 @@ HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTy
}
/**
* @brief USB_DevInit : Initializes the USB_OTG controller registers
* @brief USB_DevInit Initializes the USB_OTG controller registers
* for device mode
* @param USBx Selected device
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
@ -463,8 +462,7 @@ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
return HAL_OK;
}
@ -486,8 +484,7 @@ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
return HAL_OK;
}
@ -956,7 +953,8 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDe
* 1 : DMA feature used
* @retval HAL status
*/
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma)
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len, uint8_t dma)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t *pSrc = (uint32_t *)src;
@ -1116,7 +1114,7 @@ HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t addres
}
/**
* @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
* @brief USB_DevConnect : Connect the USB device by enabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
@ -1124,14 +1122,16 @@ HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
/* In case phy is stopped, ensure to ungate and restore the phy CLK */
USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS;
HAL_Delay(3U);
return HAL_OK;
}
/**
* @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
* @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
@ -1139,8 +1139,10 @@ HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
/* In case phy is stopped, ensure to ungate and restore the phy CLK */
USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
HAL_Delay(3U);
return HAL_OK;
}
@ -1233,7 +1235,7 @@ uint32_t USB_ReadDevInEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
/**
* @brief USB_ClearInterrupts: clear a USB interrupt
* @param USBx Selected device
* @param interrupt interrupt flag
* @param interrupt flag
* @retval None
*/
void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
@ -1325,8 +1327,7 @@ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
/* Core Soft Reset */
count = 0U;
@ -1338,8 +1339,7 @@ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
return HAL_OK;
}
@ -1481,7 +1481,7 @@ HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
}
/**
* @brief USB_OTG_ResetPort : Reset Host Port
* @brief USB_OTG_ResetPort : Reset Host Port
* @param USBx Selected device
* @retval HAL status
* @note (1)The application must wait at least 10 ms
@ -1510,10 +1510,10 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
* @brief USB_DriveVbus : activate or de-activate vbus
* @param state VBUS state
* This parameter can be one of these values:
* 0 : VBUS Active
* 1 : VBUS Inactive
* 0 : Deactivate VBUS
* 1 : Activate VBUS
* @retval HAL status
*/
*/
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@ -1557,7 +1557,7 @@ uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx)
* @brief Return Host Current Frame number
* @param USBx Selected device
* @retval current frame number
*/
*/
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@ -1589,13 +1589,9 @@ uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx)
* This parameter can be a value from 0 to32K
* @retval HAL state
*/
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
uint8_t ch_num,
uint8_t epnum,
uint8_t dev_address,
uint8_t speed,
uint8_t ep_type,
uint16_t mps)
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
uint8_t epnum, uint8_t dev_address, uint8_t speed,
uint8_t ep_type, uint16_t mps)
{
HAL_StatusTypeDef ret = HAL_OK;
uint32_t USBx_BASE = (uint32_t)USBx;
@ -1789,45 +1785,47 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(ch_num)->HCCHAR = tmpreg;
if (dma == 0U) /* Slave mode */
if (dma != 0U) /* dma mode */
{
if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
return HAL_OK;
}
if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
{
switch (hc->ep_type)
{
switch (hc->ep_type)
{
/* Non periodic transfer */
case EP_TYPE_CTRL:
case EP_TYPE_BULK:
/* Non periodic transfer */
case EP_TYPE_CTRL:
case EP_TYPE_BULK:
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
/* check if there is enough space in FIFO space */
if (len_words > (USBx->HNPTXSTS & 0xFFFFU))
{
/* need to process data in nptxfempty interrupt */
USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
}
break;
/* check if there is enough space in FIFO space */
if (len_words > (USBx->HNPTXSTS & 0xFFFFU))
{
/* need to process data in nptxfempty interrupt */
USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
}
break;
/* Periodic transfer */
case EP_TYPE_INTR:
case EP_TYPE_ISOC:
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
/* check if there is enough space in FIFO space */
if (len_words > (USBx_HOST->HPTXSTS & 0xFFFFU)) /* split the transfer */
{
/* need to process data in ptxfempty interrupt */
USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
}
break;
/* Periodic transfer */
case EP_TYPE_INTR:
case EP_TYPE_ISOC:
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
/* check if there is enough space in FIFO space */
if (len_words > (USBx_HOST->HPTXSTS & 0xFFFFU)) /* split the transfer */
{
/* need to process data in ptxfempty interrupt */
USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
}
break;
default:
break;
}
/* Write packet into the Tx FIFO. */
(void)USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, (uint16_t)hc->xfer_len, 0);
default:
break;
}
/* Write packet into the Tx FIFO. */
(void)USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, (uint16_t)hc->xfer_len, 0);
}
return HAL_OK;
@ -1875,8 +1873,7 @@ HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
{
break;
}
}
while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
} while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
}
else
{
@ -1898,8 +1895,7 @@ HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
{
break;
}
}
while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
} while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
}
else
{
@ -1979,8 +1975,7 @@ HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
{
break;
}
}
while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
} while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
}
/* Clear any pending Host interrupts */