Граф коммитов

309 Коммитов

Автор SHA1 Сообщение Дата
Tex Riddell 79bc013b4d Add dot2add and dot4add_*8packed intrinsics 2018-10-22 20:21:55 -07:00
Steven Perron fe2d48b984 Add the HLSL-spirv cookbook. (#1618)
Add a document to give examples of what HLSL code patterns will generate
valid Vulkan SPIR-V.
2018-10-22 14:22:44 -04:00
Lei Zhang 2ecc36b382
[spirv] Add doc about supported extensions 2018-10-01 14:47:11 -04:00
Tex Riddell 89697bbad5 Merge branch 'master' into dxr-master
# Conflicts:
#	include/dxc/HLSL/DxilUtil.h
#	lib/DxcSupport/HLSLOptions.cpp
#	lib/HLSL/DxilUtil.cpp
#	tools/clang/lib/CodeGen/CGHLSLMS.cpp
#	tools/clang/unittests/HLSL/DxilContainerTest.cpp
2018-09-12 22:28:35 -07:00
Lei Zhang d0fcff32fd
[spirv] Fix doc about half translation (#1539) 2018-09-11 14:49:20 -04:00
Lei Zhang 81b3451b4a
[spirv] Add mechanism for fine-grained control of debug info (#1518)
Added a new command-line option: -fspv-debug=<category>, where
category can be file, source, line, and tool, to give developers
fine-grained control of what debug information they want in
the generated SPIR-V code.
2018-08-29 11:11:30 -04:00
Lei Zhang 4d6e2cfc64
[spirv] Fix array index out of bound in doc (#1516) 2018-08-27 19:40:11 -04:00
Lei Zhang 2b47a4363e
[linux-port] Update on HLSL/DXIL test suite (#1495) 2018-08-09 16:27:16 -04:00
Lei Zhang 05cda8da2a
[spirv] Add support for -fvk-bind-register (#1480)
format: -fvk-bind-register <type-number> <space> <binding> <set>

Also created a short alias for it: -vkbr.

This option gives the ultimate manual control of descriptor
assignment. It requires:

* All resources are annotated with :register() in the source code
* -fvk-bind-register is specified for every resource

It overrules all other mechanisms.
It cannot be used together with -fvk-{u|b|s|t}-shift.
2018-08-03 07:36:18 -04:00
Lei Zhang 474954a6ea
[spirv] Update mapping manual w.r.t. debugging and options (#1475) 2018-08-01 10:49:51 -04:00
Ehsan 90103b38c2
[spirv] Expose -Oconfig for running custom optimizer recipes (#1466) 2018-07-31 13:49:19 -04:00
Tex Riddell 2f5afecf67 Merge remote-tracking branch 'ms/master' into user/texr/integrate-master 2018-07-30 15:36:07 -07:00
Ehsan f9882c84a7
[spirv] Support for post_depth_coverage extension. (#1461) 2018-07-27 17:16:41 -04:00
Tex Riddell 2330c74b1a Merge remote-tracking branch 'ms/master' into user/texr/integrate-master
# Conflicts:
#	tools/clang/tools/dxcompiler/dxcompilerobj.cpp
#	tools/clang/unittests/HLSL/ValidationTest.cpp
#	tools/clang/unittests/HLSL/VerifierTest.cpp
2018-07-26 17:17:36 -07:00
Tex Riddell ec4219002e Merge branch 'rtmaster' into user/texr/integrate-master 2018-07-26 16:07:02 -07:00
Tex Riddell fec1adb90e Merged PR 110: Validate raytracing shader properties and RDAT blob part
Validate raytracing shader properties and RDAT blob part

- no signatures for ray tracing shader functions
- payload/params/attribute sizes are >= argument type allocation sizes
- RDAT is bit-identical to RDAT generated
- Minor fix for CS: should not have input signature elements either.
- update val version comment
- Prevent strange behavior with library target and entry point not empty.
- remove DXASSERT in LoadDxilMetadata (validation should catch this case)
2018-07-26 22:44:51 +00:00
Tex Riddell 7fe628800d Merged PR 108: Validate function params for libraries.
Validate function params for libraries.
2018-07-25 19:02:59 +00:00
Lei Zhang f40667e931
[spirv] Rename -fvk-invert-w to -fvk-use-dx-position-w (#1448) 2018-07-24 20:46:14 -04:00
Lei Zhang dbc67dc4f4
[spirv] -fvk-invert-w in non-PS stages is no-op (#1441)
Allow using -fvk-invert-w in non-PS stages and make it a no-op.
2018-07-21 06:57:55 -04:00
Xiang_Li (XBox) 94157e54ab Merged PR 105: update handle validation.
update handle validation.
2018-07-21 01:54:30 +00:00
Lei Zhang ef6c9eff15
[spirv] Add -fvk-invert-w (#1429)
This option reciprocates (multiplicatively inverts) SV_Position.w
after reading it from stage input in PS. This is used to accommodate
the difference between Vulkan and DirectX.
2018-07-19 10:34:51 -04:00
Tex Riddell 95c382de3f Merge branch 'master' into user/texr/integrate-master
# Conflicts:
#	lib/HLSL/DxilContainerReflection.cpp
#	tools/clang/tools/CMakeLists.txt
#	tools/clang/unittests/CMakeLists.txt
2018-07-13 15:01:10 -07:00
Ehsan 18545516b0
[spirv] Handle CalculateLevelOfDetailUnclamped. (#1400) 2018-07-04 15:55:21 -04:00
Lei Zhang ed29623d9a
[spirv] Handle nested structs for [[vk::offset]] (#1399)
Also update the SPIR-V doc about [[vk::offset]
2018-07-04 10:58:35 -04:00
Lei Zhang 3987db0fa8
[spirv] Do not build tests by default and hook up with ctest (#1394)
This way we can just run ctest to invoke the tests, instead of
remembering the binary and its parameters.
2018-06-29 12:46:07 -04:00
Ehsan 579b9c656f
[linux-port] Add documentation file for Linux/macOS port. (#1389) 2018-06-28 16:34:07 -04:00
Xiang_Li (XBox) 4ade2fccc0 Merged PR 92: Enable ValidateResourceDxilOp for lib profile.
Enable ValidateResourceDxilOp for lib profile.
2018-06-20 18:53:19 +00:00
Tex Riddell d37f956c70 Merged PR 86: Finalize OpCode changes for Dxil 1.3 / SM 6.3
Finalize OpCode changes for Dxil 1.3 / SM 6.3

- Rename CreateHandleFromResourceStructForLib to CreateHandleForLib
- Add PrimitiveIndex
- Add final NumOp[Codes|Classes]_Dxil_1_3 values
- Fix legal shader stage set for PrimitiveID
2018-06-09 00:22:19 +00:00
Tex Riddell a26681c807 Merge branch 'master' into rtmaster
# Conflicts:
#	lib/HLSL/DxilGenerationPass.cpp
#	lib/HLSL/DxilValidation.cpp
#	tools/clang/tools/dxcompiler/dxclinker.cpp
2018-05-22 20:52:03 -07:00
Lei Zhang 8c6d72a2a7
[spirv] Add option to ignore warnings on features without Vulkan support (#1289)
Added -Wno-vk-ignored-features to suppress warnings on features
that are ignored because of no Vulkan support. Examples include
cbuffer member initializer.
2018-05-16 14:32:30 -04:00
Lei Zhang babfc756c3
[spirv] Convert to use 2 as the depth value for OpTypeImage (#1261)
2 means no indication as to whether this is a depth or non-depth
image.

Reverted "Hack OpSampledImage for depth-comparison sampling".

This reverts commit 0f165c6483.
2018-05-11 10:57:26 -04:00
Lei Zhang 4dd7aee306
[spirv] Add doc about synchronization intrinsics (#1263) 2018-05-08 13:18:28 -04:00
Lei Zhang a1a33a4199
[spirv] Convert to use stand-alone variables for gl_PerVertex (#1259)
It's actually a spec reading issue that it seems we cannot
have stand-alone variables for Position, PointSize, ClipDistance,
or CullDistance in HS/DS/GS.

Removed all code regarding Position and PointSize from GlPerVertex.
We still need to keep GlPerVertex aroudn to handle ClipDistance
and CullDistance though.
2018-05-07 10:21:20 -04:00
Lei Zhang 2095fef62c
[spirv] Add support for arrays of structured/byte buffers (#1257)
They are translated into, of course, (runtime) arrays of
structured/byte buffers.
2018-05-03 13:36:09 -04:00
Lei Zhang 9b856626d6
[spirv] Add support for dual-source blending (#1251)
In HLSL, dual-source color blending is enabled only via API;
the shader needs no special marks: it only writes SV_Target0
& SV_Target1 like normal.

But in Vulkan, to enable dual-source blending, the shader need
to mark the two participating output variables with Index = 0
and Index = 1, respectively.

So we introduce a new attribute, vk::index(), to let developers
to specify the index of an output variable so dual-source
blending can be enabled.

See Vulkan spec "26.1.2. Dual-Source Blending".
2018-04-26 16:02:12 -04:00
Lei Zhang 23be4804b6
[spirv] Remove -fvk-ignore-unused-resources (#1246) 2018-04-24 14:47:28 -04:00
Tex Riddell 5ab102a352 Merge branch 'master' into rtmaster 2018-04-16 15:25:53 -07:00
Lei Zhang 4491a30fba
[spirv] Support non-constant offsets in .Gather*() methods (#1232)
They are emulated via 4 separate OpImage*Gather instructions.
2018-04-16 17:21:02 -04:00
Lei Zhang 4ac938cc5b
[spirv] Clarify doc about SPIR-V target environment (#1230) 2018-04-16 17:16:07 -04:00
Lei Zhang a4491dd439
[spirv] Support shifting all sets with -fvk-*-shift N all (#1224) 2018-04-13 15:40:44 -04:00
Young Kim 0777a7a020 Merge branch 'master' into rtmaster 2018-04-10 16:47:47 -07:00
Lei Zhang 0a8b8c4e1d
[spirv] Rename -fvk-use-glsl-layout to -fvk-use-gl-layout (#1206)
GLSL as a shading language does not define the layout rules for
std140/std430; the OpenGL graphics environment defines that.

This is also more consistent with -fvk-use-dx-layout.
2018-04-10 10:25:26 -04:00
Lei Zhang 99c142be0b
[spirv] Add support for DX layout rules (#1198)
These layout rules can be turned on with -fvk-use-dx-layout.
For both cbuffer/tbuffer and structured buffers.
2018-04-08 12:50:57 -04:00
Ehsan 68984b316a
[spirv] Specify "KHR" to enable all KHR extensions (#1195) 2018-04-03 15:21:23 -04:00
Ehsan 2a0b7c49fd
[spirv] Add -fspv-target-env command line option. (#1187)
* [spirv] Add -fspv-target-env command line option.

The valid values for this option currently are:
vulkan1.0
vulkan1.1

If no target environment is specified, vulkan1.0 is used as default.
2018-04-03 09:12:51 -04:00
Young Kim fd54e1927c
Update docs (#1046) 2018-03-29 17:08:55 -07:00
Lei Zhang 241d32c810
[spirv] Allow explicitly controlling SPIR-V extensions (#1151)
Added FeatureManager to record all extensions specified from
the command-line and emit error if trying to use one not permitted.

Added command-line option -fspv-extension= to specify
whitelisted extensions.
2018-03-27 17:42:16 -04:00
Ehsan c66c37cfa1
[spirv] Add support for DeviceIndex builtin. (#1171) 2018-03-23 10:40:02 -04:00
Lei Zhang 66a8998f87
[spirv] Translate SV_InnerCoverage into FullyCoveredEXT (#1165)
Fixes https://github.com/Microsoft/DirectXShaderCompiler/issues/999
2018-03-22 10:08:43 -04:00
Lei Zhang 9b0167be56
[spirv] Add support for :packoffset() (#1156) 2018-03-20 12:18:31 -04:00
Lei Zhang 0d8a15a61a
[spirv] Better reflection support via new extensions (#1111)
This commit uses the HlslCounterBufferGOOGLE decoration to link
the main RW/Append/Consume StructuredBuffer with its associated
counter buffer. It also uses HLSLSemanticGOOGLE to decorate
stage IO variables with their semantic strings from the source code.
2018-03-17 13:05:31 -04:00
Lei Zhang cfd787a18e
[spirv] Cull RHS of shift operations (#1148)
In SPIR-V, if shifting a value by an amount that is greater than
the value's bitwidth, the result is undefined.

FXC and DXC/DXIL performs a bitwise and over the RHS of the shift
operation to only consider its (n - 1) least significant bits,
where n is the bitwidth of LHS.
2018-03-16 20:19:20 -04:00
Lei Zhang f6f79e744d
[spirv] Emit OpSource debug instruction (#1145) 2018-03-16 13:40:00 -04:00
Lei Zhang e3662ff353
[spirv] Collect global non-resource variables into $Globals (#1138)
This commit changes the behavior of how to handle externally-visiable
non-resource-type stand-alone variables. Previously they are emitted
as stand-alone SPIR-V variables. Now they are grouped into a cbuffer
that named as $Globals. This is more aligned with how DirectX handles
them.
2018-03-14 11:15:14 -04:00
Lei Zhang c133d935eb
[spirv] Support SM6.0 wave ops using Vulkan 1.1 (#1118)
Support promoting to SPIR-V 1.3 when necessary

Support SM6.0 wave query and vote ops

* WaveIsFirstLane
* WaveGetLaneCount
* WaveGetLaneIndex
* WaveActiveAnyTrue
* WaveActiveAllTrue
* WaveActiveBallot

Support SM6.0 wave reduction ops

* WaveActiveAllEqual
* WaveActiveCountBits
* WaveActiveSum
* WaveActiveProduct
* WaveActiveBitAnd
* WaveActiveBitOr
* WaveActiveBitXor
* WaveActiveMin
* WaveActiveMax

Support SM6.0 wave scan/prefix ops

* WavePrefixSum
* WavePrefixProduct
* WavePrefixCountBits

Support SM6.0 wave broadcast ops

* WaveReadLaneAt
* WaveReadLaneFirst

Support SM6.0 quad-wide shuffle ops

*  QuadReadAcrossX
*  QuadReadAcrossY
*  QuadReadAcrossDiagonal
*  QuadReadLaneAt
2018-03-13 15:24:48 -04:00
Lei Zhang c859bb040f
[spirv] Support SPV_KHR_shader_draw_parameters (#1127)
Added support for the following SPIR-V builtins exposed in
SPV_KHR_shader_draw_parameters:
* BaseVertex
* BaseInstance
* DrawIndex
2018-03-13 10:07:54 -04:00
Tex Riddell cb5f27c080 Merge branch 'master' into user/texr/rt-merge-rebase 2018-03-12 13:11:12 -07:00
Lei Zhang 26bf35450a
[spirv] Update doc about reflection (#1130) 2018-03-12 11:32:00 -04:00
Lei Zhang 70990344ed
[spirv] Implement relaxed layout for vector types (#1092)
Based on GLSL std140/std430 layout rules, relaxed layout allows
using vector's element type's alignment as the vector types's
alignment, so that we can pack a float value and a float3 value
tightly. This is the default right now.

Also add an option, -fvk-use-glsl-layout, to turn off the relaxed
layout for vectors and use conventional GLSL std140/std430 layout
rules.
2018-03-12 10:21:54 -04:00
Tex Riddell f8e1af0417 Merge branch 'master' into user/texr/rt-merge-rebase 2018-03-09 00:55:21 -08:00
Lei Zhang 451d095898
[spirv] Update doc about texture concepts (#1123) 2018-03-08 12:11:09 -05:00
Ehsan b02d940813
[spirv] Don't emit Float16 capability. (#1109)
Capability Float16 is not allowed by Vulkan 1.0 specification.
SPV_AMD_gpu_shader_half_float should be used if 16bit floats are used.
2018-03-06 11:25:20 -05:00
Lei Zhang c1ea245a16
[spirv] Add support for WaveReadLineFirst() (#1106) 2018-03-01 15:48:09 -05:00
Young Kim 81ecfef34b
Fix denorm preserve division with high value of denominator (#1093) 2018-03-01 07:41:10 -08:00
Lei Zhang c8970cdf6b
[spirv] Ignore static when seeing both static and groupshared (#1101) 2018-02-28 12:12:13 -05:00
Tex Riddell 914c040b14 Merged PR 26: Fix intrinsic names to match spec.
Fix intrinsic names to match spec.

- PrimitiveIndex still maps to low level dx.op.primitiveID
2018-02-21 21:51:20 +00:00
Lei Zhang 5c4ca12efc
[spirv] Update doc and SPIRV-Tools (#1088)
Add explanation of legalization, optimization, validation in doc.
2018-02-21 14:12:01 -05:00
Lei Zhang 4221a698e1
[spirv] Support WaveGetLaneCount() and WaveGetLaneIndex() (#1077)
They are translated into SPIR-V builtin varibles. The translation
requires the SPV_KHR_shader_ballot extension.
2018-02-21 10:34:01 -05:00
Tex Riddell 7d145d64d5 Merge branch 'master' into user/texr/rt-merge-rebase 2018-02-12 17:51:50 -08:00
Ehsan 774e85eb20 [spirv] Add initial support for non-fp matrices (#1057)
This is the support for non-floating-point matrices,
which are emulated using arrays of vectors because
SPIR-V does not allow non-floating-point matrices.

* Initial support for non-fp matrix
* Add support for non-fp matrix in all()
* Conversion of float matrix to int matrix
* support for modf returning an int matrix
* Add tests for non-fp matrix access
* Mixed arithmetic for non-fp matrices
* Support non-fp matrix in flat conversion
* Non-fp matrix in asint/asuint/asfloat
* Mul of non-fp Matrix with Vector/Scalar
* Add tests for non-fp matrix cast

TODO: Layout decoration of non-fp matrices
TODO: Majorness of non-fp matrices
2018-02-12 15:33:41 -05:00
Xiang Li fdf2c31ca6 1. Fix IgnoreHit and AcceptHitAndEndSearch.
2. Support init list for RayDesc.
3. Remove range_id for lib.
4. Update some test.
2018-02-05 18:51:47 -08:00
Xiang Li 519938f12e Lower HLCreateHandle into CreateHandleFromResourceStructForLib. 2018-02-05 17:54:07 -08:00
Xiang Li c45aa784ac Add AcceptHitAndEndSearch, CallShader, CommitHitAndStopRay and change ReportIntersection into ReportHit.
Also change RayTracingAccelerationStructure into RaytracingAccelerationStructure.
2018-02-05 17:54:06 -08:00
Xiang Li eb4b0ae768 Support user define type for dxil operation.
Add RayTracingAccelerationStructure to dxil resource.
Lower ReportIntersection and TraceRay.
2018-02-05 17:54:05 -08:00
Lei Zhang 240a5d8e7f
[spirv] Wrap global matrix variables in structs (#1050)
According to HLSL doc, "variables that are placed in the global scope
are added implicitly to the $Global cbuffer, using the same packing
method that is used for cbuffers."

But we emit all global variables as stand-alone SPIR-V variables.
This causes issues for matrix variables since we cannot annotate
them with majorness decoration anymore.

Wrap global matrix variables in a struct to solve the problem.
2018-02-02 12:44:48 -05:00
Ehsan d7e95a7f3c
[spirv] Explain reasoning of matrix representation (#1048) 2018-02-01 15:21:17 -05:00
Lei Zhang 14c3c0d92c
[spirv] Add initial support for specialization constant (#1009)
This commit add support for generating OpSpecConstant* instructions
with SpecId decorations. Spec constants are only allowed to be of
scalar boolean/integer/float types. Using spec constant as the array
size does not work at the moment.
2018-01-22 15:36:14 -05:00
Lei Zhang 4cbada6181
[spirv] Translate SubpassInput(MS) and their methods (#1013) 2018-01-22 10:45:56 -05:00
Lei Zhang 6af2a123d8
[spirv] Add support for .GetSamplePosition() (#1008)
This only supports .GetSamplePosition() for standard sample
positions, i.e., sample count is 1, 2, 4, 8, or 16. For other
cases, the method will just return float2(0, 0).
2018-01-19 16:00:23 -05:00
Lei Zhang f9d613b795
[spirv] Add support for -fvk-invert-y (#967)
This is to accommodate Vulkan's coordinate system, which is different
from DX's.
2018-01-08 11:42:47 -05:00
Ehsan eeab612da9
[spirv] 16-bit and 64-bit int, uint, and float. (#966)
* [spirv] 16-bit and 64-bit int, uint, and float.

* Added Int64, Uint64, Int16, Uint16.
* Added 16-bit float constants.
* Get the -enable-16bit-types cmd option.
* Add tests for constant Int64/Uint64/Int16/etc.
2018-01-05 16:52:15 -05:00
Lei Zhang d39c94c56f
[spirv] Emit warning for packoffset (#951)
We do not support packoffset right now. Emit warning and ignore it.
2018-01-03 10:13:04 -05:00
Lei Zhang cf39455abf
[spirv] Update doc about variable storage classes (#945) 2017-12-20 18:34:25 -05:00
Xiang Li b816c124f1
Support resource select for lib profile. (#940) 2017-12-20 10:47:29 -08:00
Ehsan fc52dbced0
[spirv] Document missing pow2 partitioning feature. (#937)
* [spirv] Document missing pow2 partitioning feature.
* Provide more accurate location for attributes.
2017-12-19 13:37:48 -05:00
Ehsan cb4e570b82
[spirv] warn {row|col}_major on standalone matrix. (#935) 2017-12-18 16:48:16 -05:00
Ehsan 1d4509f35d
[spirv] Support Load methods that take Status arg. (#905) 2017-12-12 17:38:30 -05:00
Ehsan 679b7c80c7
[spirv] Support CheckAccessFullyMapped intrinsic. (#897) 2017-12-11 14:02:21 -05:00
Lei Zhang 5de265fddb
[spirv] Add support for ignoring unused resources (#875)
Added a new command line option -fvk-ignore-unused-resources
to avoid emitting SPIR-V code for resources defined but not statically
referenced by the call tree of the entry point in question.
2017-12-05 12:21:55 -05:00
Lei Zhang 53f3f69b36
[spirv] Add mechanism for Vulkan-specific builtins (#805)
[[vk::builtin("...")]] is introduced to support Vulkan-specific
builtins.

There are two supported in this commit:

* gl_PointSize
* gl_HelperInvocation

Validating the usages of these two builtins is left for anther
commit.
2017-11-25 17:32:39 -08:00
Lei Zhang 9745b0d55c
[spirv] Add support for SV_Barycentrics (#837)
The translation is done using  SPIR-V Extension
SPV_AMD_shader_explicit_vertex_parameter.
2017-11-22 18:16:48 -05:00
Lei Zhang d1f1665865
[spirv] Add support for SV_ViewID (#836)
Also error out on seeing unknown patch constant function parameter.
2017-11-22 18:16:15 -05:00
Ehsan 06aadc4789
[spirv] CheckAccessFullyMapped unsupported error (#824) 2017-11-20 08:45:43 -05:00
Lei Zhang 4a4d1134ef
[spirv] Emit unsupported error for some intrinsics (#797)
* abort
* GetRenderTargetSampleCount
* GetRenderTargetSamplePosition
* GatherCmpGreen
* GatherCmpBlue
* GatherCmpAlpha
* GetSamplePosition
* CalculateLevelOfDetailUnclamped
2017-11-16 14:23:03 -05:00
Lei Zhang 83e23e6954
[spirv] Add support for SV_Coverage (#800)
Also emit an error for SV_InnerCoverage.
2017-11-15 12:02:27 -05:00
Ehsan 576a805117
[spirv] Translate intrinsic dst function. (#801) 2017-11-15 10:14:24 -05:00
Lei Zhang 6788ebea4a
[spirv] Add support for [[vk::push_constant]] (#791)
[[vk::push_constant]] can be attached to a global variable of
struct type to put that variable in the PushConstant storage
class.

PushConstant should be of OpTypeStruct type with std430 layout.
2017-11-15 08:14:22 -05:00
Ehsan b32bc384a3
[spirv] Translate intrinsic D3DCOLORtoUBYTE4. (#799) 2017-11-14 11:09:51 -05:00
Lei Zhang 0d462693b5
[spirv] Add support for SV_ViewportIndex (#796) 2017-11-14 10:56:53 -05:00
Lei Zhang e9a2c759b5
[spirv] Support SV_RenderTargetArrayIndex and SV_StencilRef (#789) 2017-11-13 14:44:04 -05:00
Ehsan 4d97841e33
[spirv] Translate *MemoryBarrier* intrinsics. (#790)
* Translation of GroupMemoryBarrier(WithGroupSync)
* Translation of DeviceMemoryBarrier(WithGroupSync)
* Translation of AllMemoryBarrier(WithGroupSync)
2017-11-13 14:08:13 -05:00
Lei Zhang e40535653f
[spirv] Emit Invocations execution mode in GS (#793)
OpExecutionMode Invocations n should be emitted for [instance(n)]
on GS. n defaults to 1.
2017-11-13 10:43:31 -05:00
Ehsan 4bd93f66a3
[spirv] tbuffer and TextureBuffer support. (#787) 2017-11-10 17:07:43 -05:00
Lei Zhang a579b3eaef
[spirv] Add support for f16tof32() and f32tof16() (#786)
Fixes https://github.com/Microsoft/DirectXShaderCompiler/issues/785
2017-11-10 12:31:52 -05:00
Lei Zhang 68ef628bd9
[spirv] Complete the support for SV semantics in all stages (#775)
Covers the following SVs for all their legal SigPoints:

* SV_Position
* SV_ClipDistance
* SV_CullDistance
* SV_VertexID
* SV_InstanceID
* SV_Depth
* SV_DepthGreaterEqual
* SV_DepthLessEqual
* SV_OutputControlPointID
* SV_DomainLocation
* SV_GSInstanceID
* SV_IsFrontFace
* SV_DispatchTreadID
* SV_GroupID
* SV_GroupThreadID
* SV_GroupIndex
* SV_TessFactor
* SV_InsideTessFactor
* SV_PrimitiveID
* SV_SampleIndex
2017-11-10 11:47:50 -05:00
Lei Zhang 37eade8495
[spirv] Add support for basic geometry shader (#772)
This commit supports .Append() and .RestartStrip() method calls
on stream-output objects, which will be translated into SPIR-V
OpEmitVertex and OpEndPrimitive, respectively.

For each .Append() call, all affected stage output variables
will be flushed.
2017-11-08 11:41:43 -05:00
Lei Zhang 87d66c9d09
[spirv] Add doc and tests for snorm/unorm float type (#773) 2017-11-08 10:49:32 -05:00
Young Kim 2c140f795c
RawBufferLoad and new methods for ByteAddressBuffer (#762)
This change is an extension of float16 support. We are adding LoadHalf, LoadFloat, and LoadDouble method to byte address buffer so that users can access data from byte address buffer by these types. Also starting shader model 6.2, we are mapping byte address buffer and structure buffer load/store operations to RawBufferLoad/Store to differentiate raw buffer load from typed buffer load. Unlike BufferLoad for typed buffers, RawBufferLoad for min precision types will not have its min precision values as its return types, but their actual scalar size in buffer (i.e rawBufferLoad.i32 for min16int and rawBufferLoad.f32 for min16float). RawBufferLoad/Store contains additional parameters, where mask was required for correct status behavior for CheckAccessFullyMapped, and alignment is for relative alignment for future potential benefit for backend.
2017-11-07 18:15:19 -08:00
Lei Zhang dc3d2c7921
[spirv] Require ClipDistance/CullDistance capability on use (#769)
Declaring but not using (reading/writing) ClipDistance/CullDistance
does not require the ClipDistance/CullDistance capability.
2017-11-07 15:17:13 -05:00
Lei Zhang 734266277b
[spirv] Change vertex processing stages to emit gl_PerVertex (#757)
As per the Vulkan spec requirement:

  Any variable decorated with Position must be declared as a
  four-component vector of 32-bit floating-point values.

But for HS/DS/GS, we actually have an extra arrayness. If we
generate a stand-alone Postion builtin variable, it will be
an array of float4, which does not comply with the spec.

Similary for the type requirements on ClipDistance and
CullDistance.

The spec could have an problem on this issue, but the GLSL way
is to emit a gl_PerVertex that contains Position, ClipDistance,
and CullDistance. That satisfies the current Vulkan spec.

This commit converts VS output, HS/DS input and output, GS
input to emit the gl_PerVertex struct. It also splits arrays
of structs into arrays of the fields for HS/DS/GS input/output.

ClipDistance/CullDistance is also supported in this commit,
which requires quite some non-trivial handling.
2017-11-07 09:56:10 -05:00
Young Kim 8c55bbbe6d
Denorm to function attribute (#764)
- Denorm mode to function attribute not function annotation
- Adding validation rule for fp32-denorm-mode



* Fix from comments
2017-11-06 18:09:14 -08:00
Xiang Li d8cefeb1ba
Make sure status only used by CheckAccessFullyMapped. (#763)
* Make sure status only used by CheckAccessFullyMapped.
2017-11-03 18:12:15 -07:00
Ehsan 97aab11faf
[spirv] Translate intrinsic asdouble and asuint. (#758) 2017-11-03 05:38:08 -07:00
Ehsan 4b7fab259f
[spirv] Add support for HLSLMatrixTruncationCast (#753) 2017-11-03 05:37:46 -07:00
Ehsan c5dc49a7fd
[spirv] Translate intrinsic Lit function. (#744) 2017-10-31 10:14:56 -04:00
Ehsan 6d8bf3e34a [spirv] Support GS output stream types. (#736) 2017-10-26 14:02:40 -04:00
Ehsan 96c5c0ad17 [spirv] Execution modes for GS primitive types. (#734) 2017-10-25 16:02:23 -04:00
Ehsan 0d9cfd2b3a [spirv] Translate maxvertexcount attribute for GS. (#732) 2017-10-25 09:25:38 -04:00
Lei Zhang ffe7692c75 [spirv] Update SPIR-V rst doc (#733) 2017-10-24 14:32:38 -04:00
Lei Zhang 108f1658d2 [spirv] Add support for [[vk::counter_binding(X)]] (#730)
A new attribute [[vk::counter_binding(X)]] can be used to specify
the binding number for associated counters for RW/append/consume
structured buffers.

Also added support for .IncrementCounter() and .DecrementCounter()
for RWStructuredBuffer.

Also fixed the type error of OpAtomicI{Add|Sub}.
2017-10-24 10:51:50 -04:00
Lei Zhang 5686ccf2c4 [spirv] Allow the same binding number for combined image sampler (#729)
Vulkan combined image sampler is logically considered a sampled
image and a sampler bound together.
2017-10-23 11:57:40 -07:00
Lei Zhang 8702f97dff [spirv] Add support for four register number shifting options (#720)
Added the following four command line options to shift register
number for Vulkan:

* -fvk-b-shift
* -fvk-t-shift
* -fvk-s-shift
* -fvk-u-shift

These options are used to avoid assigning the same binding
number to more than one resources.
2017-10-20 19:37:11 -07:00
Lei Zhang 9cb179024b [spirv] Add support for struct/class static members (#714)
These static members are translated into SPIR-V variables of
the Private storage class.
2017-10-17 07:46:08 -07:00
Ehsan 2fa7a957a0 [spirv] Add translation for intrinsic rcp. (#713)
Also includes creating 64-bit float constants that are needed for
reciprocating a 64-bit float.
2017-10-17 08:53:00 -04:00
Ehsan 78ac89a6f8 [spirv] Documentation of hull shader translation. (#702) 2017-10-16 15:47:29 -04:00
Ehsan 0888e319e7 [spirv] Intrinsic fwidth & faceforward (#711) 2017-10-16 13:53:08 -04:00
Ehsan 8afee2994c [spirv] Intrinsic ddx and ddy. (#707)
Also:
* ddx_coarse, ddx_fine
* ddy_coarse, ddy_fine
2017-10-16 10:11:29 -04:00
Lei Zhang 2e1ea68d6c [spirv] Add support for texture .GatherCmpRed() method (#700) 2017-10-13 11:21:38 -04:00
Lei Zhang 52372b1186 [spirv] Add support for texture .GatherCmp() method (#697) 2017-10-12 15:35:29 -04:00
Lei Zhang 050755b4d8 [spirv] Add support for .SampleCmp() and .SampleCmpLevelZero() (#689) 2017-10-12 11:34:38 -04:00
Lei Zhang 3a6f80eb1b [spirv] Add support for .GatherRGBA() methods on texture types (#682)
Also extended tests for .Gather() tests to cover scalar element
types and vector element types with less than 4 components.
2017-10-10 15:36:37 -04:00
Lei Zhang 102fe247f1 [spirv] Support RWByteAddressBuffer atomic methods (#678) 2017-10-06 09:59:13 -04:00
Lei Zhang c757514869 [spirv] Tweak binding number assignment scheme (#675)
Now we essentially assign binding numbers to all resources in
three passes: [[vk::binding(...)]], register(...), and then
no annotation.
2017-10-03 11:12:08 -04:00
Lei Zhang 49313dd16e [spirv] Update mapping manual (#665) 2017-09-29 14:56:10 -04:00
Ehsan 58612be9f3 [spirv] More compute shader semantics. (#662)
* SV_GroupID
* SV_GroupIndex
* SV_GroupThreadID
2017-09-28 17:43:18 -04:00
Ehsan a0684306a6 [spirv] GetDimension for ACSBuffer. (#658)
GetDimensions for AppendStructuredBuffer
GetDimensions for ConsumeStructuredBuffer
2017-09-28 12:15:32 -04:00
Ehsan 015bdfd1d7 [spirv] Translate several intrinsic functions. (#654)
* frexp
* countbits
* clip
* ldexp
* lerp
* log10
* mad
* modf
* reversebits
2017-09-28 10:28:46 -04:00
Ehsan 52c27ffbbd [spirv] CalculateLevelOfDetail for Texture types. (#653) 2017-09-27 14:15:32 -04:00
Ehsan 746d8ea5ed [spirv] Update doc for ByteAddressBuffer methods. (#652)
* [spirv] Update doc for ByteAddressBuffer methods.

* Better doc.
2017-09-26 09:19:22 -07:00
Ehsan a62fc13575 [spirv] Translation of several intrinsic functions (#639)
* [spirv] Translation of several intrinsic functions

Translation for the following intrinsic functions:

* Matrix transpose
* smoothstep
* refract
* distance
* isinf
* isnan
* isfinite
* sincos
* saturate
* atan2
* fma
* fmod
* frac
* firstbithigh
* firstbitlow

* Address code review comments.
2017-09-26 09:18:23 -07:00
Ehsan 00b7505afd [spirv] GetDimensions for several types. (#636)
* [spirv] GetDimensions for several types.

GetDimensions function implementation for:
Textures, RWTextures,
Buffers, RWBuffers,
ByteAddressBuffers, RWByteAddressBuffers,
StructuredBuffers, RWStructuredBuffers.

* Address comments.

* Update the doc file.
2017-09-25 09:23:06 -07:00
Lei Zhang 809495a4c2 [spirv] Update mapping manual (#634) 2017-09-20 20:28:22 -07:00
Ehsan 479f1cd9bf [spirv] Support other primitive int/float types. (#628)
* [spirv] Support other primitive int/float types.

* Address comments.
2017-09-20 20:26:07 -07:00
Young Kim 223a885613 Group Signature Elements by Element Width (#610)
This change is to enforce the new constraint on signature packing: pack signature elements by data width. Before we introduce fp16 type, every element was assumed to reserve 32 bits. Since we are introducing a new 16 bit data type, we need a new way to enforce signature rules.

After discussions we decided that it would be nice to pack elements based on data width. However, we are still enforcing the rule that each row contains up to 4 elements, regardless of the size. This way, depending on the hardware support drivers can optimize packing signatures, while on DXIL level we maintain the assumption that there are 4 elements per row. We are also still constraining on the total number of rows to be 32 for now. This can be changed in the future if people find this limit to be an issue.
2017-09-06 11:04:33 -07:00
theswiftfox e97dd2a0cd Fix typo in SPIR-V.rst (#612)
HLSL semantic and Vulkan ``Loation`` -> HLSL semantic and Vulkan ``Location``
2017-09-01 13:37:36 -07:00
Ehsan 7a0ae9e90b RWTexture Load() and Texture2DMS(Array) (#609)
* [spirv] OpImageRead can read a vector of any size.

* [spirv] Add support for Load() of RWTexture types.

* [spirv] Texture2DMS and Texture2DMSArray types.

* [spirv] Capability for 1D images without a sampler

* [spirv] Update documentation of Texture2DMS(Array)
2017-08-31 16:10:13 -07:00
Ehsan d5592ce089 [spirv] Add translation of RWTexture... types. (#602)
* [spirv] Add translation of RWTexture... types.
* Update documentation for RWTexture types.
* Fix table formatting in doc.
2017-08-29 14:57:54 -07:00
Lei Zhang bc1301af13 [spirv] Update SPIR-V.rst doc (#596)
Moved logistics and designs to the wiki page. Now the doc is only
for HLSL to SPIR-V mappings.

Also link to the doc and wiki page in the main README.md.
2017-08-25 08:56:42 -07:00
Lei Zhang 0e0e014232 [spirv] Add CL option for stage I/O location assignment order (#578)
A new CL option -fvk-stage-io-order={alpha|decl} is added to
control the order for assigning stage I/O location numbers.
The default is also changed to declaration order (decl) instead
of alphabetical order (alpha).

Also extended testing fixtures to support additional CL options.
2017-08-17 20:59:45 -07:00
Lei Zhang 65d17b4f7c [spirv] Support setting resource binding numbers (#577)
This commit add support for resource binding number assignment via
both the explicit and the implicit way.

The explicit way:

[[vk::binding(X[, Y])]] is introduced, with X denoting the binding
number and the optional Y denoting the set number. If Y is missing,
the set number will be set to 0. This attribute can only be attached
to variables.

The implicit way:

register(xX, spaceY) will be used to deduce the correct set and
binding number for a given resource. X will be used as the binding
number and Y will be used as the set number. Right now we do not
consider the resource type x, which means binding numbers can
overlap given the same X and Y but not x. That is to be addressed
later.
2017-08-17 20:56:48 -07:00