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Sora/FPGA/MIMO
История
qiluo-msft 40ac0d69ed Add FPGA files 2015-04-20 11:24:54 +08:00
..
implement/v5-110t/SoraRCB Add FPGA files 2015-04-20 11:24:54 +08:00
ip_cores Add FPGA files 2015-04-20 11:24:54 +08:00
rtl Add FPGA files 2015-04-20 11:24:54 +08:00
DDR2_scheduler.vsd Add FPGA files 2015-04-20 11:24:54 +08:00
DDR2_scheduler_modified.vsd Add FPGA files 2015-04-20 11:24:54 +08:00
readme.txt Add FPGA files 2015-04-20 11:24:54 +08:00

readme.txt 

Xilinx files (mainly IP_cores) are removed to avoid potential licensing issue. The \ip_cores folder only contains necessary configuration files for customizing the IP cores. Please generate your own IP cores using Xilinx core generater. If you need help on this, you can try to contact V3best.