2006-06-18 02:52:45 +04:00
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/*
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* MPC86xx HPCN board specific routines
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*
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* Recode: ZHANG WEI <wei.zhang@freescale.com>
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* Initial author: Xianghua Xiao <x.xiao@freescale.com>
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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2008-01-22 23:17:45 +03:00
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#include <linux/of_platform.h>
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2006-06-18 02:52:45 +04:00
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpc86xx.h>
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#include <asm/prom.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <asm/i8259.h>
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#include <asm/mpic.h>
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2007-07-10 14:46:35 +04:00
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#include <sysdev/fsl_pci.h>
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2006-06-18 02:52:45 +04:00
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#include <sysdev/fsl_soc.h>
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#include "mpc86xx.h"
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2006-08-01 00:35:41 +04:00
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
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#else
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#define DBG(fmt...) do { } while(0)
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#endif
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2006-08-16 01:19:02 +04:00
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#ifdef CONFIG_PCI
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2006-10-07 16:08:26 +04:00
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static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
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2006-08-01 00:35:41 +04:00
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{
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2006-10-07 16:08:26 +04:00
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unsigned int cascade_irq = i8259_irq();
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2006-08-01 00:35:41 +04:00
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if (cascade_irq != NO_IRQ)
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2006-10-06 05:31:10 +04:00
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generic_handle_irq(cascade_irq);
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2006-08-01 00:35:41 +04:00
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desc->chip->eoi(irq);
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}
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2006-08-16 01:19:02 +04:00
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#endif /* CONFIG_PCI */
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2006-06-18 02:52:45 +04:00
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2008-04-16 21:53:06 +04:00
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static void __init
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2006-06-18 02:52:45 +04:00
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mpc86xx_hpcn_init_irq(void)
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{
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struct mpic *mpic1;
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2006-08-16 01:19:02 +04:00
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struct device_node *np;
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2006-08-17 23:27:57 +04:00
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struct resource res;
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2006-08-16 01:19:02 +04:00
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#ifdef CONFIG_PCI
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struct device_node *cascade_node = NULL;
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int cascade_irq;
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#endif
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2006-06-18 02:52:45 +04:00
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2006-08-17 23:27:57 +04:00
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/* Determine PIC address. */
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2006-08-01 00:35:41 +04:00
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL)
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return;
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2006-08-17 23:27:57 +04:00
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of_address_to_resource(np, 0, &res);
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2006-06-18 02:52:45 +04:00
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/* Alloc mpic structure and per isu has 16 INT entries. */
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2006-08-17 23:27:57 +04:00
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mpic1 = mpic_alloc(np, res.start,
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2006-06-18 02:52:45 +04:00
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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2007-07-03 11:35:35 +04:00
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0, 256, " MPIC ");
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2006-06-18 02:52:45 +04:00
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BUG_ON(mpic1 == NULL);
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mpic_init(mpic1);
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#ifdef CONFIG_PCI
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2006-08-01 00:35:41 +04:00
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/* Initialize i8259 controller */
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for_each_node_by_type(np, "interrupt-controller")
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2007-05-03 11:26:52 +04:00
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if (of_device_is_compatible(np, "chrp,iic")) {
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2006-08-01 00:35:41 +04:00
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cascade_node = np;
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break;
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}
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if (cascade_node == NULL) {
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printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
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return;
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}
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2006-06-18 02:52:45 +04:00
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2006-08-01 00:35:41 +04:00
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cascade_irq = irq_of_parse_and_map(cascade_node, 0);
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if (cascade_irq == NO_IRQ) {
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printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
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return;
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}
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DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
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2006-06-18 02:52:45 +04:00
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2006-08-01 00:35:41 +04:00
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i8259_init(cascade_node, 0);
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2007-02-17 01:17:41 +03:00
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of_node_put(cascade_node);
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2006-08-01 00:35:41 +04:00
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set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
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#endif
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}
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2006-06-18 02:52:45 +04:00
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#ifdef CONFIG_PCI
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2007-08-17 08:55:55 +04:00
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extern int uses_fsl_uli_m1575;
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extern int uli_exclude_device(struct pci_controller *hose,
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u_char bus, u_char devfn);
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2006-06-18 02:52:45 +04:00
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2007-08-17 08:55:55 +04:00
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static int mpc86xx_exclude_device(struct pci_controller *hose,
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u_char bus, u_char devfn)
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2006-06-18 02:52:45 +04:00
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{
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2007-08-17 08:55:55 +04:00
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struct device_node* node;
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struct resource rsrc;
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2006-06-28 09:37:45 +04:00
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2007-12-10 06:33:21 +03:00
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node = hose->dn;
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2007-08-17 08:55:55 +04:00
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of_address_to_resource(node, 0, &rsrc);
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2006-06-28 09:37:45 +04:00
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2007-08-17 08:55:55 +04:00
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if ((rsrc.start & 0xfffff) == 0x8000) {
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return uli_exclude_device(hose, bus, devfn);
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}
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2006-06-28 09:37:45 +04:00
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2007-08-17 08:55:55 +04:00
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return PCIBIOS_SUCCESSFUL;
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2006-06-28 09:37:45 +04:00
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}
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2006-06-18 02:52:45 +04:00
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#endif /* CONFIG_PCI */
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static void __init
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mpc86xx_hpcn_setup_arch(void)
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{
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2007-07-27 22:24:36 +04:00
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#ifdef CONFIG_PCI
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2006-06-18 02:52:45 +04:00
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struct device_node *np;
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2007-07-27 22:24:36 +04:00
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#endif
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2006-06-18 02:52:45 +04:00
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if (ppc_md.progress)
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ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
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#ifdef CONFIG_PCI
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2007-10-04 09:28:43 +04:00
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for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
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2007-07-10 14:46:35 +04:00
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struct resource rsrc;
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of_address_to_resource(np, 0, &rsrc);
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if ((rsrc.start & 0xfffff) == 0x8000)
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fsl_add_bridge(np, 1);
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else
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fsl_add_bridge(np, 0);
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}
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2007-10-04 09:28:43 +04:00
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2007-08-17 08:55:55 +04:00
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uses_fsl_uli_m1575 = 1;
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ppc_md.pci_exclude_device = mpc86xx_exclude_device;
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2006-06-18 02:52:45 +04:00
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#endif
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printk("MPC86xx HPCN board from Freescale Semiconductor\n");
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#ifdef CONFIG_SMP
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mpc86xx_smp_init();
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#endif
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}
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2008-04-16 21:53:06 +04:00
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static void
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2006-06-18 02:52:45 +04:00
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mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
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{
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struct device_node *root;
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uint memsize = total_memory;
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const char *model = "";
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uint svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
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root = of_find_node_by_path("/");
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if (root)
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2007-04-03 16:26:41 +04:00
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model = of_get_property(root, "model", NULL);
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2006-06-18 02:52:45 +04:00
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seq_printf(m, "Machine\t\t: %s\n", model);
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of_node_put(root);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mpc86xx_hpcn_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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2008-04-16 21:53:06 +04:00
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if (of_flat_dt_is_compatible(root, "fsl,mpc8641hpcn"))
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2006-06-18 02:52:45 +04:00
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return 1; /* Looks good */
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return 0;
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}
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2008-04-16 21:53:06 +04:00
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static long __init
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2006-06-18 02:52:45 +04:00
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mpc86xx_time_init(void)
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{
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unsigned int temp;
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/* Set the time base to zero */
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mtspr(SPRN_TBWL, 0);
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mtspr(SPRN_TBWU, 0);
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temp = mfspr(SPRN_HID0);
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temp |= HID0_TBEN;
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mtspr(SPRN_HID0, temp);
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asm volatile("isync");
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return 0;
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}
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2008-01-22 23:17:45 +03:00
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static __initdata struct of_device_id of_bus_ids[] = {
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{ .compatible = "simple-bus", },
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{},
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};
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static int __init declare_of_platform_devices(void)
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{
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of_platform_bus_probe(NULL, of_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
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2006-06-18 02:52:45 +04:00
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define_machine(mpc86xx_hpcn) {
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.name = "MPC86xx HPCN",
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.probe = mpc86xx_hpcn_probe,
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.setup_arch = mpc86xx_hpcn_setup_arch,
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.init_IRQ = mpc86xx_hpcn_init_irq,
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.show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
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.get_irq = mpic_get_irq,
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2007-10-04 10:04:57 +04:00
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.restart = fsl_rstcr_restart,
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2006-06-18 02:52:45 +04:00
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.time_init = mpc86xx_time_init,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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2007-09-10 23:30:33 +04:00
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#ifdef CONFIG_PCI
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2007-07-20 00:29:53 +04:00
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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2007-09-10 23:30:33 +04:00
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#endif
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2006-06-18 02:52:45 +04:00
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};
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