2019-05-29 17:12:40 +03:00
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// SPDX-License-Identifier: GPL-2.0-only
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2013-01-21 03:28:06 +04:00
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/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*/
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2013-01-21 03:28:06 +04:00
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#include <linux/mman.h>
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#include <linux/kvm_host.h>
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#include <linux/io.h>
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2012-11-01 20:14:45 +04:00
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#include <linux/hugetlb.h>
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2017-06-20 19:11:48 +03:00
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#include <linux/sched/signal.h>
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2013-01-21 03:43:58 +04:00
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#include <trace/events/kvm.h>
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2013-01-21 03:28:06 +04:00
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#include <asm/pgalloc.h>
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2013-01-21 03:28:12 +04:00
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#include <asm/cacheflush.h>
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2013-01-21 03:28:06 +04:00
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#include <asm/kvm_arm.h>
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#include <asm/kvm_mmu.h>
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2013-01-21 03:43:58 +04:00
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#include <asm/kvm_mmio.h>
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2019-01-29 21:48:49 +03:00
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#include <asm/kvm_ras.h>
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2013-01-21 03:28:07 +04:00
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#include <asm/kvm_asm.h>
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2013-01-21 03:28:12 +04:00
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#include <asm/kvm_emulate.h>
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2015-01-29 14:59:54 +03:00
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#include <asm/virt.h>
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2013-01-21 03:28:07 +04:00
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#include "trace.h"
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2013-01-21 03:28:06 +04:00
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ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
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static pgd_t *boot_hyp_pgd;
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2013-04-12 22:12:03 +04:00
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static pgd_t *hyp_pgd;
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2015-03-19 19:42:28 +03:00
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static pgd_t *merged_hyp_pgd;
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2013-01-21 03:28:06 +04:00
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static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
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ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
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static unsigned long hyp_idmap_start;
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static unsigned long hyp_idmap_end;
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static phys_addr_t hyp_idmap_vector;
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2017-12-04 20:04:38 +03:00
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static unsigned long io_map_base;
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2014-10-10 14:14:28 +04:00
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#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
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2014-03-28 18:25:19 +04:00
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2015-01-16 02:58:58 +03:00
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#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
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#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
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2019-12-11 19:56:48 +03:00
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static bool is_iomap(unsigned long flags)
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{
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return flags & KVM_S2PTE_FLAG_IS_IOMAP;
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}
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2015-01-16 02:58:58 +03:00
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static bool memslot_is_logging(struct kvm_memory_slot *memslot)
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{
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return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
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2015-01-16 02:59:01 +03:00
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}
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/**
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* kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
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* @kvm: pointer to kvm structure.
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*
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* Interface to HYP function to flush all VM TLB entries
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*/
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void kvm_flush_remote_tlbs(struct kvm *kvm)
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{
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kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
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2015-01-16 02:58:58 +03:00
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}
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2012-11-01 20:14:45 +04:00
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2013-01-28 19:27:00 +04:00
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static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
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2013-01-21 03:28:07 +04:00
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{
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2016-03-22 20:14:25 +03:00
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kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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2013-01-21 03:28:07 +04:00
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}
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2014-12-19 19:48:06 +03:00
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/*
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* D-Cache management functions. They take the page table entries by
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* value, as they are flushing the cache using the kernel mapping (or
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* kmap on 32bit).
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*/
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static void kvm_flush_dcache_pte(pte_t pte)
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{
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__kvm_flush_dcache_pte(pte);
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}
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static void kvm_flush_dcache_pmd(pmd_t pmd)
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{
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__kvm_flush_dcache_pmd(pmd);
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}
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static void kvm_flush_dcache_pud(pud_t pud)
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{
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__kvm_flush_dcache_pud(pud);
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}
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ARM/arm64: KVM: test properly for a PTE's uncachedness
The open coded tests for checking whether a PTE maps a page as
uncached use a flawed '(pte_val(xxx) & CONST) != CONST' pattern,
which is not guaranteed to work since the type of a mapping is
not a set of mutually exclusive bits
For HYP mappings, the type is an index into the MAIR table (i.e, the
index itself does not contain any information whatsoever about the
type of the mapping), and for stage-2 mappings it is a bit field where
normal memory and device types are defined as follows:
#define MT_S2_NORMAL 0xf
#define MT_S2_DEVICE_nGnRE 0x1
I.e., masking *and* comparing with the latter matches on the former,
and we have been getting lucky merely because the S2 device mappings
also have the PTE_UXN bit set, or we would misidentify memory mappings
as device mappings.
Since the unmap_range() code path (which contains one instance of the
flawed test) is used both for HYP mappings and stage-2 mappings, and
considering the difference between the two, it is non-trivial to fix
this by rewriting the tests in place, as it would involve passing
down the type of mapping through all the functions.
However, since HYP mappings and stage-2 mappings both deal with host
physical addresses, we can simply check whether the mapping is backed
by memory that is managed by the host kernel, and only perform the
D-cache maintenance if this is the case.
Cc: stable@vger.kernel.org
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-11-10 17:11:20 +03:00
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static bool kvm_is_device_pfn(unsigned long pfn)
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{
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return !pfn_valid(pfn);
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}
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2015-01-16 02:58:58 +03:00
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/**
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* stage2_dissolve_pmd() - clear and flush huge PMD entry
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* @kvm: pointer to kvm structure.
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* @addr: IPA
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* @pmd: pmd pointer for IPA
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*
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2019-03-25 11:02:05 +03:00
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* Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs.
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2015-01-16 02:58:58 +03:00
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*/
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static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
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{
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2016-03-01 15:00:39 +03:00
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if (!pmd_thp_or_huge(*pmd))
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2015-01-16 02:58:58 +03:00
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return;
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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put_page(virt_to_page(pmd));
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}
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2018-12-11 20:10:41 +03:00
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/**
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* stage2_dissolve_pud() - clear and flush huge PUD entry
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* @kvm: pointer to kvm structure.
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* @addr: IPA
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* @pud: pud pointer for IPA
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*
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2019-03-25 11:02:05 +03:00
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* Function clears a PUD entry, flushes addr 1st and 2nd stage TLBs.
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2018-12-11 20:10:41 +03:00
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*/
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static void stage2_dissolve_pud(struct kvm *kvm, phys_addr_t addr, pud_t *pudp)
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{
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if (!stage2_pud_huge(kvm, *pudp))
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return;
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stage2_pud_clear(kvm, pudp);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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put_page(virt_to_page(pudp));
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}
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2013-01-21 03:28:07 +04:00
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static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
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int min, int max)
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{
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void *page;
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BUG_ON(max > KVM_NR_MEM_OBJS);
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if (cache->nobjs >= min)
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return 0;
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while (cache->nobjs < max) {
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2019-07-12 06:58:02 +03:00
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page = (void *)__get_free_page(GFP_PGTABLE_USER);
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2013-01-21 03:28:07 +04:00
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if (!page)
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return -ENOMEM;
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cache->objects[cache->nobjs++] = page;
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}
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return 0;
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}
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static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
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{
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while (mc->nobjs)
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free_page((unsigned long)mc->objects[--mc->nobjs]);
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}
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static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
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{
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void *p;
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BUG_ON(!mc || !mc->nobjs);
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p = mc->objects[--mc->nobjs];
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return p;
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}
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2016-03-23 15:08:02 +03:00
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static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
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arm64: KVM: fix 2-level page tables unmapping
When using 64kB pages, we only have two levels of page tables,
meaning that PGD, PUD and PMD are fused. In this case, trying
to refcount PUDs and PMDs independently is a a complete disaster,
as they are the same.
We manage to get it right for the allocation (stage2_set_pte uses
{pmd,pud}_none), but the unmapping path clears both pud and pmd
refcounts, which fails spectacularly with 2-level page tables.
The fix is to avoid calling clear_pud_entry when both the pmd and
pud pages are empty. For this, and instead of introducing another
pud_empty function, consolidate both pte_empty and pmd_empty into
page_empty (the code is actually identical) and use that to also
test the validity of the pud.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-06 16:05:48 +04:00
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{
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2018-09-26 19:32:44 +03:00
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pud_t *pud_table __maybe_unused = stage2_pud_offset(kvm, pgd, 0UL);
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stage2_pgd_clear(kvm, pgd);
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2014-05-10 01:31:31 +04:00
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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2018-09-26 19:32:44 +03:00
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stage2_pud_free(kvm, pud_table);
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2014-05-10 01:31:31 +04:00
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put_page(virt_to_page(pgd));
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arm64: KVM: fix 2-level page tables unmapping
When using 64kB pages, we only have two levels of page tables,
meaning that PGD, PUD and PMD are fused. In this case, trying
to refcount PUDs and PMDs independently is a a complete disaster,
as they are the same.
We manage to get it right for the allocation (stage2_set_pte uses
{pmd,pud}_none), but the unmapping path clears both pud and pmd
refcounts, which fails spectacularly with 2-level page tables.
The fix is to avoid calling clear_pud_entry when both the pmd and
pud pages are empty. For this, and instead of introducing another
pud_empty function, consolidate both pte_empty and pmd_empty into
page_empty (the code is actually identical) and use that to also
test the validity of the pud.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-06 16:05:48 +04:00
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}
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2016-03-23 15:08:02 +03:00
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static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
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2013-01-21 03:28:06 +04:00
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{
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2018-09-26 19:32:44 +03:00
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pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(kvm, pud, 0);
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VM_BUG_ON(stage2_pud_huge(kvm, *pud));
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stage2_pud_clear(kvm, pud);
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2014-05-10 01:31:31 +04:00
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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2018-09-26 19:32:44 +03:00
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stage2_pmd_free(kvm, pmd_table);
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2013-04-12 22:12:05 +04:00
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put_page(virt_to_page(pud));
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}
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2013-01-21 03:28:06 +04:00
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2016-03-23 15:08:02 +03:00
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static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
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2013-04-12 22:12:05 +04:00
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{
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2014-05-10 01:31:31 +04:00
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pte_t *pte_table = pte_offset_kernel(pmd, 0);
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2016-03-01 15:00:39 +03:00
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VM_BUG_ON(pmd_thp_or_huge(*pmd));
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2014-05-10 01:31:31 +04:00
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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2019-03-12 16:25:45 +03:00
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free_page((unsigned long)pte_table);
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2013-04-12 22:12:05 +04:00
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put_page(virt_to_page(pmd));
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}
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2018-05-25 14:23:11 +03:00
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static inline void kvm_set_pte(pte_t *ptep, pte_t new_pte)
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{
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WRITE_ONCE(*ptep, new_pte);
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dsb(ishst);
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}
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static inline void kvm_set_pmd(pmd_t *pmdp, pmd_t new_pmd)
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{
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WRITE_ONCE(*pmdp, new_pmd);
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dsb(ishst);
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}
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2018-06-27 17:51:05 +03:00
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static inline void kvm_pmd_populate(pmd_t *pmdp, pte_t *ptep)
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{
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kvm_set_pmd(pmdp, kvm_mk_pmd(ptep));
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}
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static inline void kvm_pud_populate(pud_t *pudp, pmd_t *pmdp)
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{
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WRITE_ONCE(*pudp, kvm_mk_pud(pmdp));
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dsb(ishst);
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}
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static inline void kvm_pgd_populate(pgd_t *pgdp, pud_t *pudp)
|
|
|
|
{
|
|
|
|
WRITE_ONCE(*pgdp, kvm_mk_pgd(pudp));
|
|
|
|
dsb(ishst);
|
|
|
|
}
|
|
|
|
|
2014-12-19 19:48:06 +03:00
|
|
|
/*
|
|
|
|
* Unmapping vs dcache management:
|
|
|
|
*
|
|
|
|
* If a guest maps certain memory pages as uncached, all writes will
|
|
|
|
* bypass the data cache and go directly to RAM. However, the CPUs
|
|
|
|
* can still speculate reads (not writes) and fill cache lines with
|
|
|
|
* data.
|
|
|
|
*
|
|
|
|
* Those cache lines will be *clean* cache lines though, so a
|
|
|
|
* clean+invalidate operation is equivalent to an invalidate
|
|
|
|
* operation, because no cache lines are marked dirty.
|
|
|
|
*
|
|
|
|
* Those clean cache lines could be filled prior to an uncached write
|
|
|
|
* by the guest, and the cache coherent IO subsystem would therefore
|
|
|
|
* end up writing old data to disk.
|
|
|
|
*
|
|
|
|
* This is why right after unmapping a page/section and invalidating
|
|
|
|
* the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
|
|
|
|
* the IO subsystem will never hit in the cache.
|
2018-04-06 14:27:28 +03:00
|
|
|
*
|
|
|
|
* This is all avoided on systems that have ARM64_HAS_STAGE2_FWB, as
|
|
|
|
* we then fully enforce cacheability of RAM, no matter what the guest
|
|
|
|
* does.
|
2014-12-19 19:48:06 +03:00
|
|
|
*/
|
2016-03-23 15:08:02 +03:00
|
|
|
static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
|
2014-05-10 01:31:31 +04:00
|
|
|
phys_addr_t addr, phys_addr_t end)
|
2013-04-12 22:12:05 +04:00
|
|
|
{
|
2014-05-10 01:31:31 +04:00
|
|
|
phys_addr_t start_addr = addr;
|
|
|
|
pte_t *pte, *start_pte;
|
|
|
|
|
|
|
|
start_pte = pte = pte_offset_kernel(pmd, addr);
|
|
|
|
do {
|
|
|
|
if (!pte_none(*pte)) {
|
2014-12-19 19:48:06 +03:00
|
|
|
pte_t old_pte = *pte;
|
|
|
|
|
2014-05-10 01:31:31 +04:00
|
|
|
kvm_set_pte(pte, __pte(0));
|
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2014-12-19 19:48:06 +03:00
|
|
|
|
|
|
|
/* No need to invalidate the cache for device mappings */
|
2015-12-03 11:25:22 +03:00
|
|
|
if (!kvm_is_device_pfn(pte_pfn(old_pte)))
|
2014-12-19 19:48:06 +03:00
|
|
|
kvm_flush_dcache_pte(old_pte);
|
|
|
|
|
|
|
|
put_page(virt_to_page(pte));
|
2014-05-10 01:31:31 +04:00
|
|
|
}
|
|
|
|
} while (pte++, addr += PAGE_SIZE, addr != end);
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
if (stage2_pte_table_empty(kvm, start_pte))
|
2016-03-23 15:08:02 +03:00
|
|
|
clear_stage2_pmd_entry(kvm, pmd, start_addr);
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
2016-03-23 15:08:02 +03:00
|
|
|
static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
|
2014-05-10 01:31:31 +04:00
|
|
|
phys_addr_t addr, phys_addr_t end)
|
2013-03-05 06:43:17 +04:00
|
|
|
{
|
2014-05-10 01:31:31 +04:00
|
|
|
phys_addr_t next, start_addr = addr;
|
|
|
|
pmd_t *pmd, *start_pmd;
|
2013-03-05 06:43:17 +04:00
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
start_pmd = pmd = stage2_pmd_offset(kvm, pud, addr);
|
2014-05-10 01:31:31 +04:00
|
|
|
do {
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pmd_addr_end(kvm, addr, end);
|
2014-05-10 01:31:31 +04:00
|
|
|
if (!pmd_none(*pmd)) {
|
2016-03-01 15:00:39 +03:00
|
|
|
if (pmd_thp_or_huge(*pmd)) {
|
2014-12-19 19:48:06 +03:00
|
|
|
pmd_t old_pmd = *pmd;
|
|
|
|
|
2014-05-10 01:31:31 +04:00
|
|
|
pmd_clear(pmd);
|
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2014-12-19 19:48:06 +03:00
|
|
|
|
|
|
|
kvm_flush_dcache_pmd(old_pmd);
|
|
|
|
|
2014-05-10 01:31:31 +04:00
|
|
|
put_page(virt_to_page(pmd));
|
|
|
|
} else {
|
2016-03-23 15:08:02 +03:00
|
|
|
unmap_stage2_ptes(kvm, pmd, addr, next);
|
2014-05-10 01:31:31 +04:00
|
|
|
}
|
2012-11-01 20:14:45 +04:00
|
|
|
}
|
2014-05-10 01:31:31 +04:00
|
|
|
} while (pmd++, addr = next, addr != end);
|
2012-11-01 20:14:45 +04:00
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
if (stage2_pmd_table_empty(kvm, start_pmd))
|
2016-03-23 15:08:02 +03:00
|
|
|
clear_stage2_pud_entry(kvm, pud, start_addr);
|
2014-05-10 01:31:31 +04:00
|
|
|
}
|
2013-03-05 06:43:17 +04:00
|
|
|
|
2016-03-23 15:08:02 +03:00
|
|
|
static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
|
2014-05-10 01:31:31 +04:00
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
phys_addr_t next, start_addr = addr;
|
|
|
|
pud_t *pud, *start_pud;
|
2013-04-12 22:12:05 +04:00
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
start_pud = pud = stage2_pud_offset(kvm, pgd, addr);
|
2014-05-10 01:31:31 +04:00
|
|
|
do {
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pud_addr_end(kvm, addr, end);
|
|
|
|
if (!stage2_pud_none(kvm, *pud)) {
|
|
|
|
if (stage2_pud_huge(kvm, *pud)) {
|
2014-12-19 19:48:06 +03:00
|
|
|
pud_t old_pud = *pud;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
stage2_pud_clear(kvm, pud);
|
2014-05-10 01:31:31 +04:00
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2014-12-19 19:48:06 +03:00
|
|
|
kvm_flush_dcache_pud(old_pud);
|
2014-05-10 01:31:31 +04:00
|
|
|
put_page(virt_to_page(pud));
|
|
|
|
} else {
|
2016-03-23 15:08:02 +03:00
|
|
|
unmap_stage2_pmds(kvm, pud, addr, next);
|
2013-04-12 22:12:05 +04:00
|
|
|
}
|
|
|
|
}
|
2014-05-10 01:31:31 +04:00
|
|
|
} while (pud++, addr = next, addr != end);
|
2013-04-12 22:12:05 +04:00
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
if (stage2_pud_table_empty(kvm, start_pud))
|
2016-03-23 15:08:02 +03:00
|
|
|
clear_stage2_pgd_entry(kvm, pgd, start_addr);
|
2014-05-10 01:31:31 +04:00
|
|
|
}
|
|
|
|
|
2016-03-23 15:08:02 +03:00
|
|
|
/**
|
|
|
|
* unmap_stage2_range -- Clear stage2 page table entries to unmap a range
|
|
|
|
* @kvm: The VM pointer
|
|
|
|
* @start: The intermediate physical base address of the range to unmap
|
|
|
|
* @size: The size of the area to unmap
|
|
|
|
*
|
|
|
|
* Clear a range of stage-2 mappings, lowering the various ref-counts. Must
|
|
|
|
* be called while holding mmu_lock (unless for freeing the stage2 pgd before
|
|
|
|
* destroying the VM), otherwise another faulting VCPU may come in and mess
|
|
|
|
* with things behind our backs.
|
|
|
|
*/
|
|
|
|
static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
|
2014-05-10 01:31:31 +04:00
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
phys_addr_t addr = start, end = start + size;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2017-04-03 17:12:43 +03:00
|
|
|
assert_spin_locked(&kvm->mmu_lock);
|
2018-05-21 06:05:30 +03:00
|
|
|
WARN_ON(size & ~PAGE_MASK);
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
|
2014-05-10 01:31:31 +04:00
|
|
|
do {
|
2017-05-16 12:34:55 +03:00
|
|
|
/*
|
|
|
|
* Make sure the page table is still active, as another thread
|
|
|
|
* could have possibly freed the page table, while we released
|
|
|
|
* the lock.
|
|
|
|
*/
|
|
|
|
if (!READ_ONCE(kvm->arch.pgd))
|
|
|
|
break;
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pgd_addr_end(kvm, addr, end);
|
|
|
|
if (!stage2_pgd_none(kvm, *pgd))
|
2016-03-23 15:08:02 +03:00
|
|
|
unmap_stage2_puds(kvm, pgd, addr, next);
|
2017-04-03 17:12:43 +03:00
|
|
|
/*
|
|
|
|
* If the range is too large, release the kvm->mmu_lock
|
|
|
|
* to prevent starvation and lockup detector warnings.
|
|
|
|
*/
|
|
|
|
if (next != end)
|
|
|
|
cond_resched_lock(&kvm->mmu_lock);
|
2014-05-10 01:31:31 +04:00
|
|
|
} while (pgd++, addr = next, addr != end);
|
2013-03-05 06:43:17 +04:00
|
|
|
}
|
|
|
|
|
2014-01-15 16:50:23 +04:00
|
|
|
static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
|
|
|
do {
|
2015-12-03 11:25:22 +03:00
|
|
|
if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
|
2014-12-19 19:48:06 +03:00
|
|
|
kvm_flush_dcache_pte(*pte);
|
2014-01-15 16:50:23 +04:00
|
|
|
} while (pte++, addr += PAGE_SIZE, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pmd = stage2_pmd_offset(kvm, pud, addr);
|
2014-01-15 16:50:23 +04:00
|
|
|
do {
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pmd_addr_end(kvm, addr, end);
|
2014-01-15 16:50:23 +04:00
|
|
|
if (!pmd_none(*pmd)) {
|
2016-03-01 15:00:39 +03:00
|
|
|
if (pmd_thp_or_huge(*pmd))
|
2014-12-19 19:48:06 +03:00
|
|
|
kvm_flush_dcache_pmd(*pmd);
|
|
|
|
else
|
2014-01-15 16:50:23 +04:00
|
|
|
stage2_flush_ptes(kvm, pmd, addr, next);
|
|
|
|
}
|
|
|
|
} while (pmd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pud = stage2_pud_offset(kvm, pgd, addr);
|
2014-01-15 16:50:23 +04:00
|
|
|
do {
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pud_addr_end(kvm, addr, end);
|
|
|
|
if (!stage2_pud_none(kvm, *pud)) {
|
|
|
|
if (stage2_pud_huge(kvm, *pud))
|
2014-12-19 19:48:06 +03:00
|
|
|
kvm_flush_dcache_pud(*pud);
|
|
|
|
else
|
2014-01-15 16:50:23 +04:00
|
|
|
stage2_flush_pmds(kvm, pud, addr, next);
|
|
|
|
}
|
|
|
|
} while (pud++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stage2_flush_memslot(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot)
|
|
|
|
{
|
|
|
|
phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
|
|
|
|
phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
|
|
|
|
phys_addr_t next;
|
|
|
|
pgd_t *pgd;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
|
2014-01-15 16:50:23 +04:00
|
|
|
do {
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pgd_addr_end(kvm, addr, end);
|
|
|
|
if (!stage2_pgd_none(kvm, *pgd))
|
2018-09-26 19:32:37 +03:00
|
|
|
stage2_flush_puds(kvm, pgd, addr, next);
|
2014-01-15 16:50:23 +04:00
|
|
|
} while (pgd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_flush_vm - Invalidate cache for pages mapped in stage 2
|
|
|
|
* @kvm: The struct kvm pointer
|
|
|
|
*
|
|
|
|
* Go through the stage 2 page tables and invalidate any cache lines
|
|
|
|
* backing memory already mapped to the VM.
|
|
|
|
*/
|
2014-12-19 19:05:31 +03:00
|
|
|
static void stage2_flush_vm(struct kvm *kvm)
|
2014-01-15 16:50:23 +04:00
|
|
|
{
|
|
|
|
struct kvm_memslots *slots;
|
|
|
|
struct kvm_memory_slot *memslot;
|
|
|
|
int idx;
|
|
|
|
|
|
|
|
idx = srcu_read_lock(&kvm->srcu);
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
|
|
|
|
slots = kvm_memslots(kvm);
|
|
|
|
kvm_for_each_memslot(memslot, slots)
|
|
|
|
stage2_flush_memslot(kvm, memslot);
|
|
|
|
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
srcu_read_unlock(&kvm->srcu, idx);
|
|
|
|
}
|
|
|
|
|
2016-03-22 21:56:21 +03:00
|
|
|
static void clear_hyp_pgd_entry(pgd_t *pgd)
|
|
|
|
{
|
|
|
|
pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
|
|
|
|
pgd_clear(pgd);
|
|
|
|
pud_free(NULL, pud_table);
|
|
|
|
put_page(virt_to_page(pgd));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void clear_hyp_pud_entry(pud_t *pud)
|
|
|
|
{
|
|
|
|
pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
|
|
|
|
VM_BUG_ON(pud_huge(*pud));
|
|
|
|
pud_clear(pud);
|
|
|
|
pmd_free(NULL, pmd_table);
|
|
|
|
put_page(virt_to_page(pud));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void clear_hyp_pmd_entry(pmd_t *pmd)
|
|
|
|
{
|
|
|
|
pte_t *pte_table = pte_offset_kernel(pmd, 0);
|
|
|
|
VM_BUG_ON(pmd_thp_or_huge(*pmd));
|
|
|
|
pmd_clear(pmd);
|
|
|
|
pte_free_kernel(NULL, pte_table);
|
|
|
|
put_page(virt_to_page(pmd));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pte_t *pte, *start_pte;
|
|
|
|
|
|
|
|
start_pte = pte = pte_offset_kernel(pmd, addr);
|
|
|
|
do {
|
|
|
|
if (!pte_none(*pte)) {
|
|
|
|
kvm_set_pte(pte, __pte(0));
|
|
|
|
put_page(virt_to_page(pte));
|
|
|
|
}
|
|
|
|
} while (pte++, addr += PAGE_SIZE, addr != end);
|
|
|
|
|
|
|
|
if (hyp_pte_table_empty(start_pte))
|
|
|
|
clear_hyp_pmd_entry(pmd);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
phys_addr_t next;
|
|
|
|
pmd_t *pmd, *start_pmd;
|
|
|
|
|
|
|
|
start_pmd = pmd = pmd_offset(pud, addr);
|
|
|
|
do {
|
|
|
|
next = pmd_addr_end(addr, end);
|
|
|
|
/* Hyp doesn't use huge pmds */
|
|
|
|
if (!pmd_none(*pmd))
|
|
|
|
unmap_hyp_ptes(pmd, addr, next);
|
|
|
|
} while (pmd++, addr = next, addr != end);
|
|
|
|
|
|
|
|
if (hyp_pmd_table_empty(start_pmd))
|
|
|
|
clear_hyp_pud_entry(pud);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
phys_addr_t next;
|
|
|
|
pud_t *pud, *start_pud;
|
|
|
|
|
|
|
|
start_pud = pud = pud_offset(pgd, addr);
|
|
|
|
do {
|
|
|
|
next = pud_addr_end(addr, end);
|
|
|
|
/* Hyp doesn't use huge puds */
|
|
|
|
if (!pud_none(*pud))
|
|
|
|
unmap_hyp_pmds(pud, addr, next);
|
|
|
|
} while (pud++, addr = next, addr != end);
|
|
|
|
|
|
|
|
if (hyp_pud_table_empty(start_pud))
|
|
|
|
clear_hyp_pgd_entry(pgd);
|
|
|
|
}
|
|
|
|
|
2018-03-14 18:17:33 +03:00
|
|
|
static unsigned int kvm_pgd_index(unsigned long addr, unsigned int ptrs_per_pgd)
|
|
|
|
{
|
|
|
|
return (addr >> PGDIR_SHIFT) & (ptrs_per_pgd - 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __unmap_hyp_range(pgd_t *pgdp, unsigned long ptrs_per_pgd,
|
|
|
|
phys_addr_t start, u64 size)
|
2016-03-22 21:56:21 +03:00
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
phys_addr_t addr = start, end = start + size;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We don't unmap anything from HYP, except at the hyp tear down.
|
|
|
|
* Hence, we don't have to invalidate the TLBs here.
|
|
|
|
*/
|
2018-03-14 18:17:33 +03:00
|
|
|
pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
|
2016-03-22 21:56:21 +03:00
|
|
|
do {
|
|
|
|
next = pgd_addr_end(addr, end);
|
|
|
|
if (!pgd_none(*pgd))
|
|
|
|
unmap_hyp_puds(pgd, addr, next);
|
|
|
|
} while (pgd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
2018-03-14 18:17:33 +03:00
|
|
|
static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
|
|
|
|
{
|
|
|
|
__unmap_hyp_range(pgdp, PTRS_PER_PGD, start, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void unmap_hyp_idmap_range(pgd_t *pgdp, phys_addr_t start, u64 size)
|
|
|
|
{
|
|
|
|
__unmap_hyp_range(pgdp, __kvm_idmap_ptrs_per_pgd(), start, size);
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:06 +04:00
|
|
|
/**
|
2013-04-12 22:12:05 +04:00
|
|
|
* free_hyp_pgds - free Hyp-mode page tables
|
2013-01-21 03:28:06 +04:00
|
|
|
*
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
|
|
|
* Assumes hyp_pgd is a page table used strictly in Hyp-mode and
|
|
|
|
* therefore contains either mappings in the kernel memory area (above
|
2017-12-04 20:04:38 +03:00
|
|
|
* PAGE_OFFSET), or device mappings in the idmap range.
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
|
|
|
*
|
2017-12-04 20:04:38 +03:00
|
|
|
* boot_hyp_pgd should only map the idmap range, and is only used in
|
|
|
|
* the extended idmap case.
|
2013-01-21 03:28:06 +04:00
|
|
|
*/
|
2013-04-12 22:12:05 +04:00
|
|
|
void free_hyp_pgds(void)
|
2013-01-21 03:28:06 +04:00
|
|
|
{
|
2017-12-04 20:04:38 +03:00
|
|
|
pgd_t *id_pgd;
|
|
|
|
|
2013-04-12 22:12:07 +04:00
|
|
|
mutex_lock(&kvm_hyp_pgd_mutex);
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
|
|
|
|
2017-12-04 20:04:38 +03:00
|
|
|
id_pgd = boot_hyp_pgd ? boot_hyp_pgd : hyp_pgd;
|
|
|
|
|
|
|
|
if (id_pgd) {
|
|
|
|
/* In case we never called hyp_mmu_init() */
|
|
|
|
if (!io_map_base)
|
|
|
|
io_map_base = hyp_idmap_start;
|
|
|
|
unmap_hyp_idmap_range(id_pgd, io_map_base,
|
|
|
|
hyp_idmap_start + PAGE_SIZE - io_map_base);
|
|
|
|
}
|
|
|
|
|
2016-06-30 20:40:46 +03:00
|
|
|
if (boot_hyp_pgd) {
|
|
|
|
free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
|
|
|
|
boot_hyp_pgd = NULL;
|
|
|
|
}
|
|
|
|
|
2013-04-12 22:12:05 +04:00
|
|
|
if (hyp_pgd) {
|
2017-12-07 14:45:45 +03:00
|
|
|
unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET),
|
|
|
|
(uintptr_t)high_memory - PAGE_OFFSET);
|
2013-05-14 15:11:34 +04:00
|
|
|
|
2014-10-10 14:14:28 +04:00
|
|
|
free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
|
2013-04-12 22:12:07 +04:00
|
|
|
hyp_pgd = NULL;
|
2013-04-12 22:12:05 +04:00
|
|
|
}
|
2015-03-19 19:42:28 +03:00
|
|
|
if (merged_hyp_pgd) {
|
|
|
|
clear_page(merged_hyp_pgd);
|
|
|
|
free_page((unsigned long)merged_hyp_pgd);
|
|
|
|
merged_hyp_pgd = NULL;
|
|
|
|
}
|
2013-04-12 22:12:05 +04:00
|
|
|
|
2013-01-21 03:28:06 +04:00
|
|
|
mutex_unlock(&kvm_hyp_pgd_mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
|
2013-04-12 22:12:01 +04:00
|
|
|
unsigned long end, unsigned long pfn,
|
|
|
|
pgprot_t prot)
|
2013-01-21 03:28:06 +04:00
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
unsigned long addr;
|
|
|
|
|
2013-04-12 22:12:02 +04:00
|
|
|
addr = start;
|
|
|
|
do {
|
2013-04-12 22:12:01 +04:00
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
2018-12-11 20:10:36 +03:00
|
|
|
kvm_set_pte(pte, kvm_pfn_pte(pfn, prot));
|
2013-04-12 22:12:05 +04:00
|
|
|
get_page(virt_to_page(pte));
|
2013-04-12 22:12:01 +04:00
|
|
|
pfn++;
|
2013-04-12 22:12:02 +04:00
|
|
|
} while (addr += PAGE_SIZE, addr != end);
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
|
2013-04-12 22:12:01 +04:00
|
|
|
unsigned long end, unsigned long pfn,
|
|
|
|
pgprot_t prot)
|
2013-01-21 03:28:06 +04:00
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
unsigned long addr, next;
|
|
|
|
|
2013-04-12 22:12:02 +04:00
|
|
|
addr = start;
|
|
|
|
do {
|
2013-04-12 22:12:01 +04:00
|
|
|
pmd = pmd_offset(pud, addr);
|
2013-01-21 03:28:06 +04:00
|
|
|
|
|
|
|
BUG_ON(pmd_sect(*pmd));
|
|
|
|
|
|
|
|
if (pmd_none(*pmd)) {
|
mm: treewide: remove unused address argument from pte_alloc functions
Patch series "Add support for fast mremap".
This series speeds up the mremap(2) syscall by copying page tables at
the PMD level even for non-THP systems. There is concern that the extra
'address' argument that mremap passes to pte_alloc may do something
subtle architecture related in the future that may make the scheme not
work. Also we find that there is no point in passing the 'address' to
pte_alloc since its unused. This patch therefore removes this argument
tree-wide resulting in a nice negative diff as well. Also ensuring
along the way that the enabled architectures do not do anything funky
with the 'address' argument that goes unnoticed by the optimization.
Build and boot tested on x86-64. Build tested on arm64. The config
enablement patch for arm64 will be posted in the future after more
testing.
The changes were obtained by applying the following Coccinelle script.
(thanks Julia for answering all Coccinelle questions!).
Following fix ups were done manually:
* Removal of address argument from pte_fragment_alloc
* Removal of pte_alloc_one_fast definitions from m68k and microblaze.
// Options: --include-headers --no-includes
// Note: I split the 'identifier fn' line, so if you are manually
// running it, please unsplit it so it runs for you.
virtual patch
@pte_alloc_func_def depends on patch exists@
identifier E2;
identifier fn =~
"^(__pte_alloc|pte_alloc_one|pte_alloc|__pte_alloc_kernel|pte_alloc_one_kernel)$";
type T2;
@@
fn(...
- , T2 E2
)
{ ... }
@pte_alloc_func_proto_noarg depends on patch exists@
type T1, T2, T3, T4;
identifier fn =~ "^(__pte_alloc|pte_alloc_one|pte_alloc|__pte_alloc_kernel|pte_alloc_one_kernel)$";
@@
(
- T3 fn(T1, T2);
+ T3 fn(T1);
|
- T3 fn(T1, T2, T4);
+ T3 fn(T1, T2);
)
@pte_alloc_func_proto depends on patch exists@
identifier E1, E2, E4;
type T1, T2, T3, T4;
identifier fn =~
"^(__pte_alloc|pte_alloc_one|pte_alloc|__pte_alloc_kernel|pte_alloc_one_kernel)$";
@@
(
- T3 fn(T1 E1, T2 E2);
+ T3 fn(T1 E1);
|
- T3 fn(T1 E1, T2 E2, T4 E4);
+ T3 fn(T1 E1, T2 E2);
)
@pte_alloc_func_call depends on patch exists@
expression E2;
identifier fn =~
"^(__pte_alloc|pte_alloc_one|pte_alloc|__pte_alloc_kernel|pte_alloc_one_kernel)$";
@@
fn(...
-, E2
)
@pte_alloc_macro depends on patch exists@
identifier fn =~
"^(__pte_alloc|pte_alloc_one|pte_alloc|__pte_alloc_kernel|pte_alloc_one_kernel)$";
identifier a, b, c;
expression e;
position p;
@@
(
- #define fn(a, b, c) e
+ #define fn(a, b) e
|
- #define fn(a, b) e
+ #define fn(a) e
)
Link: http://lkml.kernel.org/r/20181108181201.88826-2-joelaf@google.com
Signed-off-by: Joel Fernandes (Google) <joel@joelfernandes.org>
Suggested-by: Kirill A. Shutemov <kirill@shutemov.name>
Acked-by: Kirill A. Shutemov <kirill@shutemov.name>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Kirill A. Shutemov <kirill@shutemov.name>
Cc: William Kucharski <william.kucharski@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-01-04 02:28:34 +03:00
|
|
|
pte = pte_alloc_one_kernel(NULL);
|
2013-01-21 03:28:06 +04:00
|
|
|
if (!pte) {
|
|
|
|
kvm_err("Cannot allocate Hyp pte\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2018-06-27 17:51:05 +03:00
|
|
|
kvm_pmd_populate(pmd, pte);
|
2013-04-12 22:12:05 +04:00
|
|
|
get_page(virt_to_page(pmd));
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
next = pmd_addr_end(addr, end);
|
|
|
|
|
2013-04-12 22:12:01 +04:00
|
|
|
create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
|
|
|
|
pfn += (next - addr) >> PAGE_SHIFT;
|
2013-04-12 22:12:02 +04:00
|
|
|
} while (addr = next, addr != end);
|
2013-01-21 03:28:06 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-10-10 14:14:28 +04:00
|
|
|
static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
|
|
|
|
unsigned long end, unsigned long pfn,
|
|
|
|
pgprot_t prot)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
pmd_t *pmd;
|
|
|
|
unsigned long addr, next;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
addr = start;
|
|
|
|
do {
|
|
|
|
pud = pud_offset(pgd, addr);
|
|
|
|
|
|
|
|
if (pud_none_or_clear_bad(pud)) {
|
|
|
|
pmd = pmd_alloc_one(NULL, addr);
|
|
|
|
if (!pmd) {
|
|
|
|
kvm_err("Cannot allocate Hyp pmd\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2018-06-27 17:51:05 +03:00
|
|
|
kvm_pud_populate(pud, pmd);
|
2014-10-10 14:14:28 +04:00
|
|
|
get_page(virt_to_page(pud));
|
|
|
|
}
|
|
|
|
|
|
|
|
next = pud_addr_end(addr, end);
|
|
|
|
ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
pfn += (next - addr) >> PAGE_SHIFT;
|
|
|
|
} while (addr = next, addr != end);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-15 18:23:49 +03:00
|
|
|
static int __create_hyp_mappings(pgd_t *pgdp, unsigned long ptrs_per_pgd,
|
2013-04-12 22:12:01 +04:00
|
|
|
unsigned long start, unsigned long end,
|
|
|
|
unsigned long pfn, pgprot_t prot)
|
2013-01-21 03:28:06 +04:00
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
pud_t *pud;
|
|
|
|
unsigned long addr, next;
|
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
mutex_lock(&kvm_hyp_pgd_mutex);
|
2013-04-12 22:12:02 +04:00
|
|
|
addr = start & PAGE_MASK;
|
|
|
|
end = PAGE_ALIGN(end);
|
|
|
|
do {
|
2018-03-14 18:17:33 +03:00
|
|
|
pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
|
2013-01-21 03:28:06 +04:00
|
|
|
|
2014-10-10 14:14:28 +04:00
|
|
|
if (pgd_none(*pgd)) {
|
|
|
|
pud = pud_alloc_one(NULL, addr);
|
|
|
|
if (!pud) {
|
|
|
|
kvm_err("Cannot allocate Hyp pud\n");
|
2013-01-21 03:28:06 +04:00
|
|
|
err = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
2018-06-27 17:51:05 +03:00
|
|
|
kvm_pgd_populate(pgd, pud);
|
2014-10-10 14:14:28 +04:00
|
|
|
get_page(virt_to_page(pgd));
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
next = pgd_addr_end(addr, end);
|
2014-10-10 14:14:28 +04:00
|
|
|
err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
|
2013-01-21 03:28:06 +04:00
|
|
|
if (err)
|
|
|
|
goto out;
|
2013-04-12 22:12:01 +04:00
|
|
|
pfn += (next - addr) >> PAGE_SHIFT;
|
2013-04-12 22:12:02 +04:00
|
|
|
} while (addr = next, addr != end);
|
2013-01-21 03:28:06 +04:00
|
|
|
out:
|
|
|
|
mutex_unlock(&kvm_hyp_pgd_mutex);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2013-11-16 01:14:12 +04:00
|
|
|
static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
|
|
|
|
{
|
|
|
|
if (!is_vmalloc_addr(kaddr)) {
|
|
|
|
BUG_ON(!virt_addr_valid(kaddr));
|
|
|
|
return __pa(kaddr);
|
|
|
|
} else {
|
|
|
|
return page_to_phys(vmalloc_to_page(kaddr)) +
|
|
|
|
offset_in_page(kaddr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:06 +04:00
|
|
|
/**
|
2012-10-28 04:09:14 +04:00
|
|
|
* create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
|
2013-01-21 03:28:06 +04:00
|
|
|
* @from: The virtual kernel start address of the range
|
|
|
|
* @to: The virtual kernel end address of the range (exclusive)
|
2016-06-13 17:00:45 +03:00
|
|
|
* @prot: The protection to be applied to this range
|
2013-01-21 03:28:06 +04:00
|
|
|
*
|
2012-10-28 04:09:14 +04:00
|
|
|
* The same virtual address as the kernel virtual address is also used
|
|
|
|
* in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
|
|
|
|
* physical pages.
|
2013-01-21 03:28:06 +04:00
|
|
|
*/
|
2016-06-13 17:00:45 +03:00
|
|
|
int create_hyp_mappings(void *from, void *to, pgprot_t prot)
|
2013-01-21 03:28:06 +04:00
|
|
|
{
|
2013-11-16 01:14:12 +04:00
|
|
|
phys_addr_t phys_addr;
|
|
|
|
unsigned long virt_addr;
|
2016-06-30 20:40:51 +03:00
|
|
|
unsigned long start = kern_hyp_va((unsigned long)from);
|
|
|
|
unsigned long end = kern_hyp_va((unsigned long)to);
|
2013-04-12 22:12:01 +04:00
|
|
|
|
2015-01-29 14:59:54 +03:00
|
|
|
if (is_kernel_in_hyp_mode())
|
|
|
|
return 0;
|
|
|
|
|
2013-11-16 01:14:12 +04:00
|
|
|
start = start & PAGE_MASK;
|
|
|
|
end = PAGE_ALIGN(end);
|
2013-04-12 22:12:01 +04:00
|
|
|
|
2013-11-16 01:14:12 +04:00
|
|
|
for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
|
|
|
|
int err;
|
2013-04-12 22:12:01 +04:00
|
|
|
|
2013-11-16 01:14:12 +04:00
|
|
|
phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
|
2018-01-15 18:23:49 +03:00
|
|
|
err = __create_hyp_mappings(hyp_pgd, PTRS_PER_PGD,
|
|
|
|
virt_addr, virt_addr + PAGE_SIZE,
|
2013-11-16 01:14:12 +04:00
|
|
|
__phys_to_pfn(phys_addr),
|
2016-06-13 17:00:45 +03:00
|
|
|
prot);
|
2013-11-16 01:14:12 +04:00
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
2018-02-13 14:00:29 +03:00
|
|
|
static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size,
|
|
|
|
unsigned long *haddr, pgprot_t prot)
|
2013-01-21 03:28:06 +04:00
|
|
|
{
|
2017-12-04 20:04:38 +03:00
|
|
|
pgd_t *pgd = hyp_pgd;
|
|
|
|
unsigned long base;
|
|
|
|
int ret = 0;
|
2013-04-12 22:12:01 +04:00
|
|
|
|
2017-12-04 20:04:38 +03:00
|
|
|
mutex_lock(&kvm_hyp_pgd_mutex);
|
2013-04-12 22:12:01 +04:00
|
|
|
|
2017-12-04 20:04:38 +03:00
|
|
|
/*
|
|
|
|
* This assumes that we we have enough space below the idmap
|
|
|
|
* page to allocate our VAs. If not, the check below will
|
|
|
|
* kick. A potential alternative would be to detect that
|
|
|
|
* overflow and switch to an allocation above the idmap.
|
|
|
|
*
|
|
|
|
* The allocated size is always a multiple of PAGE_SIZE.
|
|
|
|
*/
|
|
|
|
size = PAGE_ALIGN(size + offset_in_page(phys_addr));
|
|
|
|
base = io_map_base - size;
|
2017-12-04 19:43:23 +03:00
|
|
|
|
2017-12-04 20:04:38 +03:00
|
|
|
/*
|
|
|
|
* Verify that BIT(VA_BITS - 1) hasn't been flipped by
|
|
|
|
* allocating the new area, as it would indicate we've
|
|
|
|
* overflowed the idmap/IO address range.
|
|
|
|
*/
|
|
|
|
if ((base ^ io_map_base) & BIT(VA_BITS - 1))
|
|
|
|
ret = -ENOMEM;
|
|
|
|
else
|
|
|
|
io_map_base = base;
|
|
|
|
|
|
|
|
mutex_unlock(&kvm_hyp_pgd_mutex);
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
if (__kvm_cpu_uses_extended_idmap())
|
|
|
|
pgd = boot_hyp_pgd;
|
|
|
|
|
|
|
|
ret = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
|
|
|
|
base, base + size,
|
2018-02-13 14:00:29 +03:00
|
|
|
__phys_to_pfn(phys_addr), prot);
|
2017-12-04 20:04:38 +03:00
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
2018-02-13 14:00:29 +03:00
|
|
|
*haddr = base + offset_in_page(phys_addr);
|
2017-12-04 20:04:38 +03:00
|
|
|
|
|
|
|
out:
|
2018-02-13 14:00:29 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* create_hyp_io_mappings - Map IO into both kernel and HYP
|
|
|
|
* @phys_addr: The physical start address which gets mapped
|
|
|
|
* @size: Size of the region being mapped
|
|
|
|
* @kaddr: Kernel VA for this mapping
|
|
|
|
* @haddr: HYP VA for this mapping
|
|
|
|
*/
|
|
|
|
int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size,
|
|
|
|
void __iomem **kaddr,
|
|
|
|
void __iomem **haddr)
|
|
|
|
{
|
|
|
|
unsigned long addr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
*kaddr = ioremap(phys_addr, size);
|
|
|
|
if (!*kaddr)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
if (is_kernel_in_hyp_mode()) {
|
|
|
|
*haddr = *kaddr;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = __create_hyp_private_mapping(phys_addr, size,
|
|
|
|
&addr, PAGE_HYP_DEVICE);
|
2017-12-04 19:43:23 +03:00
|
|
|
if (ret) {
|
|
|
|
iounmap(*kaddr);
|
|
|
|
*kaddr = NULL;
|
2018-02-13 14:00:29 +03:00
|
|
|
*haddr = NULL;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
*haddr = (void __iomem *)addr;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* create_hyp_exec_mappings - Map an executable range into HYP
|
|
|
|
* @phys_addr: The physical start address which gets mapped
|
|
|
|
* @size: Size of the region being mapped
|
|
|
|
* @haddr: HYP VA for this mapping
|
|
|
|
*/
|
|
|
|
int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,
|
|
|
|
void **haddr)
|
|
|
|
{
|
|
|
|
unsigned long addr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
BUG_ON(is_kernel_in_hyp_mode());
|
|
|
|
|
|
|
|
ret = __create_hyp_private_mapping(phys_addr, size,
|
|
|
|
&addr, PAGE_HYP_EXEC);
|
|
|
|
if (ret) {
|
|
|
|
*haddr = NULL;
|
2017-12-04 19:43:23 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-02-13 14:00:29 +03:00
|
|
|
*haddr = (void *)addr;
|
2017-12-04 19:43:23 +03:00
|
|
|
return 0;
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:07 +04:00
|
|
|
/**
|
|
|
|
* kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
|
|
|
|
* @kvm: The KVM struct pointer for the VM.
|
|
|
|
*
|
2019-03-25 11:02:05 +03:00
|
|
|
* Allocates only the stage-2 HW PGD level table(s) of size defined by
|
|
|
|
* stage2_pgd_size(kvm).
|
2013-01-21 03:28:07 +04:00
|
|
|
*
|
|
|
|
* Note we don't need locking here as this is only called when the VM is
|
|
|
|
* created, which can only be done once.
|
|
|
|
*/
|
|
|
|
int kvm_alloc_stage2_pgd(struct kvm *kvm)
|
|
|
|
{
|
2018-12-11 17:26:31 +03:00
|
|
|
phys_addr_t pgd_phys;
|
2013-01-21 03:28:07 +04:00
|
|
|
pgd_t *pgd;
|
|
|
|
|
|
|
|
if (kvm->arch.pgd != NULL) {
|
|
|
|
kvm_err("kvm_arch already initialized?\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-03-22 20:01:21 +03:00
|
|
|
/* Allocate the HW PGD, making sure that each page gets its own refcount */
|
2018-09-26 19:32:44 +03:00
|
|
|
pgd = alloc_pages_exact(stage2_pgd_size(kvm), GFP_KERNEL | __GFP_ZERO);
|
2016-03-22 20:01:21 +03:00
|
|
|
if (!pgd)
|
2015-03-10 22:06:59 +03:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2018-12-11 17:26:31 +03:00
|
|
|
pgd_phys = virt_to_phys(pgd);
|
|
|
|
if (WARN_ON(pgd_phys & ~kvm_vttbr_baddr_mask(kvm)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2013-01-21 03:28:07 +04:00
|
|
|
kvm->arch.pgd = pgd;
|
2018-12-11 17:26:31 +03:00
|
|
|
kvm->arch.pgd_phys = pgd_phys;
|
2013-01-21 03:28:07 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-11-27 12:35:03 +03:00
|
|
|
static void stage2_unmap_memslot(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot)
|
|
|
|
{
|
|
|
|
hva_t hva = memslot->userspace_addr;
|
|
|
|
phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
|
|
|
|
phys_addr_t size = PAGE_SIZE * memslot->npages;
|
|
|
|
hva_t reg_end = hva + size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A memory region could potentially cover multiple VMAs, and any holes
|
|
|
|
* between them, so iterate over all of them to find out if we should
|
|
|
|
* unmap any of them.
|
|
|
|
*
|
|
|
|
* +--------------------------------------------+
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | : VMA 1 | VMA 2 | | VMA 3 : |
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | memory region |
|
|
|
|
* +--------------------------------------------+
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
struct vm_area_struct *vma = find_vma(current->mm, hva);
|
|
|
|
hva_t vm_start, vm_end;
|
|
|
|
|
|
|
|
if (!vma || vma->vm_start >= reg_end)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Take the intersection of this VMA with the memory region
|
|
|
|
*/
|
|
|
|
vm_start = max(hva, vma->vm_start);
|
|
|
|
vm_end = min(reg_end, vma->vm_end);
|
|
|
|
|
|
|
|
if (!(vma->vm_flags & VM_PFNMAP)) {
|
|
|
|
gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
|
|
|
|
unmap_stage2_range(kvm, gpa, vm_end - vm_start);
|
|
|
|
}
|
|
|
|
hva = vm_end;
|
|
|
|
} while (hva < reg_end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_unmap_vm - Unmap Stage-2 RAM mappings
|
|
|
|
* @kvm: The struct kvm pointer
|
|
|
|
*
|
|
|
|
* Go through the memregions and unmap any reguler RAM
|
|
|
|
* backing memory already mapped to the VM.
|
|
|
|
*/
|
|
|
|
void stage2_unmap_vm(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
struct kvm_memslots *slots;
|
|
|
|
struct kvm_memory_slot *memslot;
|
|
|
|
int idx;
|
|
|
|
|
|
|
|
idx = srcu_read_lock(&kvm->srcu);
|
2017-03-16 21:20:49 +03:00
|
|
|
down_read(¤t->mm->mmap_sem);
|
2014-11-27 12:35:03 +03:00
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
|
|
|
|
slots = kvm_memslots(kvm);
|
|
|
|
kvm_for_each_memslot(memslot, slots)
|
|
|
|
stage2_unmap_memslot(kvm, memslot);
|
|
|
|
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
2017-03-16 21:20:49 +03:00
|
|
|
up_read(¤t->mm->mmap_sem);
|
2014-11-27 12:35:03 +03:00
|
|
|
srcu_read_unlock(&kvm->srcu, idx);
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:07 +04:00
|
|
|
/**
|
|
|
|
* kvm_free_stage2_pgd - free all stage-2 tables
|
|
|
|
* @kvm: The KVM struct pointer for the VM.
|
|
|
|
*
|
|
|
|
* Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
|
|
|
|
* underlying level-2 and level-3 tables before freeing the actual level-1 table
|
|
|
|
* and setting the struct pointer to NULL.
|
|
|
|
*/
|
|
|
|
void kvm_free_stage2_pgd(struct kvm *kvm)
|
|
|
|
{
|
2017-05-03 17:17:51 +03:00
|
|
|
void *pgd = NULL;
|
2013-01-21 03:28:07 +04:00
|
|
|
|
2017-04-03 17:12:43 +03:00
|
|
|
spin_lock(&kvm->mmu_lock);
|
2017-05-03 17:17:51 +03:00
|
|
|
if (kvm->arch.pgd) {
|
2018-09-26 19:32:44 +03:00
|
|
|
unmap_stage2_range(kvm, 0, kvm_phys_size(kvm));
|
2017-05-16 12:34:54 +03:00
|
|
|
pgd = READ_ONCE(kvm->arch.pgd);
|
2017-05-03 17:17:51 +03:00
|
|
|
kvm->arch.pgd = NULL;
|
2018-12-11 17:26:31 +03:00
|
|
|
kvm->arch.pgd_phys = 0;
|
2017-05-03 17:17:51 +03:00
|
|
|
}
|
2017-04-03 17:12:43 +03:00
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
|
2016-03-22 20:01:21 +03:00
|
|
|
/* Free the HW pgd, one page at a time */
|
2017-05-03 17:17:51 +03:00
|
|
|
if (pgd)
|
2018-09-26 19:32:44 +03:00
|
|
|
free_pages_exact(pgd, stage2_pgd_size(kvm));
|
2013-01-21 03:28:07 +04:00
|
|
|
}
|
|
|
|
|
2014-10-10 14:14:28 +04:00
|
|
|
static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
2012-11-01 20:14:45 +04:00
|
|
|
phys_addr_t addr)
|
2013-01-21 03:28:07 +04:00
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
pud_t *pud;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
|
|
|
|
if (stage2_pgd_none(kvm, *pgd)) {
|
2014-10-10 14:14:28 +04:00
|
|
|
if (!cache)
|
|
|
|
return NULL;
|
|
|
|
pud = mmu_memory_cache_alloc(cache);
|
2018-09-26 19:32:44 +03:00
|
|
|
stage2_pgd_populate(kvm, pgd, pud);
|
2014-10-10 14:14:28 +04:00
|
|
|
get_page(virt_to_page(pgd));
|
|
|
|
}
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
return stage2_pud_offset(kvm, pgd, addr);
|
2014-10-10 14:14:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
|
|
|
phys_addr_t addr)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
pmd_t *pmd;
|
|
|
|
|
|
|
|
pud = stage2_get_pud(kvm, cache, addr);
|
2018-12-11 20:10:41 +03:00
|
|
|
if (!pud || stage2_pud_huge(kvm, *pud))
|
2017-06-05 21:17:18 +03:00
|
|
|
return NULL;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
if (stage2_pud_none(kvm, *pud)) {
|
2013-01-21 03:28:07 +04:00
|
|
|
if (!cache)
|
2012-11-01 20:14:45 +04:00
|
|
|
return NULL;
|
2013-01-21 03:28:07 +04:00
|
|
|
pmd = mmu_memory_cache_alloc(cache);
|
2018-09-26 19:32:44 +03:00
|
|
|
stage2_pud_populate(kvm, pud, pmd);
|
2013-01-21 03:28:07 +04:00
|
|
|
get_page(virt_to_page(pud));
|
2012-10-15 14:27:37 +04:00
|
|
|
}
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
return stage2_pmd_offset(kvm, pud, addr);
|
2012-11-01 20:14:45 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
|
|
|
|
*cache, phys_addr_t addr, const pmd_t *new_pmd)
|
|
|
|
{
|
|
|
|
pmd_t *pmd, old_pmd;
|
|
|
|
|
2019-03-20 17:57:19 +03:00
|
|
|
retry:
|
2012-11-01 20:14:45 +04:00
|
|
|
pmd = stage2_get_pmd(kvm, cache, addr);
|
|
|
|
VM_BUG_ON(!pmd);
|
2013-01-21 03:28:07 +04:00
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
old_pmd = *pmd;
|
2019-03-20 17:57:19 +03:00
|
|
|
/*
|
|
|
|
* Multiple vcpus faulting on the same PMD entry, can
|
|
|
|
* lead to them sequentially updating the PMD with the
|
|
|
|
* same value. Following the break-before-make
|
|
|
|
* (pmd_clear() followed by tlb_flush()) process can
|
|
|
|
* hinder forward progress due to refaults generated
|
|
|
|
* on missing translations.
|
|
|
|
*
|
|
|
|
* Skip updating the page table if the entry is
|
|
|
|
* unchanged.
|
|
|
|
*/
|
|
|
|
if (pmd_val(old_pmd) == pmd_val(*new_pmd))
|
|
|
|
return 0;
|
|
|
|
|
2016-04-28 18:16:31 +03:00
|
|
|
if (pmd_present(old_pmd)) {
|
2018-08-13 13:43:50 +03:00
|
|
|
/*
|
2019-03-20 17:57:19 +03:00
|
|
|
* If we already have PTE level mapping for this block,
|
|
|
|
* we must unmap it to avoid inconsistent TLB state and
|
|
|
|
* leaking the table page. We could end up in this situation
|
|
|
|
* if the memory slot was marked for dirty logging and was
|
|
|
|
* reverted, leaving PTE level mappings for the pages accessed
|
|
|
|
* during the period. So, unmap the PTE level mapping for this
|
|
|
|
* block and retry, as we could have released the upper level
|
|
|
|
* table in the process.
|
2018-08-13 13:43:50 +03:00
|
|
|
*
|
2019-03-20 17:57:19 +03:00
|
|
|
* Normal THP split/merge follows mmu_notifier callbacks and do
|
|
|
|
* get handled accordingly.
|
2018-08-13 13:43:50 +03:00
|
|
|
*/
|
2019-03-20 17:57:19 +03:00
|
|
|
if (!pmd_thp_or_huge(old_pmd)) {
|
|
|
|
unmap_stage2_range(kvm, addr & S2_PMD_MASK, S2_PMD_SIZE);
|
|
|
|
goto retry;
|
|
|
|
}
|
2018-08-13 13:43:50 +03:00
|
|
|
/*
|
|
|
|
* Mapping in huge pages should only happen through a
|
|
|
|
* fault. If a page is merged into a transparent huge
|
|
|
|
* page, the individual subpages of that huge page
|
|
|
|
* should be unmapped through MMU notifiers before we
|
|
|
|
* get here.
|
|
|
|
*
|
|
|
|
* Merging of CompoundPages is not supported; they
|
|
|
|
* should become splitting first, unmapped, merged,
|
|
|
|
* and mapped back in on-demand.
|
|
|
|
*/
|
2019-03-20 17:57:19 +03:00
|
|
|
WARN_ON_ONCE(pmd_pfn(old_pmd) != pmd_pfn(*new_pmd));
|
2016-04-28 18:16:31 +03:00
|
|
|
pmd_clear(pmd);
|
2012-11-01 20:14:45 +04:00
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2016-04-28 18:16:31 +03:00
|
|
|
} else {
|
2012-11-01 20:14:45 +04:00
|
|
|
get_page(virt_to_page(pmd));
|
2016-04-28 18:16:31 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
kvm_set_pmd(pmd, *new_pmd);
|
2012-11-01 20:14:45 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-12-11 20:10:41 +03:00
|
|
|
static int stage2_set_pud_huge(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
|
|
|
phys_addr_t addr, const pud_t *new_pudp)
|
|
|
|
{
|
|
|
|
pud_t *pudp, old_pud;
|
|
|
|
|
2019-03-20 17:57:19 +03:00
|
|
|
retry:
|
2018-12-11 20:10:41 +03:00
|
|
|
pudp = stage2_get_pud(kvm, cache, addr);
|
|
|
|
VM_BUG_ON(!pudp);
|
|
|
|
|
|
|
|
old_pud = *pudp;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A large number of vcpus faulting on the same stage 2 entry,
|
2019-03-20 17:57:19 +03:00
|
|
|
* can lead to a refault due to the stage2_pud_clear()/tlb_flush().
|
|
|
|
* Skip updating the page tables if there is no change.
|
2018-12-11 20:10:41 +03:00
|
|
|
*/
|
|
|
|
if (pud_val(old_pud) == pud_val(*new_pudp))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (stage2_pud_present(kvm, old_pud)) {
|
2019-03-20 17:57:19 +03:00
|
|
|
/*
|
|
|
|
* If we already have table level mapping for this block, unmap
|
|
|
|
* the range for this block and retry.
|
|
|
|
*/
|
|
|
|
if (!stage2_pud_huge(kvm, old_pud)) {
|
|
|
|
unmap_stage2_range(kvm, addr & S2_PUD_MASK, S2_PUD_SIZE);
|
|
|
|
goto retry;
|
|
|
|
}
|
|
|
|
|
|
|
|
WARN_ON_ONCE(kvm_pud_pfn(old_pud) != kvm_pud_pfn(*new_pudp));
|
2018-12-11 20:10:41 +03:00
|
|
|
stage2_pud_clear(kvm, pudp);
|
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
|
|
|
} else {
|
|
|
|
get_page(virt_to_page(pudp));
|
|
|
|
}
|
|
|
|
|
|
|
|
kvm_set_pud(pudp, *new_pudp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-12-11 20:10:38 +03:00
|
|
|
/*
|
|
|
|
* stage2_get_leaf_entry - walk the stage2 VM page tables and return
|
|
|
|
* true if a valid and present leaf-entry is found. A pointer to the
|
|
|
|
* leaf-entry is returned in the appropriate level variable - pudpp,
|
|
|
|
* pmdpp, ptepp.
|
|
|
|
*/
|
|
|
|
static bool stage2_get_leaf_entry(struct kvm *kvm, phys_addr_t addr,
|
|
|
|
pud_t **pudpp, pmd_t **pmdpp, pte_t **ptepp)
|
2017-10-23 19:11:21 +03:00
|
|
|
{
|
2018-12-11 20:10:38 +03:00
|
|
|
pud_t *pudp;
|
2017-10-23 19:11:21 +03:00
|
|
|
pmd_t *pmdp;
|
|
|
|
pte_t *ptep;
|
|
|
|
|
2018-12-11 20:10:38 +03:00
|
|
|
*pudpp = NULL;
|
|
|
|
*pmdpp = NULL;
|
|
|
|
*ptepp = NULL;
|
|
|
|
|
|
|
|
pudp = stage2_get_pud(kvm, NULL, addr);
|
|
|
|
if (!pudp || stage2_pud_none(kvm, *pudp) || !stage2_pud_present(kvm, *pudp))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (stage2_pud_huge(kvm, *pudp)) {
|
|
|
|
*pudpp = pudp;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
pmdp = stage2_pmd_offset(kvm, pudp, addr);
|
2017-10-23 19:11:21 +03:00
|
|
|
if (!pmdp || pmd_none(*pmdp) || !pmd_present(*pmdp))
|
|
|
|
return false;
|
|
|
|
|
2018-12-11 20:10:38 +03:00
|
|
|
if (pmd_thp_or_huge(*pmdp)) {
|
|
|
|
*pmdpp = pmdp;
|
|
|
|
return true;
|
|
|
|
}
|
2017-10-23 19:11:21 +03:00
|
|
|
|
|
|
|
ptep = pte_offset_kernel(pmdp, addr);
|
|
|
|
if (!ptep || pte_none(*ptep) || !pte_present(*ptep))
|
|
|
|
return false;
|
|
|
|
|
2018-12-11 20:10:38 +03:00
|
|
|
*ptepp = ptep;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr)
|
|
|
|
{
|
|
|
|
pud_t *pudp;
|
|
|
|
pmd_t *pmdp;
|
|
|
|
pte_t *ptep;
|
|
|
|
bool found;
|
|
|
|
|
|
|
|
found = stage2_get_leaf_entry(kvm, addr, &pudp, &pmdp, &ptep);
|
|
|
|
if (!found)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (pudp)
|
|
|
|
return kvm_s2pud_exec(pudp);
|
|
|
|
else if (pmdp)
|
|
|
|
return kvm_s2pmd_exec(pmdp);
|
|
|
|
else
|
|
|
|
return kvm_s2pte_exec(ptep);
|
2017-10-23 19:11:21 +03:00
|
|
|
}
|
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
2015-01-16 02:58:58 +03:00
|
|
|
phys_addr_t addr, const pte_t *new_pte,
|
|
|
|
unsigned long flags)
|
2012-11-01 20:14:45 +04:00
|
|
|
{
|
2018-12-11 20:10:41 +03:00
|
|
|
pud_t *pud;
|
2012-11-01 20:14:45 +04:00
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte, old_pte;
|
2015-01-16 02:58:58 +03:00
|
|
|
bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
|
|
|
|
bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
|
|
|
|
|
|
|
|
VM_BUG_ON(logging_active && !cache);
|
2012-11-01 20:14:45 +04:00
|
|
|
|
2014-10-10 14:14:28 +04:00
|
|
|
/* Create stage-2 page table mapping - Levels 0 and 1 */
|
2018-12-11 20:10:41 +03:00
|
|
|
pud = stage2_get_pud(kvm, cache, addr);
|
|
|
|
if (!pud) {
|
|
|
|
/*
|
|
|
|
* Ignore calls from kvm_set_spte_hva for unallocated
|
|
|
|
* address ranges.
|
|
|
|
*/
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* While dirty page logging - dissolve huge PUD, then continue
|
|
|
|
* on to allocate page.
|
|
|
|
*/
|
|
|
|
if (logging_active)
|
|
|
|
stage2_dissolve_pud(kvm, addr, pud);
|
|
|
|
|
|
|
|
if (stage2_pud_none(kvm, *pud)) {
|
|
|
|
if (!cache)
|
|
|
|
return 0; /* ignore calls from kvm_set_spte_hva */
|
|
|
|
pmd = mmu_memory_cache_alloc(cache);
|
|
|
|
stage2_pud_populate(kvm, pud, pmd);
|
|
|
|
get_page(virt_to_page(pud));
|
|
|
|
}
|
|
|
|
|
|
|
|
pmd = stage2_pmd_offset(kvm, pud, addr);
|
2012-11-01 20:14:45 +04:00
|
|
|
if (!pmd) {
|
|
|
|
/*
|
|
|
|
* Ignore calls from kvm_set_spte_hva for unallocated
|
|
|
|
* address ranges.
|
|
|
|
*/
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-01-16 02:58:58 +03:00
|
|
|
/*
|
|
|
|
* While dirty page logging - dissolve huge PMD, then continue on to
|
|
|
|
* allocate page.
|
|
|
|
*/
|
|
|
|
if (logging_active)
|
|
|
|
stage2_dissolve_pmd(kvm, addr, pmd);
|
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
/* Create stage-2 page mappings - Level 2 */
|
2013-01-21 03:28:07 +04:00
|
|
|
if (pmd_none(*pmd)) {
|
|
|
|
if (!cache)
|
|
|
|
return 0; /* ignore calls from kvm_set_spte_hva */
|
|
|
|
pte = mmu_memory_cache_alloc(cache);
|
2018-06-27 17:51:05 +03:00
|
|
|
kvm_pmd_populate(pmd, pte);
|
2013-01-21 03:28:07 +04:00
|
|
|
get_page(virt_to_page(pmd));
|
2012-10-15 14:27:37 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
2013-01-21 03:28:07 +04:00
|
|
|
|
|
|
|
if (iomap && pte_present(*pte))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
/* Create 2nd stage page table mapping - Level 3 */
|
|
|
|
old_pte = *pte;
|
2016-04-28 18:16:31 +03:00
|
|
|
if (pte_present(old_pte)) {
|
2018-08-13 13:43:51 +03:00
|
|
|
/* Skip page table update if there is no change */
|
|
|
|
if (pte_val(old_pte) == pte_val(*new_pte))
|
|
|
|
return 0;
|
|
|
|
|
2016-04-28 18:16:31 +03:00
|
|
|
kvm_set_pte(pte, __pte(0));
|
2013-01-28 19:27:00 +04:00
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2016-04-28 18:16:31 +03:00
|
|
|
} else {
|
2013-01-21 03:28:07 +04:00
|
|
|
get_page(virt_to_page(pte));
|
2016-04-28 18:16:31 +03:00
|
|
|
}
|
2013-01-21 03:28:07 +04:00
|
|
|
|
2016-04-28 18:16:31 +03:00
|
|
|
kvm_set_pte(pte, *new_pte);
|
2013-01-21 03:28:07 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-04-13 19:57:37 +03:00
|
|
|
#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
|
|
|
|
static int stage2_ptep_test_and_clear_young(pte_t *pte)
|
|
|
|
{
|
|
|
|
if (pte_young(*pte)) {
|
|
|
|
*pte = pte_mkold(*pte);
|
|
|
|
return 1;
|
|
|
|
}
|
2013-01-21 03:28:07 +04:00
|
|
|
return 0;
|
|
|
|
}
|
2016-04-13 19:57:37 +03:00
|
|
|
#else
|
|
|
|
static int stage2_ptep_test_and_clear_young(pte_t *pte)
|
|
|
|
{
|
|
|
|
return __ptep_test_and_clear_young(pte);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
|
|
|
|
{
|
|
|
|
return stage2_ptep_test_and_clear_young((pte_t *)pmd);
|
|
|
|
}
|
2013-01-21 03:28:07 +04:00
|
|
|
|
2018-12-11 20:10:40 +03:00
|
|
|
static int stage2_pudp_test_and_clear_young(pud_t *pud)
|
|
|
|
{
|
|
|
|
return stage2_ptep_test_and_clear_young((pte_t *)pud);
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:07 +04:00
|
|
|
/**
|
|
|
|
* kvm_phys_addr_ioremap - map a device range to guest IPA
|
|
|
|
*
|
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @guest_ipa: The IPA at which to insert the mapping
|
|
|
|
* @pa: The physical address of the device
|
|
|
|
* @size: The size of the mapping
|
|
|
|
*/
|
|
|
|
int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
|
2014-09-18 01:56:18 +04:00
|
|
|
phys_addr_t pa, unsigned long size, bool writable)
|
2013-01-21 03:28:07 +04:00
|
|
|
{
|
|
|
|
phys_addr_t addr, end;
|
|
|
|
int ret = 0;
|
|
|
|
unsigned long pfn;
|
|
|
|
struct kvm_mmu_memory_cache cache = { 0, };
|
|
|
|
|
|
|
|
end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
|
|
|
|
pfn = __phys_to_pfn(pa);
|
|
|
|
|
|
|
|
for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
|
2018-12-11 20:10:36 +03:00
|
|
|
pte_t pte = kvm_pfn_pte(pfn, PAGE_S2_DEVICE);
|
2013-01-21 03:28:07 +04:00
|
|
|
|
2014-09-18 01:56:18 +04:00
|
|
|
if (writable)
|
2016-04-13 19:57:37 +03:00
|
|
|
pte = kvm_s2pte_mkwrite(pte);
|
2014-09-18 01:56:18 +04:00
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
ret = mmu_topup_memory_cache(&cache,
|
|
|
|
kvm_mmu_cache_min_pages(kvm),
|
|
|
|
KVM_NR_MEM_OBJS);
|
2013-01-21 03:28:07 +04:00
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
2015-01-16 02:58:58 +03:00
|
|
|
ret = stage2_set_pte(kvm, &cache, addr, &pte,
|
|
|
|
KVM_S2PTE_FLAG_IS_IOMAP);
|
2013-01-21 03:28:07 +04:00
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
pfn++;
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
mmu_free_memory_cache(&cache);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
kvm: rename pfn_t to kvm_pfn_t
To date, we have implemented two I/O usage models for persistent memory,
PMEM (a persistent "ram disk") and DAX (mmap persistent memory into
userspace). This series adds a third, DAX-GUP, that allows DAX mappings
to be the target of direct-i/o. It allows userspace to coordinate
DMA/RDMA from/to persistent memory.
The implementation leverages the ZONE_DEVICE mm-zone that went into
4.3-rc1 (also discussed at kernel summit) to flag pages that are owned
and dynamically mapped by a device driver. The pmem driver, after
mapping a persistent memory range into the system memmap via
devm_memremap_pages(), arranges for DAX to distinguish pfn-only versus
page-backed pmem-pfns via flags in the new pfn_t type.
The DAX code, upon seeing a PFN_DEV+PFN_MAP flagged pfn, flags the
resulting pte(s) inserted into the process page tables with a new
_PAGE_DEVMAP flag. Later, when get_user_pages() is walking ptes it keys
off _PAGE_DEVMAP to pin the device hosting the page range active.
Finally, get_page() and put_page() are modified to take references
against the device driver established page mapping.
Finally, this need for "struct page" for persistent memory requires
memory capacity to store the memmap array. Given the memmap array for a
large pool of persistent may exhaust available DRAM introduce a
mechanism to allocate the memmap from persistent memory. The new
"struct vmem_altmap *" parameter to devm_memremap_pages() enables
arch_add_memory() to use reserved pmem capacity rather than the page
allocator.
This patch (of 18):
The core has developed a need for a "pfn_t" type [1]. Move the existing
pfn_t in KVM to kvm_pfn_t [2].
[1]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002199.html
[2]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002218.html
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-01-16 03:56:11 +03:00
|
|
|
static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
|
2013-10-03 02:32:01 +04:00
|
|
|
{
|
kvm: rename pfn_t to kvm_pfn_t
To date, we have implemented two I/O usage models for persistent memory,
PMEM (a persistent "ram disk") and DAX (mmap persistent memory into
userspace). This series adds a third, DAX-GUP, that allows DAX mappings
to be the target of direct-i/o. It allows userspace to coordinate
DMA/RDMA from/to persistent memory.
The implementation leverages the ZONE_DEVICE mm-zone that went into
4.3-rc1 (also discussed at kernel summit) to flag pages that are owned
and dynamically mapped by a device driver. The pmem driver, after
mapping a persistent memory range into the system memmap via
devm_memremap_pages(), arranges for DAX to distinguish pfn-only versus
page-backed pmem-pfns via flags in the new pfn_t type.
The DAX code, upon seeing a PFN_DEV+PFN_MAP flagged pfn, flags the
resulting pte(s) inserted into the process page tables with a new
_PAGE_DEVMAP flag. Later, when get_user_pages() is walking ptes it keys
off _PAGE_DEVMAP to pin the device hosting the page range active.
Finally, get_page() and put_page() are modified to take references
against the device driver established page mapping.
Finally, this need for "struct page" for persistent memory requires
memory capacity to store the memmap array. Given the memmap array for a
large pool of persistent may exhaust available DRAM introduce a
mechanism to allocate the memmap from persistent memory. The new
"struct vmem_altmap *" parameter to devm_memremap_pages() enables
arch_add_memory() to use reserved pmem capacity rather than the page
allocator.
This patch (of 18):
The core has developed a need for a "pfn_t" type [1]. Move the existing
pfn_t in KVM to kvm_pfn_t [2].
[1]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002199.html
[2]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002218.html
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-01-16 03:56:11 +03:00
|
|
|
kvm_pfn_t pfn = *pfnp;
|
2013-10-03 02:32:01 +04:00
|
|
|
gfn_t gfn = *ipap >> PAGE_SHIFT;
|
2018-10-01 18:54:35 +03:00
|
|
|
struct page *page = pfn_to_page(pfn);
|
2013-10-03 02:32:01 +04:00
|
|
|
|
2018-10-01 18:54:35 +03:00
|
|
|
/*
|
2018-11-06 15:33:38 +03:00
|
|
|
* PageTransCompoundMap() returns true for THP and
|
2018-10-01 18:54:35 +03:00
|
|
|
* hugetlbfs. Make sure the adjustment is done only for THP
|
|
|
|
* pages.
|
|
|
|
*/
|
|
|
|
if (!PageHuge(page) && PageTransCompoundMap(page)) {
|
2013-10-03 02:32:01 +04:00
|
|
|
unsigned long mask;
|
|
|
|
/*
|
|
|
|
* The address we faulted on is backed by a transparent huge
|
|
|
|
* page. However, because we map the compound huge page and
|
|
|
|
* not the individual tail page, we need to transfer the
|
|
|
|
* refcount to the head page. We have to be careful that the
|
|
|
|
* THP doesn't start to split while we are adjusting the
|
|
|
|
* refcounts.
|
|
|
|
*
|
|
|
|
* We are sure this doesn't happen, because mmu_notifier_retry
|
|
|
|
* was successful and we are holding the mmu_lock, so if this
|
|
|
|
* THP is trying to split, it will be blocked in the mmu
|
|
|
|
* notifier before touching any of the pages, specifically
|
|
|
|
* before being able to call __split_huge_page_refcount().
|
|
|
|
*
|
|
|
|
* We can therefore safely transfer the refcount from PG_tail
|
|
|
|
* to PG_head and switch the pfn from a tail page to the head
|
|
|
|
* page accordingly.
|
|
|
|
*/
|
|
|
|
mask = PTRS_PER_PMD - 1;
|
|
|
|
VM_BUG_ON((gfn & mask) != (pfn & mask));
|
|
|
|
if (pfn & mask) {
|
|
|
|
*ipap &= PMD_MASK;
|
|
|
|
kvm_release_pfn_clean(pfn);
|
|
|
|
pfn &= ~mask;
|
|
|
|
kvm_get_pfn(pfn);
|
|
|
|
*pfnp = pfn;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-01-16 02:58:56 +03:00
|
|
|
/**
|
|
|
|
* stage2_wp_ptes - write protect PMD range
|
|
|
|
* @pmd: pointer to pmd entry
|
|
|
|
* @addr: range start address
|
|
|
|
* @end: range end address
|
|
|
|
*/
|
|
|
|
static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
|
|
|
do {
|
|
|
|
if (!pte_none(*pte)) {
|
|
|
|
if (!kvm_s2pte_readonly(pte))
|
|
|
|
kvm_set_s2pte_readonly(pte);
|
|
|
|
}
|
|
|
|
} while (pte++, addr += PAGE_SIZE, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_wp_pmds - write protect PUD range
|
2018-09-26 19:32:44 +03:00
|
|
|
* kvm: kvm instance for the VM
|
2015-01-16 02:58:56 +03:00
|
|
|
* @pud: pointer to pud entry
|
|
|
|
* @addr: range start address
|
|
|
|
* @end: range end address
|
|
|
|
*/
|
2018-09-26 19:32:44 +03:00
|
|
|
static void stage2_wp_pmds(struct kvm *kvm, pud_t *pud,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
2015-01-16 02:58:56 +03:00
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pmd = stage2_pmd_offset(kvm, pud, addr);
|
2015-01-16 02:58:56 +03:00
|
|
|
|
|
|
|
do {
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pmd_addr_end(kvm, addr, end);
|
2015-01-16 02:58:56 +03:00
|
|
|
if (!pmd_none(*pmd)) {
|
2016-03-01 15:00:39 +03:00
|
|
|
if (pmd_thp_or_huge(*pmd)) {
|
2015-01-16 02:58:56 +03:00
|
|
|
if (!kvm_s2pmd_readonly(pmd))
|
|
|
|
kvm_set_s2pmd_readonly(pmd);
|
|
|
|
} else {
|
|
|
|
stage2_wp_ptes(pmd, addr, next);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} while (pmd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2019-03-25 11:02:05 +03:00
|
|
|
* stage2_wp_puds - write protect PGD range
|
|
|
|
* @pgd: pointer to pgd entry
|
|
|
|
* @addr: range start address
|
|
|
|
* @end: range end address
|
|
|
|
*/
|
2018-09-26 19:32:44 +03:00
|
|
|
static void stage2_wp_puds(struct kvm *kvm, pgd_t *pgd,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
2015-01-16 02:58:56 +03:00
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pud = stage2_pud_offset(kvm, pgd, addr);
|
2015-01-16 02:58:56 +03:00
|
|
|
do {
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pud_addr_end(kvm, addr, end);
|
|
|
|
if (!stage2_pud_none(kvm, *pud)) {
|
2018-12-11 20:10:37 +03:00
|
|
|
if (stage2_pud_huge(kvm, *pud)) {
|
|
|
|
if (!kvm_s2pud_readonly(pud))
|
|
|
|
kvm_set_s2pud_readonly(pud);
|
|
|
|
} else {
|
|
|
|
stage2_wp_pmds(kvm, pud, addr, next);
|
|
|
|
}
|
2015-01-16 02:58:56 +03:00
|
|
|
}
|
|
|
|
} while (pud++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_wp_range() - write protect stage2 memory region range
|
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @addr: Start address of range
|
|
|
|
* @end: End address of range
|
|
|
|
*/
|
|
|
|
static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2018-09-26 19:32:44 +03:00
|
|
|
pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
|
2015-01-16 02:58:56 +03:00
|
|
|
do {
|
|
|
|
/*
|
|
|
|
* Release kvm_mmu_lock periodically if the memory region is
|
|
|
|
* large. Otherwise, we may see kernel panics with
|
2015-01-23 12:49:31 +03:00
|
|
|
* CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
|
|
|
|
* CONFIG_LOCKDEP. Additionally, holding the lock too long
|
2017-05-16 12:34:55 +03:00
|
|
|
* will also starve other vCPUs. We have to also make sure
|
|
|
|
* that the page tables are not freed while we released
|
|
|
|
* the lock.
|
2015-01-16 02:58:56 +03:00
|
|
|
*/
|
2017-05-16 12:34:55 +03:00
|
|
|
cond_resched_lock(&kvm->mmu_lock);
|
|
|
|
if (!READ_ONCE(kvm->arch.pgd))
|
|
|
|
break;
|
2018-09-26 19:32:44 +03:00
|
|
|
next = stage2_pgd_addr_end(kvm, addr, end);
|
|
|
|
if (stage2_pgd_present(kvm, *pgd))
|
|
|
|
stage2_wp_puds(kvm, pgd, addr, next);
|
2015-01-16 02:58:56 +03:00
|
|
|
} while (pgd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
|
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @slot: The memory slot to write protect
|
|
|
|
*
|
|
|
|
* Called to start logging dirty pages after memory region
|
|
|
|
* KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
|
2018-12-11 20:10:37 +03:00
|
|
|
* all present PUD, PMD and PTEs are write protected in the memory region.
|
2015-01-16 02:58:56 +03:00
|
|
|
* Afterwards read of dirty page log can be called.
|
|
|
|
*
|
|
|
|
* Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
|
|
|
|
* serializing operations for VM memory regions.
|
|
|
|
*/
|
|
|
|
void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
|
|
|
|
{
|
2015-05-17 17:20:07 +03:00
|
|
|
struct kvm_memslots *slots = kvm_memslots(kvm);
|
|
|
|
struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
|
2015-01-16 02:58:56 +03:00
|
|
|
phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
|
|
|
|
phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
|
|
|
|
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
stage2_wp_range(kvm, start, end);
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
kvm_flush_remote_tlbs(kvm);
|
|
|
|
}
|
2015-01-16 02:58:57 +03:00
|
|
|
|
|
|
|
/**
|
2015-01-28 05:54:23 +03:00
|
|
|
* kvm_mmu_write_protect_pt_masked() - write protect dirty pages
|
2015-01-16 02:58:57 +03:00
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @slot: The memory slot associated with mask
|
|
|
|
* @gfn_offset: The gfn offset in memory slot
|
|
|
|
* @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
|
|
|
|
* slot to be write protected
|
|
|
|
*
|
|
|
|
* Walks bits set in mask write protects the associated pte's. Caller must
|
|
|
|
* acquire kvm_mmu_lock.
|
|
|
|
*/
|
2015-01-28 05:54:23 +03:00
|
|
|
static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
|
2015-01-16 02:58:57 +03:00
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t gfn_offset, unsigned long mask)
|
|
|
|
{
|
|
|
|
phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
|
|
|
|
phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
|
|
|
|
phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
|
|
|
|
|
|
|
|
stage2_wp_range(kvm, start, end);
|
|
|
|
}
|
2015-01-16 02:58:56 +03:00
|
|
|
|
2015-01-28 05:54:23 +03:00
|
|
|
/*
|
|
|
|
* kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
|
|
|
|
* dirty pages.
|
|
|
|
*
|
|
|
|
* It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
|
|
|
|
* enable dirty logging for them.
|
|
|
|
*/
|
|
|
|
void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t gfn_offset, unsigned long mask)
|
|
|
|
{
|
|
|
|
kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
|
|
|
|
}
|
|
|
|
|
2017-10-23 19:11:22 +03:00
|
|
|
static void clean_dcache_guest_page(kvm_pfn_t pfn, unsigned long size)
|
arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault
When handling a fault in stage-2, we need to resync I$ and D$, just
to be sure we don't leave any old cache line behind.
That's very good, except that we do so using the *user* address.
Under heavy load (swapping like crazy), we may end up in a situation
where the page gets mapped in stage-2 while being unmapped from
userspace by another CPU.
At that point, the DC/IC instructions can generate a fault, which
we handle with kvm->mmu_lock held. The box quickly deadlocks, user
is unhappy.
Instead, perform this invalidation through the kernel mapping,
which is guaranteed to be present. The box is much happier, and so
am I.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-01-06 00:13:24 +03:00
|
|
|
{
|
2017-10-23 19:11:22 +03:00
|
|
|
__clean_dcache_guest_page(pfn, size);
|
2017-10-23 19:11:15 +03:00
|
|
|
}
|
|
|
|
|
2017-10-23 19:11:22 +03:00
|
|
|
static void invalidate_icache_guest_page(kvm_pfn_t pfn, unsigned long size)
|
2017-10-23 19:11:15 +03:00
|
|
|
{
|
2017-10-23 19:11:22 +03:00
|
|
|
__invalidate_icache_guest_page(pfn, size);
|
arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault
When handling a fault in stage-2, we need to resync I$ and D$, just
to be sure we don't leave any old cache line behind.
That's very good, except that we do so using the *user* address.
Under heavy load (swapping like crazy), we may end up in a situation
where the page gets mapped in stage-2 while being unmapped from
userspace by another CPU.
At that point, the DC/IC instructions can generate a fault, which
we handle with kvm->mmu_lock held. The box quickly deadlocks, user
is unhappy.
Instead, perform this invalidation through the kernel mapping,
which is guaranteed to be present. The box is much happier, and so
am I.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-01-06 00:13:24 +03:00
|
|
|
}
|
|
|
|
|
2017-06-20 19:11:48 +03:00
|
|
|
static void kvm_send_hwpoison_signal(unsigned long address,
|
|
|
|
struct vm_area_struct *vma)
|
|
|
|
{
|
2018-04-16 21:39:10 +03:00
|
|
|
short lsb;
|
2017-06-20 19:11:48 +03:00
|
|
|
|
|
|
|
if (is_vm_hugetlb_page(vma))
|
2018-04-16 21:39:10 +03:00
|
|
|
lsb = huge_page_shift(hstate_vma(vma));
|
2017-06-20 19:11:48 +03:00
|
|
|
else
|
2018-04-16 21:39:10 +03:00
|
|
|
lsb = PAGE_SHIFT;
|
2017-06-20 19:11:48 +03:00
|
|
|
|
2018-04-16 21:39:10 +03:00
|
|
|
send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, lsb, current);
|
2017-06-20 19:11:48 +03:00
|
|
|
}
|
|
|
|
|
2019-03-12 12:52:51 +03:00
|
|
|
static bool fault_supports_stage2_huge_mapping(struct kvm_memory_slot *memslot,
|
|
|
|
unsigned long hva,
|
|
|
|
unsigned long map_size)
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
{
|
2019-02-19 12:22:21 +03:00
|
|
|
gpa_t gpa_start;
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
hva_t uaddr_start, uaddr_end;
|
|
|
|
size_t size;
|
|
|
|
|
|
|
|
size = memslot->npages * PAGE_SIZE;
|
|
|
|
|
|
|
|
gpa_start = memslot->base_gfn << PAGE_SHIFT;
|
|
|
|
|
|
|
|
uaddr_start = memslot->userspace_addr;
|
|
|
|
uaddr_end = uaddr_start + size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Pages belonging to memslots that don't have the same alignment
|
2019-03-12 12:52:51 +03:00
|
|
|
* within a PMD/PUD for userspace and IPA cannot be mapped with stage-2
|
|
|
|
* PMD/PUD entries, because we'll end up mapping the wrong pages.
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
*
|
|
|
|
* Consider a layout like the following:
|
|
|
|
*
|
|
|
|
* memslot->userspace_addr:
|
|
|
|
* +-----+--------------------+--------------------+---+
|
2019-03-12 12:52:51 +03:00
|
|
|
* |abcde|fgh Stage-1 block | Stage-1 block tv|xyz|
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
* +-----+--------------------+--------------------+---+
|
|
|
|
*
|
|
|
|
* memslot->base_gfn << PAGE_SIZE:
|
|
|
|
* +---+--------------------+--------------------+-----+
|
2019-03-12 12:52:51 +03:00
|
|
|
* |abc|def Stage-2 block | Stage-2 block |tvxyz|
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
* +---+--------------------+--------------------+-----+
|
|
|
|
*
|
2019-03-12 12:52:51 +03:00
|
|
|
* If we create those stage-2 blocks, we'll end up with this incorrect
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
* mapping:
|
|
|
|
* d -> f
|
|
|
|
* e -> g
|
|
|
|
* f -> h
|
|
|
|
*/
|
2019-03-12 12:52:51 +03:00
|
|
|
if ((gpa_start & (map_size - 1)) != (uaddr_start & (map_size - 1)))
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
return false;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Next, let's make sure we're not trying to map anything not covered
|
2019-03-12 12:52:51 +03:00
|
|
|
* by the memslot. This means we have to prohibit block size mappings
|
|
|
|
* for the beginning and end of a non-block aligned and non-block sized
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
* memory slot (illustrated by the head and tail parts of the
|
|
|
|
* userspace view above containing pages 'abcde' and 'xyz',
|
|
|
|
* respectively).
|
|
|
|
*
|
|
|
|
* Note that it doesn't matter if we do the check using the
|
|
|
|
* userspace_addr or the base_gfn, as both are equally aligned (per
|
|
|
|
* the check above) and equally sized.
|
|
|
|
*/
|
2019-03-12 12:52:51 +03:00
|
|
|
return (hva & ~(map_size - 1)) >= uaddr_start &&
|
|
|
|
(hva & ~(map_size - 1)) + map_size <= uaddr_end;
|
KVM: arm/arm64: Fix unintended stage 2 PMD mappings
There are two things we need to take care of when we create block
mappings in the stage 2 page tables:
(1) The alignment within a PMD between the host address range and the
guest IPA range must be the same, since otherwise we end up mapping
pages with the wrong offset.
(2) The head and tail of a memory slot may not cover a full block
size, and we have to take care to not map those with block
descriptors, since we could expose memory to the guest that the host
did not intend to expose.
So far, we have been taking care of (1), but not (2), and our commentary
describing (1) was somewhat confusing.
This commit attempts to factor out the checks of both into a common
function, and if we don't pass the check, we won't attempt any PMD
mappings for neither hugetlbfs nor THP.
Note that we used to only check the alignment for THP, not for
hugetlbfs, but as far as I can tell the check needs to be applied to
both scenarios.
Cc: Ralph Palutke <ralph.palutke@fau.de>
Cc: Lukas Braun <koomi@moshbit.net>
Reported-by: Lukas Braun <koomi@moshbit.net>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-11-02 10:53:22 +03:00
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:12 +04:00
|
|
|
static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
2014-08-19 14:18:04 +04:00
|
|
|
struct kvm_memory_slot *memslot, unsigned long hva,
|
2013-01-21 03:28:12 +04:00
|
|
|
unsigned long fault_status)
|
|
|
|
{
|
|
|
|
int ret;
|
2018-12-11 20:10:35 +03:00
|
|
|
bool write_fault, writable, force_pte = false;
|
|
|
|
bool exec_fault, needs_exec;
|
2013-01-21 03:28:12 +04:00
|
|
|
unsigned long mmu_seq;
|
2012-11-01 20:14:45 +04:00
|
|
|
gfn_t gfn = fault_ipa >> PAGE_SHIFT;
|
|
|
|
struct kvm *kvm = vcpu->kvm;
|
2013-01-21 03:28:12 +04:00
|
|
|
struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
|
2012-11-01 20:14:45 +04:00
|
|
|
struct vm_area_struct *vma;
|
kvm: rename pfn_t to kvm_pfn_t
To date, we have implemented two I/O usage models for persistent memory,
PMEM (a persistent "ram disk") and DAX (mmap persistent memory into
userspace). This series adds a third, DAX-GUP, that allows DAX mappings
to be the target of direct-i/o. It allows userspace to coordinate
DMA/RDMA from/to persistent memory.
The implementation leverages the ZONE_DEVICE mm-zone that went into
4.3-rc1 (also discussed at kernel summit) to flag pages that are owned
and dynamically mapped by a device driver. The pmem driver, after
mapping a persistent memory range into the system memmap via
devm_memremap_pages(), arranges for DAX to distinguish pfn-only versus
page-backed pmem-pfns via flags in the new pfn_t type.
The DAX code, upon seeing a PFN_DEV+PFN_MAP flagged pfn, flags the
resulting pte(s) inserted into the process page tables with a new
_PAGE_DEVMAP flag. Later, when get_user_pages() is walking ptes it keys
off _PAGE_DEVMAP to pin the device hosting the page range active.
Finally, get_page() and put_page() are modified to take references
against the device driver established page mapping.
Finally, this need for "struct page" for persistent memory requires
memory capacity to store the memmap array. Given the memmap array for a
large pool of persistent may exhaust available DRAM introduce a
mechanism to allocate the memmap from persistent memory. The new
"struct vmem_altmap *" parameter to devm_memremap_pages() enables
arch_add_memory() to use reserved pmem capacity rather than the page
allocator.
This patch (of 18):
The core has developed a need for a "pfn_t" type [1]. Move the existing
pfn_t in KVM to kvm_pfn_t [2].
[1]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002199.html
[2]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002218.html
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-01-16 03:56:11 +03:00
|
|
|
kvm_pfn_t pfn;
|
2014-06-26 04:45:51 +04:00
|
|
|
pgprot_t mem_type = PAGE_S2;
|
2015-01-16 02:58:58 +03:00
|
|
|
bool logging_active = memslot_is_logging(memslot);
|
2018-12-11 20:10:34 +03:00
|
|
|
unsigned long vma_pagesize, flags = 0;
|
2013-01-21 03:28:12 +04:00
|
|
|
|
2014-09-09 14:27:09 +04:00
|
|
|
write_fault = kvm_is_write_fault(vcpu);
|
2017-10-23 19:11:19 +03:00
|
|
|
exec_fault = kvm_vcpu_trap_is_iabt(vcpu);
|
|
|
|
VM_BUG_ON(write_fault && exec_fault);
|
|
|
|
|
|
|
|
if (fault_status == FSC_PERM && !write_fault && !exec_fault) {
|
2013-01-21 03:28:12 +04:00
|
|
|
kvm_err("Unexpected L2 read permission error\n");
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
/* Let's check if we will get back a huge page backed by hugetlbfs */
|
|
|
|
down_read(¤t->mm->mmap_sem);
|
|
|
|
vma = find_vma_intersection(current->mm, hva, hva + 1);
|
2014-09-18 01:56:17 +04:00
|
|
|
if (unlikely(!vma)) {
|
|
|
|
kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
2018-12-11 20:10:34 +03:00
|
|
|
vma_pagesize = vma_kernel_pagesize(vma);
|
2019-03-12 12:52:51 +03:00
|
|
|
if (logging_active ||
|
2019-12-11 19:56:48 +03:00
|
|
|
(vma->vm_flags & VM_PFNMAP) ||
|
2019-03-12 12:52:51 +03:00
|
|
|
!fault_supports_stage2_huge_mapping(memslot, hva, vma_pagesize)) {
|
|
|
|
force_pte = true;
|
|
|
|
vma_pagesize = PAGE_SIZE;
|
|
|
|
}
|
|
|
|
|
2018-12-11 20:10:41 +03:00
|
|
|
/*
|
2019-01-29 22:12:17 +03:00
|
|
|
* The stage2 has a minimum of 2 level table (For arm64 see
|
|
|
|
* kvm_arm_setup_stage2()). Hence, we are guaranteed that we can
|
|
|
|
* use PMD_SIZE huge mappings (even when the PMD is folded into PGD).
|
|
|
|
* As for PUD huge maps, we must make sure that we have at least
|
|
|
|
* 3 levels, i.e, PMD is not folded.
|
2018-12-11 20:10:41 +03:00
|
|
|
*/
|
2019-03-12 12:52:51 +03:00
|
|
|
if (vma_pagesize == PMD_SIZE ||
|
|
|
|
(vma_pagesize == PUD_SIZE && kvm_stage2_has_pmd(kvm)))
|
2018-12-11 20:10:41 +03:00
|
|
|
gfn = (fault_ipa & huge_page_mask(hstate_vma(vma))) >> PAGE_SHIFT;
|
2012-11-01 20:14:45 +04:00
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
|
|
|
2013-01-21 03:28:12 +04:00
|
|
|
/* We need minimum second+third level pages */
|
2018-09-26 19:32:44 +03:00
|
|
|
ret = mmu_topup_memory_cache(memcache, kvm_mmu_cache_min_pages(kvm),
|
2014-10-10 14:14:28 +04:00
|
|
|
KVM_NR_MEM_OBJS);
|
2013-01-21 03:28:12 +04:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
mmu_seq = vcpu->kvm->mmu_notifier_seq;
|
|
|
|
/*
|
|
|
|
* Ensure the read of mmu_notifier_seq happens before we call
|
|
|
|
* gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
|
|
|
|
* the page we just got a reference to gets unmapped before we have a
|
|
|
|
* chance to grab the mmu_lock, which ensure that if the page gets
|
|
|
|
* unmapped afterwards, the call to kvm_unmap_hva will take it away
|
|
|
|
* from us again properly. This smp_rmb() interacts with the smp_wmb()
|
|
|
|
* in kvm_mmu_notifier_invalidate_<page|range_end>.
|
|
|
|
*/
|
|
|
|
smp_rmb();
|
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
|
2017-06-20 19:11:48 +03:00
|
|
|
if (pfn == KVM_PFN_ERR_HWPOISON) {
|
|
|
|
kvm_send_hwpoison_signal(hva, vma);
|
|
|
|
return 0;
|
|
|
|
}
|
2016-08-17 11:46:10 +03:00
|
|
|
if (is_error_noslot_pfn(pfn))
|
2013-01-21 03:28:12 +04:00
|
|
|
return -EFAULT;
|
|
|
|
|
2015-01-16 02:58:58 +03:00
|
|
|
if (kvm_is_device_pfn(pfn)) {
|
2014-06-26 04:45:51 +04:00
|
|
|
mem_type = PAGE_S2_DEVICE;
|
2015-01-16 02:58:58 +03:00
|
|
|
flags |= KVM_S2PTE_FLAG_IS_IOMAP;
|
|
|
|
} else if (logging_active) {
|
|
|
|
/*
|
|
|
|
* Faults on pages in a memslot with logging enabled
|
|
|
|
* should not be mapped with huge pages (it introduces churn
|
|
|
|
* and performance degradation), so force a pte mapping.
|
|
|
|
*/
|
|
|
|
flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Only actually map the page as writable if this was a write
|
|
|
|
* fault.
|
|
|
|
*/
|
|
|
|
if (!write_fault)
|
|
|
|
writable = false;
|
|
|
|
}
|
2014-06-26 04:45:51 +04:00
|
|
|
|
2019-12-11 19:56:48 +03:00
|
|
|
if (exec_fault && is_iomap(flags))
|
|
|
|
return -ENOEXEC;
|
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
if (mmu_notifier_retry(kvm, mmu_seq))
|
2013-01-21 03:28:12 +04:00
|
|
|
goto out_unlock;
|
2015-01-16 02:58:58 +03:00
|
|
|
|
2018-12-11 20:10:34 +03:00
|
|
|
if (vma_pagesize == PAGE_SIZE && !force_pte) {
|
|
|
|
/*
|
|
|
|
* Only PMD_SIZE transparent hugepages(THP) are
|
|
|
|
* currently supported. This code will need to be
|
|
|
|
* updated to support other THP sizes.
|
2019-04-10 18:14:57 +03:00
|
|
|
*
|
|
|
|
* Make sure the host VA and the guest IPA are sufficiently
|
|
|
|
* aligned and that the block is contained within the memslot.
|
2018-12-11 20:10:34 +03:00
|
|
|
*/
|
2019-04-10 18:14:57 +03:00
|
|
|
if (fault_supports_stage2_huge_mapping(memslot, hva, PMD_SIZE) &&
|
|
|
|
transparent_hugepage_adjust(&pfn, &fault_ipa))
|
2018-12-11 20:10:34 +03:00
|
|
|
vma_pagesize = PMD_SIZE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (writable)
|
|
|
|
kvm_set_pfn_dirty(pfn);
|
2012-11-01 20:14:45 +04:00
|
|
|
|
2019-12-11 19:56:48 +03:00
|
|
|
if (fault_status != FSC_PERM && !is_iomap(flags))
|
2018-12-11 20:10:34 +03:00
|
|
|
clean_dcache_guest_page(pfn, vma_pagesize);
|
|
|
|
|
|
|
|
if (exec_fault)
|
|
|
|
invalidate_icache_guest_page(pfn, vma_pagesize);
|
|
|
|
|
2018-12-11 20:10:35 +03:00
|
|
|
/*
|
|
|
|
* If we took an execution fault we have made the
|
|
|
|
* icache/dcache coherent above and should now let the s2
|
|
|
|
* mapping be executable.
|
|
|
|
*
|
|
|
|
* Write faults (!exec_fault && FSC_PERM) are orthogonal to
|
|
|
|
* execute permissions, and we preserve whatever we have.
|
|
|
|
*/
|
|
|
|
needs_exec = exec_fault ||
|
|
|
|
(fault_status == FSC_PERM && stage2_is_exec(kvm, fault_ipa));
|
|
|
|
|
2018-12-11 20:10:41 +03:00
|
|
|
if (vma_pagesize == PUD_SIZE) {
|
|
|
|
pud_t new_pud = kvm_pfn_pud(pfn, mem_type);
|
|
|
|
|
|
|
|
new_pud = kvm_pud_mkhuge(new_pud);
|
|
|
|
if (writable)
|
|
|
|
new_pud = kvm_s2pud_mkwrite(new_pud);
|
|
|
|
|
|
|
|
if (needs_exec)
|
|
|
|
new_pud = kvm_s2pud_mkexec(new_pud);
|
|
|
|
|
|
|
|
ret = stage2_set_pud_huge(kvm, memcache, fault_ipa, &new_pud);
|
|
|
|
} else if (vma_pagesize == PMD_SIZE) {
|
2018-12-11 20:10:36 +03:00
|
|
|
pmd_t new_pmd = kvm_pfn_pmd(pfn, mem_type);
|
|
|
|
|
|
|
|
new_pmd = kvm_pmd_mkhuge(new_pmd);
|
|
|
|
|
2018-12-11 20:10:34 +03:00
|
|
|
if (writable)
|
2016-04-13 19:57:37 +03:00
|
|
|
new_pmd = kvm_s2pmd_mkwrite(new_pmd);
|
2017-10-23 19:11:19 +03:00
|
|
|
|
2018-12-11 20:10:35 +03:00
|
|
|
if (needs_exec)
|
2017-10-23 19:11:19 +03:00
|
|
|
new_pmd = kvm_s2pmd_mkexec(new_pmd);
|
2017-10-23 19:11:15 +03:00
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
|
|
|
|
} else {
|
2018-12-11 20:10:36 +03:00
|
|
|
pte_t new_pte = kvm_pfn_pte(pfn, mem_type);
|
2015-01-16 02:58:58 +03:00
|
|
|
|
2012-11-01 20:14:45 +04:00
|
|
|
if (writable) {
|
2016-04-13 19:57:37 +03:00
|
|
|
new_pte = kvm_s2pte_mkwrite(new_pte);
|
2015-01-16 02:58:58 +03:00
|
|
|
mark_page_dirty(kvm, gfn);
|
2012-11-01 20:14:45 +04:00
|
|
|
}
|
2017-10-23 19:11:20 +03:00
|
|
|
|
2018-12-11 20:10:35 +03:00
|
|
|
if (needs_exec)
|
2017-10-23 19:11:19 +03:00
|
|
|
new_pte = kvm_s2pte_mkexec(new_pte);
|
2017-10-23 19:11:15 +03:00
|
|
|
|
2015-01-16 02:58:58 +03:00
|
|
|
ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
|
2013-01-21 03:28:12 +04:00
|
|
|
}
|
2012-11-01 20:14:45 +04:00
|
|
|
|
2013-01-21 03:28:12 +04:00
|
|
|
out_unlock:
|
2012-11-01 20:14:45 +04:00
|
|
|
spin_unlock(&kvm->mmu_lock);
|
2015-03-12 21:16:51 +03:00
|
|
|
kvm_set_pfn_accessed(pfn);
|
2013-01-21 03:28:12 +04:00
|
|
|
kvm_release_pfn_clean(pfn);
|
2012-11-01 20:14:45 +04:00
|
|
|
return ret;
|
2013-01-21 03:28:12 +04:00
|
|
|
}
|
|
|
|
|
2015-03-12 21:16:52 +03:00
|
|
|
/*
|
|
|
|
* Resolve the access fault by making the page young again.
|
|
|
|
* Note that because the faulting entry is guaranteed not to be
|
|
|
|
* cached in the TLB, we don't need to invalidate anything.
|
2016-04-13 19:57:37 +03:00
|
|
|
* Only the HW Access Flag updates are supported for Stage 2 (no DBM),
|
|
|
|
* so there is no need for atomic (pte|pmd)_mkyoung operations.
|
2015-03-12 21:16:52 +03:00
|
|
|
*/
|
|
|
|
static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
|
|
|
|
{
|
2018-12-11 20:10:39 +03:00
|
|
|
pud_t *pud;
|
2015-03-12 21:16:52 +03:00
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
kvm: rename pfn_t to kvm_pfn_t
To date, we have implemented two I/O usage models for persistent memory,
PMEM (a persistent "ram disk") and DAX (mmap persistent memory into
userspace). This series adds a third, DAX-GUP, that allows DAX mappings
to be the target of direct-i/o. It allows userspace to coordinate
DMA/RDMA from/to persistent memory.
The implementation leverages the ZONE_DEVICE mm-zone that went into
4.3-rc1 (also discussed at kernel summit) to flag pages that are owned
and dynamically mapped by a device driver. The pmem driver, after
mapping a persistent memory range into the system memmap via
devm_memremap_pages(), arranges for DAX to distinguish pfn-only versus
page-backed pmem-pfns via flags in the new pfn_t type.
The DAX code, upon seeing a PFN_DEV+PFN_MAP flagged pfn, flags the
resulting pte(s) inserted into the process page tables with a new
_PAGE_DEVMAP flag. Later, when get_user_pages() is walking ptes it keys
off _PAGE_DEVMAP to pin the device hosting the page range active.
Finally, get_page() and put_page() are modified to take references
against the device driver established page mapping.
Finally, this need for "struct page" for persistent memory requires
memory capacity to store the memmap array. Given the memmap array for a
large pool of persistent may exhaust available DRAM introduce a
mechanism to allocate the memmap from persistent memory. The new
"struct vmem_altmap *" parameter to devm_memremap_pages() enables
arch_add_memory() to use reserved pmem capacity rather than the page
allocator.
This patch (of 18):
The core has developed a need for a "pfn_t" type [1]. Move the existing
pfn_t in KVM to kvm_pfn_t [2].
[1]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002199.html
[2]: https://lists.01.org/pipermail/linux-nvdimm/2015-September/002218.html
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-01-16 03:56:11 +03:00
|
|
|
kvm_pfn_t pfn;
|
2015-03-12 21:16:52 +03:00
|
|
|
bool pfn_valid = false;
|
|
|
|
|
|
|
|
trace_kvm_access_fault(fault_ipa);
|
|
|
|
|
|
|
|
spin_lock(&vcpu->kvm->mmu_lock);
|
|
|
|
|
2018-12-11 20:10:39 +03:00
|
|
|
if (!stage2_get_leaf_entry(vcpu->kvm, fault_ipa, &pud, &pmd, &pte))
|
2015-03-12 21:16:52 +03:00
|
|
|
goto out;
|
|
|
|
|
2018-12-11 20:10:39 +03:00
|
|
|
if (pud) { /* HugeTLB */
|
|
|
|
*pud = kvm_s2pud_mkyoung(*pud);
|
|
|
|
pfn = kvm_pud_pfn(*pud);
|
|
|
|
pfn_valid = true;
|
|
|
|
} else if (pmd) { /* THP, HugeTLB */
|
2015-03-12 21:16:52 +03:00
|
|
|
*pmd = pmd_mkyoung(*pmd);
|
|
|
|
pfn = pmd_pfn(*pmd);
|
|
|
|
pfn_valid = true;
|
2018-12-11 20:10:39 +03:00
|
|
|
} else {
|
|
|
|
*pte = pte_mkyoung(*pte); /* Just a page... */
|
|
|
|
pfn = pte_pfn(*pte);
|
|
|
|
pfn_valid = true;
|
2015-03-12 21:16:52 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
spin_unlock(&vcpu->kvm->mmu_lock);
|
|
|
|
if (pfn_valid)
|
|
|
|
kvm_set_pfn_accessed(pfn);
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:12 +04:00
|
|
|
/**
|
|
|
|
* kvm_handle_guest_abort - handles all 2nd stage aborts
|
|
|
|
* @vcpu: the VCPU pointer
|
|
|
|
* @run: the kvm_run structure
|
|
|
|
*
|
|
|
|
* Any abort that gets to the host is almost guaranteed to be caused by a
|
|
|
|
* missing second stage translation table entry, which can mean that either the
|
|
|
|
* guest simply needs more memory and we must allocate an appropriate page or it
|
|
|
|
* can mean that the guest tried to access I/O memory, which is emulated by user
|
|
|
|
* space. The distinction is based on the IPA causing the fault and whether this
|
|
|
|
* memory region has been registered as standard RAM by user space.
|
|
|
|
*/
|
2013-01-21 03:28:06 +04:00
|
|
|
int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
|
|
|
|
{
|
2013-01-21 03:28:12 +04:00
|
|
|
unsigned long fault_status;
|
|
|
|
phys_addr_t fault_ipa;
|
|
|
|
struct kvm_memory_slot *memslot;
|
2014-08-19 14:18:04 +04:00
|
|
|
unsigned long hva;
|
|
|
|
bool is_iabt, write_fault, writable;
|
2013-01-21 03:28:12 +04:00
|
|
|
gfn_t gfn;
|
|
|
|
int ret, idx;
|
|
|
|
|
2017-06-21 21:17:14 +03:00
|
|
|
fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
|
|
|
|
|
|
|
|
fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
|
2017-07-18 15:37:41 +03:00
|
|
|
is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
|
2017-06-21 21:17:14 +03:00
|
|
|
|
2017-07-18 15:37:41 +03:00
|
|
|
/* Synchronous External Abort? */
|
|
|
|
if (kvm_vcpu_dabt_isextabt(vcpu)) {
|
|
|
|
/*
|
|
|
|
* For RAS the host kernel may handle this abort.
|
|
|
|
* There is no need to pass the error into the guest.
|
|
|
|
*/
|
2019-01-29 21:48:49 +03:00
|
|
|
if (!kvm_handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu)))
|
2017-06-21 21:17:14 +03:00
|
|
|
return 1;
|
|
|
|
|
2017-07-18 15:37:41 +03:00
|
|
|
if (unlikely(!is_iabt)) {
|
|
|
|
kvm_inject_vabt(vcpu);
|
|
|
|
return 1;
|
|
|
|
}
|
2016-09-06 16:02:15 +03:00
|
|
|
}
|
|
|
|
|
2012-09-17 22:27:09 +04:00
|
|
|
trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
|
|
|
|
kvm_vcpu_get_hfar(vcpu), fault_ipa);
|
2013-01-21 03:28:12 +04:00
|
|
|
|
|
|
|
/* Check the stage-2 fault is trans. fault or write fault */
|
2015-03-12 21:16:51 +03:00
|
|
|
if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
|
|
|
|
fault_status != FSC_ACCESS) {
|
2014-09-26 14:29:34 +04:00
|
|
|
kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
|
|
|
|
kvm_vcpu_trap_get_class(vcpu),
|
|
|
|
(unsigned long)kvm_vcpu_trap_get_fault(vcpu),
|
|
|
|
(unsigned long)kvm_vcpu_get_hsr(vcpu));
|
2013-01-21 03:28:12 +04:00
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
idx = srcu_read_lock(&vcpu->kvm->srcu);
|
|
|
|
|
|
|
|
gfn = fault_ipa >> PAGE_SHIFT;
|
2014-08-19 14:18:04 +04:00
|
|
|
memslot = gfn_to_memslot(vcpu->kvm, gfn);
|
|
|
|
hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
|
2014-09-09 14:27:09 +04:00
|
|
|
write_fault = kvm_is_write_fault(vcpu);
|
2014-08-19 14:18:04 +04:00
|
|
|
if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
|
2013-01-21 03:28:12 +04:00
|
|
|
if (is_iabt) {
|
|
|
|
/* Prefetch Abort on I/O address */
|
2019-12-11 19:56:48 +03:00
|
|
|
ret = -ENOEXEC;
|
|
|
|
goto out;
|
2013-01-21 03:28:12 +04:00
|
|
|
}
|
|
|
|
|
2016-01-29 18:01:28 +03:00
|
|
|
/*
|
|
|
|
* Check for a cache maintenance operation. Since we
|
|
|
|
* ended-up here, we know it is outside of any memory
|
|
|
|
* slot. But we can't find out if that is for a device,
|
|
|
|
* or if the guest is just being stupid. The only thing
|
|
|
|
* we know for sure is that this range cannot be cached.
|
|
|
|
*
|
|
|
|
* So let's assume that the guest is just being
|
|
|
|
* cautious, and skip the instruction.
|
|
|
|
*/
|
|
|
|
if (kvm_vcpu_dabt_is_cm(vcpu)) {
|
|
|
|
kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
|
|
|
|
ret = 1;
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
2012-12-12 18:42:09 +04:00
|
|
|
/*
|
|
|
|
* The IPA is reported as [MAX:12], so we need to
|
|
|
|
* complement it with the bottom 12 bits from the
|
|
|
|
* faulting VA. This is always 12 bits, irrespective
|
|
|
|
* of the page size.
|
|
|
|
*/
|
|
|
|
fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
|
2013-01-21 03:43:58 +04:00
|
|
|
ret = io_mem_abort(vcpu, run, fault_ipa);
|
2013-01-21 03:28:12 +04:00
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
2014-10-10 14:14:29 +04:00
|
|
|
/* Userspace should not be able to register out-of-bounds IPAs */
|
2018-09-26 19:32:44 +03:00
|
|
|
VM_BUG_ON(fault_ipa >= kvm_phys_size(vcpu->kvm));
|
2014-10-10 14:14:29 +04:00
|
|
|
|
2015-03-12 21:16:52 +03:00
|
|
|
if (fault_status == FSC_ACCESS) {
|
|
|
|
handle_access_fault(vcpu, fault_ipa);
|
|
|
|
ret = 1;
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
2014-08-19 14:18:04 +04:00
|
|
|
ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
|
2013-01-21 03:28:12 +04:00
|
|
|
if (ret == 0)
|
|
|
|
ret = 1;
|
2019-12-11 19:56:48 +03:00
|
|
|
out:
|
|
|
|
if (ret == -ENOEXEC) {
|
|
|
|
kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
|
|
|
|
ret = 1;
|
|
|
|
}
|
2013-01-21 03:28:12 +04:00
|
|
|
out_unlock:
|
|
|
|
srcu_read_unlock(&vcpu->kvm->srcu, idx);
|
|
|
|
return ret;
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
2015-03-12 21:16:50 +03:00
|
|
|
static int handle_hva_to_gpa(struct kvm *kvm,
|
|
|
|
unsigned long start,
|
|
|
|
unsigned long end,
|
|
|
|
int (*handler)(struct kvm *kvm,
|
2017-03-20 21:26:42 +03:00
|
|
|
gpa_t gpa, u64 size,
|
|
|
|
void *data),
|
2015-03-12 21:16:50 +03:00
|
|
|
void *data)
|
2013-01-21 03:28:07 +04:00
|
|
|
{
|
|
|
|
struct kvm_memslots *slots;
|
|
|
|
struct kvm_memory_slot *memslot;
|
2015-03-12 21:16:50 +03:00
|
|
|
int ret = 0;
|
2013-01-21 03:28:07 +04:00
|
|
|
|
|
|
|
slots = kvm_memslots(kvm);
|
|
|
|
|
|
|
|
/* we only care about the pages that the guest sees */
|
|
|
|
kvm_for_each_memslot(memslot, slots) {
|
|
|
|
unsigned long hva_start, hva_end;
|
2017-03-20 21:26:42 +03:00
|
|
|
gfn_t gpa;
|
2013-01-21 03:28:07 +04:00
|
|
|
|
|
|
|
hva_start = max(start, memslot->userspace_addr);
|
|
|
|
hva_end = min(end, memslot->userspace_addr +
|
|
|
|
(memslot->npages << PAGE_SHIFT));
|
|
|
|
if (hva_start >= hva_end)
|
|
|
|
continue;
|
|
|
|
|
2017-03-20 21:26:42 +03:00
|
|
|
gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
|
|
|
|
ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
|
2013-01-21 03:28:07 +04:00
|
|
|
}
|
2015-03-12 21:16:50 +03:00
|
|
|
|
|
|
|
return ret;
|
2013-01-21 03:28:07 +04:00
|
|
|
}
|
|
|
|
|
2017-03-20 21:26:42 +03:00
|
|
|
static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
|
2013-01-21 03:28:07 +04:00
|
|
|
{
|
2017-03-20 21:26:42 +03:00
|
|
|
unmap_stage2_range(kvm, gpa, size);
|
2015-03-12 21:16:50 +03:00
|
|
|
return 0;
|
2013-01-21 03:28:07 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm,
|
|
|
|
unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
if (!kvm->arch.pgd)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
trace_kvm_unmap_hva_range(start, end);
|
|
|
|
handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-03-20 21:26:42 +03:00
|
|
|
static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
|
2013-01-21 03:28:07 +04:00
|
|
|
{
|
|
|
|
pte_t *pte = (pte_t *)data;
|
|
|
|
|
2017-03-20 21:26:42 +03:00
|
|
|
WARN_ON(size != PAGE_SIZE);
|
2015-01-16 02:58:58 +03:00
|
|
|
/*
|
|
|
|
* We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
|
|
|
|
* flag clear because MMU notifiers will have unmapped a huge PMD before
|
|
|
|
* calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
|
|
|
|
* therefore stage2_set_pte() never needs to clear out a huge PMD
|
|
|
|
* through this calling path.
|
|
|
|
*/
|
|
|
|
stage2_set_pte(kvm, NULL, gpa, pte, 0);
|
2015-03-12 21:16:50 +03:00
|
|
|
return 0;
|
2013-01-21 03:28:07 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2018-12-06 16:21:10 +03:00
|
|
|
int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
|
2013-01-21 03:28:07 +04:00
|
|
|
{
|
|
|
|
unsigned long end = hva + PAGE_SIZE;
|
2018-08-23 11:58:27 +03:00
|
|
|
kvm_pfn_t pfn = pte_pfn(pte);
|
2013-01-21 03:28:07 +04:00
|
|
|
pte_t stage2_pte;
|
|
|
|
|
|
|
|
if (!kvm->arch.pgd)
|
2018-12-06 16:21:10 +03:00
|
|
|
return 0;
|
2013-01-21 03:28:07 +04:00
|
|
|
|
|
|
|
trace_kvm_set_spte_hva(hva);
|
2018-08-23 11:58:27 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We've moved a page around, probably through CoW, so let's treat it
|
|
|
|
* just like a translation fault and clean the cache to the PoC.
|
|
|
|
*/
|
|
|
|
clean_dcache_guest_page(pfn, PAGE_SIZE);
|
2018-12-11 20:10:36 +03:00
|
|
|
stage2_pte = kvm_pfn_pte(pfn, PAGE_S2);
|
2013-01-21 03:28:07 +04:00
|
|
|
handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
|
2018-12-06 16:21:10 +03:00
|
|
|
|
|
|
|
return 0;
|
2013-01-21 03:28:07 +04:00
|
|
|
}
|
|
|
|
|
2017-03-20 21:26:42 +03:00
|
|
|
static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
|
2015-03-12 21:16:51 +03:00
|
|
|
{
|
2018-12-11 20:10:40 +03:00
|
|
|
pud_t *pud;
|
2015-03-12 21:16:51 +03:00
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
|
2018-12-11 20:10:40 +03:00
|
|
|
WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);
|
|
|
|
if (!stage2_get_leaf_entry(kvm, gpa, &pud, &pmd, &pte))
|
2015-03-12 21:16:51 +03:00
|
|
|
return 0;
|
|
|
|
|
2018-12-11 20:10:40 +03:00
|
|
|
if (pud)
|
|
|
|
return stage2_pudp_test_and_clear_young(pud);
|
|
|
|
else if (pmd)
|
2016-04-13 19:57:37 +03:00
|
|
|
return stage2_pmdp_test_and_clear_young(pmd);
|
2018-12-11 20:10:40 +03:00
|
|
|
else
|
|
|
|
return stage2_ptep_test_and_clear_young(pte);
|
2015-03-12 21:16:51 +03:00
|
|
|
}
|
|
|
|
|
2017-03-20 21:26:42 +03:00
|
|
|
static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
|
2015-03-12 21:16:51 +03:00
|
|
|
{
|
2018-12-11 20:10:40 +03:00
|
|
|
pud_t *pud;
|
2015-03-12 21:16:51 +03:00
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
|
2018-12-11 20:10:40 +03:00
|
|
|
WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);
|
|
|
|
if (!stage2_get_leaf_entry(kvm, gpa, &pud, &pmd, &pte))
|
2015-03-12 21:16:51 +03:00
|
|
|
return 0;
|
|
|
|
|
2018-12-11 20:10:40 +03:00
|
|
|
if (pud)
|
|
|
|
return kvm_s2pud_young(*pud);
|
|
|
|
else if (pmd)
|
2015-03-12 21:16:51 +03:00
|
|
|
return pmd_young(*pmd);
|
2018-12-11 20:10:40 +03:00
|
|
|
else
|
2015-03-12 21:16:51 +03:00
|
|
|
return pte_young(*pte);
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
|
|
{
|
2017-07-05 11:57:00 +03:00
|
|
|
if (!kvm->arch.pgd)
|
|
|
|
return 0;
|
2015-03-12 21:16:51 +03:00
|
|
|
trace_kvm_age_hva(start, end);
|
|
|
|
return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
2017-07-05 11:57:00 +03:00
|
|
|
if (!kvm->arch.pgd)
|
|
|
|
return 0;
|
2015-03-12 21:16:51 +03:00
|
|
|
trace_kvm_test_age_hva(hva);
|
|
|
|
return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:07 +04:00
|
|
|
void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:06 +04:00
|
|
|
phys_addr_t kvm_mmu_get_httbr(void)
|
|
|
|
{
|
2015-03-19 19:42:28 +03:00
|
|
|
if (__kvm_cpu_uses_extended_idmap())
|
|
|
|
return virt_to_phys(merged_hyp_pgd);
|
|
|
|
else
|
|
|
|
return virt_to_phys(hyp_pgd);
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
|
|
|
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
|
|
|
phys_addr_t kvm_get_idmap_vector(void)
|
|
|
|
{
|
|
|
|
return hyp_idmap_vector;
|
|
|
|
}
|
|
|
|
|
2016-06-30 20:40:43 +03:00
|
|
|
static int kvm_map_idmap_text(pgd_t *pgd)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
|
|
|
/* Create the idmap in the boot page tables */
|
2018-01-15 18:23:49 +03:00
|
|
|
err = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
|
2016-06-30 20:40:43 +03:00
|
|
|
hyp_idmap_start, hyp_idmap_end,
|
|
|
|
__phys_to_pfn(hyp_idmap_start),
|
|
|
|
PAGE_HYP_EXEC);
|
|
|
|
if (err)
|
|
|
|
kvm_err("Failed to idmap %lx-%lx\n",
|
|
|
|
hyp_idmap_start, hyp_idmap_end);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2013-01-21 03:28:06 +04:00
|
|
|
int kvm_mmu_init(void)
|
|
|
|
{
|
2013-04-12 22:12:03 +04:00
|
|
|
int err;
|
|
|
|
|
2013-11-19 23:59:12 +04:00
|
|
|
hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
|
2018-03-12 17:25:10 +03:00
|
|
|
hyp_idmap_start = ALIGN_DOWN(hyp_idmap_start, PAGE_SIZE);
|
2013-11-19 23:59:12 +04:00
|
|
|
hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
|
2018-03-12 17:25:10 +03:00
|
|
|
hyp_idmap_end = ALIGN(hyp_idmap_end, PAGE_SIZE);
|
2013-11-19 23:59:12 +04:00
|
|
|
hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
|
|
|
|
ARM, arm64: kvm: get rid of the bounce page
The HYP init bounce page is a runtime construct that ensures that the
HYP init code does not cross a page boundary. However, this is something
we can do perfectly well at build time, by aligning the code appropriately.
For arm64, we just align to 4 KB, and enforce that the code size is less
than 4 KB, regardless of the chosen page size.
For ARM, the whole code is less than 256 bytes, so we tweak the linker
script to align at a power of 2 upper bound of the code size
Note that this also fixes a benign off-by-one error in the original bounce
page code, where a bounce page would be allocated unnecessarily if the code
was exactly 1 page in size.
On ARM, it also fixes an issue with very large kernels reported by Arnd
Bergmann, where stub sections with linker emitted veneers could erroneously
trigger the size/alignment ASSERT() in the linker script.
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-03-19 19:42:26 +03:00
|
|
|
/*
|
|
|
|
* We rely on the linker script to ensure at build time that the HYP
|
|
|
|
* init code does not cross a page boundary.
|
|
|
|
*/
|
|
|
|
BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
|
|
|
|
2017-12-03 23:04:51 +03:00
|
|
|
kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);
|
|
|
|
kvm_debug("HYP VA range: %lx:%lx\n",
|
|
|
|
kern_hyp_va(PAGE_OFFSET),
|
|
|
|
kern_hyp_va((unsigned long)high_memory - 1));
|
2016-06-30 20:40:50 +03:00
|
|
|
|
2016-06-30 20:40:51 +03:00
|
|
|
if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
|
arm64: KVM: Introduce EL2 VA randomisation
The main idea behind randomising the EL2 VA is that we usually have
a few spare bits between the most significant bit of the VA mask
and the most significant bit of the linear mapping.
Those bits could be a bunch of zeroes, and could be useful
to move things around a bit. Of course, the more memory you have,
the less randomisation you get...
Alternatively, these bits could be the result of KASLR, in which
case they are already random. But it would be nice to have a
*different* randomization, just to make the job of a potential
attacker a bit more difficult.
Inserting these random bits is a bit involved. We don't have a spare
register (short of rewriting all the kern_hyp_va call sites), and
the immediate we want to insert is too random to be used with the
ORR instruction. The best option I could come up with is the following
sequence:
and x0, x0, #va_mask
ror x0, x0, #first_random_bit
add x0, x0, #(random & 0xfff)
add x0, x0, #(random >> 12), lsl #12
ror x0, x0, #(63 - first_random_bit)
making it a fairly long sequence, but one that a decent CPU should
be able to execute without breaking a sweat. It is of course NOPed
out on VHE. The last 4 instructions can also be turned into NOPs
if it appears that there is no free bits to use.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-12-03 21:22:49 +03:00
|
|
|
hyp_idmap_start < kern_hyp_va((unsigned long)high_memory - 1) &&
|
2016-08-22 11:01:17 +03:00
|
|
|
hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
|
2016-06-30 20:40:50 +03:00
|
|
|
/*
|
|
|
|
* The idmap page is intersecting with the VA space,
|
|
|
|
* it is not safe to continue further.
|
|
|
|
*/
|
|
|
|
kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
|
|
|
|
err = -EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2014-10-10 14:14:28 +04:00
|
|
|
hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
|
2016-06-30 20:40:43 +03:00
|
|
|
if (!hyp_pgd) {
|
2013-01-21 03:28:07 +04:00
|
|
|
kvm_err("Hyp mode PGD not allocated\n");
|
2013-04-12 22:12:03 +04:00
|
|
|
err = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2016-06-30 20:40:43 +03:00
|
|
|
if (__kvm_cpu_uses_extended_idmap()) {
|
|
|
|
boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
|
|
|
|
hyp_pgd_order);
|
|
|
|
if (!boot_hyp_pgd) {
|
|
|
|
kvm_err("Hyp boot PGD not allocated\n");
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
2013-04-12 22:12:03 +04:00
|
|
|
|
2016-06-30 20:40:43 +03:00
|
|
|
err = kvm_map_idmap_text(boot_hyp_pgd);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
2013-01-21 03:28:07 +04:00
|
|
|
|
2015-03-19 19:42:28 +03:00
|
|
|
merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
|
|
|
|
if (!merged_hyp_pgd) {
|
|
|
|
kvm_err("Failed to allocate extra HYP pgd\n");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
__kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
|
|
|
|
hyp_idmap_start);
|
2016-06-30 20:40:43 +03:00
|
|
|
} else {
|
|
|
|
err = kvm_map_idmap_text(hyp_pgd);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 22:12:06 +04:00
|
|
|
}
|
|
|
|
|
2017-12-04 20:04:38 +03:00
|
|
|
io_map_base = hyp_idmap_start;
|
2013-01-21 03:28:07 +04:00
|
|
|
return 0;
|
2013-04-12 22:12:03 +04:00
|
|
|
out:
|
2013-04-12 22:12:05 +04:00
|
|
|
free_hyp_pgds();
|
2013-04-12 22:12:03 +04:00
|
|
|
return err;
|
2013-01-21 03:28:06 +04:00
|
|
|
}
|
2014-06-06 13:10:23 +04:00
|
|
|
|
|
|
|
void kvm_arch_commit_memory_region(struct kvm *kvm,
|
2015-05-18 14:59:39 +03:00
|
|
|
const struct kvm_userspace_memory_region *mem,
|
2014-06-06 13:10:23 +04:00
|
|
|
const struct kvm_memory_slot *old,
|
2015-05-18 14:20:23 +03:00
|
|
|
const struct kvm_memory_slot *new,
|
2014-06-06 13:10:23 +04:00
|
|
|
enum kvm_mr_change change)
|
|
|
|
{
|
2015-01-16 02:58:56 +03:00
|
|
|
/*
|
|
|
|
* At this point memslot has been committed and there is an
|
|
|
|
* allocated dirty_bitmap[], dirty pages will be be tracked while the
|
|
|
|
* memory slot is write protected.
|
|
|
|
*/
|
|
|
|
if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
|
|
|
|
kvm_mmu_wp_memory_region(kvm, mem->slot);
|
2014-06-06 13:10:23 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot,
|
2015-05-18 14:59:39 +03:00
|
|
|
const struct kvm_userspace_memory_region *mem,
|
2014-06-06 13:10:23 +04:00
|
|
|
enum kvm_mr_change change)
|
|
|
|
{
|
2014-10-10 19:00:32 +04:00
|
|
|
hva_t hva = mem->userspace_addr;
|
|
|
|
hva_t reg_end = hva + mem->memory_size;
|
|
|
|
bool writable = !(mem->flags & KVM_MEM_READONLY);
|
|
|
|
int ret = 0;
|
|
|
|
|
2015-01-16 02:58:58 +03:00
|
|
|
if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
|
|
|
|
change != KVM_MR_FLAGS_ONLY)
|
2014-10-10 19:00:32 +04:00
|
|
|
return 0;
|
|
|
|
|
2014-10-10 14:14:29 +04:00
|
|
|
/*
|
|
|
|
* Prevent userspace from creating a memory region outside of the IPA
|
|
|
|
* space addressable by the KVM guest IPA space.
|
|
|
|
*/
|
|
|
|
if (memslot->base_gfn + memslot->npages >=
|
2018-09-26 19:32:44 +03:00
|
|
|
(kvm_phys_size(kvm) >> PAGE_SHIFT))
|
2014-10-10 14:14:29 +04:00
|
|
|
return -EFAULT;
|
|
|
|
|
2017-03-16 21:20:50 +03:00
|
|
|
down_read(¤t->mm->mmap_sem);
|
2014-10-10 19:00:32 +04:00
|
|
|
/*
|
|
|
|
* A memory region could potentially cover multiple VMAs, and any holes
|
|
|
|
* between them, so iterate over all of them to find out if we can map
|
|
|
|
* any of them right now.
|
|
|
|
*
|
|
|
|
* +--------------------------------------------+
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | : VMA 1 | VMA 2 | | VMA 3 : |
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | memory region |
|
|
|
|
* +--------------------------------------------+
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
struct vm_area_struct *vma = find_vma(current->mm, hva);
|
|
|
|
hva_t vm_start, vm_end;
|
|
|
|
|
|
|
|
if (!vma || vma->vm_start >= reg_end)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Take the intersection of this VMA with the memory region
|
|
|
|
*/
|
|
|
|
vm_start = max(hva, vma->vm_start);
|
|
|
|
vm_end = min(reg_end, vma->vm_end);
|
|
|
|
|
|
|
|
if (vma->vm_flags & VM_PFNMAP) {
|
|
|
|
gpa_t gpa = mem->guest_phys_addr +
|
|
|
|
(vm_start - mem->userspace_addr);
|
2015-09-16 13:04:55 +03:00
|
|
|
phys_addr_t pa;
|
|
|
|
|
|
|
|
pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
|
|
|
|
pa += vm_start - vma->vm_start;
|
2014-10-10 19:00:32 +04:00
|
|
|
|
2015-01-16 02:58:58 +03:00
|
|
|
/* IO region dirty page logging not allowed */
|
2017-03-16 21:20:50 +03:00
|
|
|
if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
2015-01-16 02:58:58 +03:00
|
|
|
|
2014-10-10 19:00:32 +04:00
|
|
|
ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
|
|
|
|
vm_end - vm_start,
|
|
|
|
writable);
|
|
|
|
if (ret)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
hva = vm_end;
|
|
|
|
} while (hva < reg_end);
|
|
|
|
|
2015-01-16 02:58:58 +03:00
|
|
|
if (change == KVM_MR_FLAGS_ONLY)
|
2017-03-16 21:20:50 +03:00
|
|
|
goto out;
|
2015-01-16 02:58:58 +03:00
|
|
|
|
2014-11-17 17:58:53 +03:00
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
if (ret)
|
2014-10-10 19:00:32 +04:00
|
|
|
unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
|
2014-11-17 17:58:53 +03:00
|
|
|
else
|
|
|
|
stage2_flush_memslot(kvm, memslot);
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
2017-03-16 21:20:50 +03:00
|
|
|
out:
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
2014-10-10 19:00:32 +04:00
|
|
|
return ret;
|
2014-06-06 13:10:23 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
|
|
|
|
struct kvm_memory_slot *dont)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
|
|
|
|
unsigned long npages)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-02-05 23:54:17 +03:00
|
|
|
void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
|
2014-06-06 13:10:23 +04:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_arch_flush_shadow_all(struct kvm *kvm)
|
|
|
|
{
|
2016-09-08 18:25:49 +03:00
|
|
|
kvm_free_stage2_pgd(kvm);
|
2014-06-06 13:10:23 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot)
|
|
|
|
{
|
2014-10-10 19:00:32 +04:00
|
|
|
gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
|
|
|
|
phys_addr_t size = slot->npages << PAGE_SHIFT;
|
|
|
|
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
unmap_stage2_range(kvm, gpa, size);
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
2014-06-06 13:10:23 +04:00
|
|
|
}
|
2014-12-19 19:05:31 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
|
|
|
|
*
|
|
|
|
* Main problems:
|
|
|
|
* - S/W ops are local to a CPU (not broadcast)
|
|
|
|
* - We have line migration behind our back (speculation)
|
|
|
|
* - System caches don't support S/W at all (damn!)
|
|
|
|
*
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* In the face of the above, the best we can do is to try and convert
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* S/W ops to VA ops. Because the guest is not allowed to infer the
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* S/W to PA mapping, it can only use S/W to nuke the whole cache,
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* which is a rather good thing for us.
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*
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* Also, it is only used when turning caches on/off ("The expected
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* usage of the cache maintenance instructions that operate by set/way
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* is associated with the cache maintenance instructions associated
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* with the powerdown and powerup of caches, if this is required by
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* the implementation.").
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*
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* We use the following policy:
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*
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* - If we trap a S/W operation, we enable VM trapping to detect
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* caches being turned on/off, and do a full clean.
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*
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* - We flush the caches on both caches being turned on and off.
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*
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* - Once the caches are enabled, we stop trapping VM ops.
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*/
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void kvm_set_way_flush(struct kvm_vcpu *vcpu)
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{
|
2017-08-03 13:09:05 +03:00
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unsigned long hcr = *vcpu_hcr(vcpu);
|
2014-12-19 19:05:31 +03:00
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/*
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* If this is the first time we do a S/W operation
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* (i.e. HCR_TVM not set) flush the whole memory, and set the
|
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* VM trapping.
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*
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* Otherwise, rely on the VM trapping to wait for the MMU +
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* Caches to be turned off. At that point, we'll be able to
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* clean the caches again.
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|
*/
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if (!(hcr & HCR_TVM)) {
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|
|
trace_kvm_set_way_flush(*vcpu_pc(vcpu),
|
|
|
|
vcpu_has_cache_enabled(vcpu));
|
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|
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stage2_flush_vm(vcpu->kvm);
|
2017-08-03 13:09:05 +03:00
|
|
|
*vcpu_hcr(vcpu) = hcr | HCR_TVM;
|
2014-12-19 19:05:31 +03:00
|
|
|
}
|
|
|
|
}
|
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|
|
void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
|
|
|
|
{
|
|
|
|
bool now_enabled = vcpu_has_cache_enabled(vcpu);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If switching the MMU+caches on, need to invalidate the caches.
|
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|
|
* If switching it off, need to clean the caches.
|
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|
|
* Clean + invalidate does the trick always.
|
|
|
|
*/
|
|
|
|
if (now_enabled != was_enabled)
|
|
|
|
stage2_flush_vm(vcpu->kvm);
|
|
|
|
|
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|
|
/* Caches are now on, stop trapping VM ops (until a S/W op) */
|
|
|
|
if (now_enabled)
|
2017-08-03 13:09:05 +03:00
|
|
|
*vcpu_hcr(vcpu) &= ~HCR_TVM;
|
2014-12-19 19:05:31 +03:00
|
|
|
|
|
|
|
trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
|
|
|
|
}
|