2018-04-26 16:08:08 +03:00
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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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// Copyright(c) 2015-18 Intel Corporation.
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/*
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* stream.c - SoundWire Bus stream operations.
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/slab.h>
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2018-04-26 16:08:17 +03:00
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#include <linux/soundwire/sdw_registers.h>
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2018-04-26 16:08:08 +03:00
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#include <linux/soundwire/sdw.h>
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2020-06-30 21:43:53 +03:00
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#include <sound/soc.h>
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2018-04-26 16:08:08 +03:00
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#include "bus.h"
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2018-04-26 16:08:28 +03:00
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/*
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* Array of supported rows and columns as per MIPI SoundWire Specification 1.1
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*
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* The rows are arranged as per the array index value programmed
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* in register. The index 15 has dummy value 0 in order to fill hole.
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*/
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2019-08-06 03:55:10 +03:00
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int sdw_rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
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2018-04-26 16:08:28 +03:00
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96, 100, 120, 128, 150, 160, 250, 0,
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192, 200, 240, 256, 72, 144, 90, 180};
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2020-09-08 16:15:20 +03:00
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EXPORT_SYMBOL(sdw_rows);
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2018-04-26 16:08:28 +03:00
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2019-08-06 03:55:10 +03:00
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int sdw_cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
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2020-09-08 16:15:20 +03:00
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EXPORT_SYMBOL(sdw_cols);
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2018-04-26 16:08:28 +03:00
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2019-08-06 03:55:10 +03:00
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int sdw_find_col_index(int col)
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2018-04-26 16:08:28 +03:00
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{
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int i;
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for (i = 0; i < SDW_FRAME_COLS; i++) {
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2019-08-06 03:55:10 +03:00
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if (sdw_cols[i] == col)
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2018-04-26 16:08:28 +03:00
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return i;
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}
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pr_warn("Requested column not found, selecting lowest column no: 2\n");
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return 0;
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}
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2019-08-06 03:55:10 +03:00
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EXPORT_SYMBOL(sdw_find_col_index);
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2018-04-26 16:08:28 +03:00
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2019-08-06 03:55:10 +03:00
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int sdw_find_row_index(int row)
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2018-04-26 16:08:28 +03:00
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{
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int i;
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for (i = 0; i < SDW_FRAME_ROWS; i++) {
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2019-08-06 03:55:10 +03:00
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if (sdw_rows[i] == row)
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2018-04-26 16:08:28 +03:00
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return i;
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}
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pr_warn("Requested row not found, selecting lowest row no: 48\n");
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return 0;
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}
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2019-08-06 03:55:10 +03:00
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EXPORT_SYMBOL(sdw_find_row_index);
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2019-05-02 13:59:29 +03:00
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2018-04-26 16:08:17 +03:00
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static int _sdw_program_slave_port_params(struct sdw_bus *bus,
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2019-05-01 18:57:35 +03:00
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struct sdw_slave *slave,
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struct sdw_transport_params *t_params,
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enum sdw_dpn_type type)
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2018-04-26 16:08:17 +03:00
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{
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u32 addr1, addr2, addr3, addr4;
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int ret;
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u16 wbuf;
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if (bus->params.next_bank) {
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addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
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addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
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addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
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addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
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} else {
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addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
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addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
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addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
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addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
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}
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/* Program DPN_OffsetCtrl2 registers */
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ret = sdw_write(slave, addr1, t_params->offset2);
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if (ret < 0) {
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2019-05-01 18:57:45 +03:00
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dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
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2018-04-26 16:08:17 +03:00
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return ret;
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}
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/* Program DPN_BlockCtrl3 register */
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ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
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if (ret < 0) {
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2019-05-01 18:57:45 +03:00
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dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
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2018-04-26 16:08:17 +03:00
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return ret;
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}
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/*
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* Data ports are FULL, SIMPLE and REDUCED. This function handles
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2019-05-02 13:59:27 +03:00
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* FULL and REDUCED only and beyond this point only FULL is
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2018-04-26 16:08:17 +03:00
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* handled, so bail out if we are not FULL data port type
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*/
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if (type != SDW_DPN_FULL)
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return ret;
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/* Program DPN_SampleCtrl2 register */
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2020-09-03 14:44:59 +03:00
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wbuf = FIELD_GET(SDW_DPN_SAMPLECTRL_HIGH, t_params->sample_interval - 1);
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2018-04-26 16:08:17 +03:00
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ret = sdw_write(slave, addr3, wbuf);
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if (ret < 0) {
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2019-05-01 18:57:45 +03:00
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dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
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2018-04-26 16:08:17 +03:00
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return ret;
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}
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/* Program DPN_HCtrl register */
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2020-09-03 14:44:59 +03:00
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wbuf = FIELD_PREP(SDW_DPN_HCTRL_HSTART, t_params->hstart);
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wbuf |= FIELD_PREP(SDW_DPN_HCTRL_HSTOP, t_params->hstop);
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2018-04-26 16:08:17 +03:00
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ret = sdw_write(slave, addr4, wbuf);
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if (ret < 0)
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2019-05-01 18:57:45 +03:00
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dev_err(bus->dev, "DPN_HCtrl register write failed\n");
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2018-04-26 16:08:17 +03:00
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return ret;
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}
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static int sdw_program_slave_port_params(struct sdw_bus *bus,
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2019-05-01 18:57:35 +03:00
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struct sdw_slave_runtime *s_rt,
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struct sdw_port_runtime *p_rt)
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2018-04-26 16:08:17 +03:00
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{
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struct sdw_transport_params *t_params = &p_rt->transport_params;
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struct sdw_port_params *p_params = &p_rt->port_params;
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struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
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u32 addr1, addr2, addr3, addr4, addr5, addr6;
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struct sdw_dpn_prop *dpn_prop;
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int ret;
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u8 wbuf;
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2021-07-14 06:22:07 +03:00
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if (s_rt->slave->is_mockup_device)
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return 0;
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2018-04-26 16:08:17 +03:00
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dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
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2019-05-01 18:57:35 +03:00
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s_rt->direction,
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t_params->port_num);
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2018-04-26 16:08:17 +03:00
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if (!dpn_prop)
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return -EINVAL;
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addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
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addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
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if (bus->params.next_bank) {
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addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
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addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
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addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
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addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
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} else {
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addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
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addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
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addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
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addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
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}
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/* Program DPN_PortCtrl register */
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2020-09-03 14:44:59 +03:00
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wbuf = FIELD_PREP(SDW_DPN_PORTCTRL_DATAMODE, p_params->data_mode);
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wbuf |= FIELD_PREP(SDW_DPN_PORTCTRL_FLOWMODE, p_params->flow_mode);
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2018-04-26 16:08:17 +03:00
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ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
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if (ret < 0) {
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dev_err(&s_rt->slave->dev,
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2019-05-01 18:57:45 +03:00
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"DPN_PortCtrl register write failed for port %d\n",
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2018-04-26 16:08:17 +03:00
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t_params->port_num);
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return ret;
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}
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2020-03-11 14:35:44 +03:00
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if (!dpn_prop->read_only_wordlength) {
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/* Program DPN_BlockCtrl1 register */
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ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
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if (ret < 0) {
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dev_err(&s_rt->slave->dev,
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"DPN_BlockCtrl1 register write failed for port %d\n",
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t_params->port_num);
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return ret;
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}
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2018-04-26 16:08:17 +03:00
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}
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/* Program DPN_SampleCtrl1 register */
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wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
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ret = sdw_write(s_rt->slave, addr3, wbuf);
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if (ret < 0) {
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dev_err(&s_rt->slave->dev,
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2019-05-01 18:57:45 +03:00
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"DPN_SampleCtrl1 register write failed for port %d\n",
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2018-04-26 16:08:17 +03:00
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t_params->port_num);
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return ret;
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}
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/* Program DPN_OffsetCtrl1 registers */
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ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
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if (ret < 0) {
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dev_err(&s_rt->slave->dev,
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2019-05-01 18:57:45 +03:00
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"DPN_OffsetCtrl1 register write failed for port %d\n",
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2018-04-26 16:08:17 +03:00
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t_params->port_num);
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return ret;
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}
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/* Program DPN_BlockCtrl2 register*/
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if (t_params->blk_grp_ctrl_valid) {
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ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
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if (ret < 0) {
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dev_err(&s_rt->slave->dev,
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2019-05-01 18:57:45 +03:00
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"DPN_BlockCtrl2 reg write failed for port %d\n",
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2018-04-26 16:08:17 +03:00
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t_params->port_num);
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return ret;
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}
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}
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/* program DPN_LaneCtrl register */
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if (slave_prop->lane_control_support) {
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ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
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if (ret < 0) {
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dev_err(&s_rt->slave->dev,
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2019-05-01 18:57:45 +03:00
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"DPN_LaneCtrl register write failed for port %d\n",
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2018-04-26 16:08:17 +03:00
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t_params->port_num);
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return ret;
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}
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}
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if (dpn_prop->type != SDW_DPN_SIMPLE) {
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ret = _sdw_program_slave_port_params(bus, s_rt->slave,
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2019-05-01 18:57:35 +03:00
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t_params, dpn_prop->type);
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2018-04-26 16:08:17 +03:00
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if (ret < 0)
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dev_err(&s_rt->slave->dev,
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2019-05-01 18:57:45 +03:00
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"Transport reg write failed for port: %d\n",
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2018-04-26 16:08:17 +03:00
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t_params->port_num);
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}
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return ret;
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}
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static int sdw_program_master_port_params(struct sdw_bus *bus,
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2019-05-01 18:57:35 +03:00
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struct sdw_port_runtime *p_rt)
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2018-04-26 16:08:17 +03:00
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{
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int ret;
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/*
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* we need to set transport and port parameters for the port.
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2019-05-02 13:59:27 +03:00
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* Transport parameters refers to the sample interval, offsets and
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2018-04-26 16:08:17 +03:00
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* hstart/stop etc of the data. Port parameters refers to word
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* length, flow mode etc of the port
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*/
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ret = bus->port_ops->dpn_set_port_transport_params(bus,
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&p_rt->transport_params,
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bus->params.next_bank);
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if (ret < 0)
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return ret;
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return bus->port_ops->dpn_set_port_params(bus,
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2019-05-01 18:57:35 +03:00
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&p_rt->port_params,
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bus->params.next_bank);
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2018-04-26 16:08:17 +03:00
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}
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/**
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* sdw_program_port_params() - Programs transport parameters of Master(s)
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* and Slave(s)
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*
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* @m_rt: Master stream runtime
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*/
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static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
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{
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2021-03-02 12:11:21 +03:00
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struct sdw_slave_runtime *s_rt;
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2018-04-26 16:08:17 +03:00
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struct sdw_bus *bus = m_rt->bus;
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struct sdw_port_runtime *p_rt;
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int ret = 0;
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/* Program transport & port parameters for Slave(s) */
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list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
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list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
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ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
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if (ret < 0)
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return ret;
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}
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}
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/* Program transport & port parameters for Master(s) */
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list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
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ret = sdw_program_master_port_params(bus, p_rt);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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2018-04-26 16:08:23 +03:00
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/**
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* sdw_enable_disable_slave_ports: Enable/disable slave data port
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*
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* @bus: bus instance
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* @s_rt: slave runtime
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* @p_rt: port runtime
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* @en: enable or disable operation
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*
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* This function only sets the enable/disable bits in the relevant bank, the
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* actual enable/disable is done with a bank switch
|
|
|
|
*/
|
|
|
|
static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_slave_runtime *s_rt,
|
|
|
|
struct sdw_port_runtime *p_rt,
|
|
|
|
bool en)
|
2018-04-26 16:08:23 +03:00
|
|
|
{
|
|
|
|
struct sdw_transport_params *t_params = &p_rt->transport_params;
|
|
|
|
u32 addr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (bus->params.next_bank)
|
|
|
|
addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
|
|
|
|
else
|
|
|
|
addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Since bus doesn't support sharing a port across two streams,
|
|
|
|
* it is safe to reset this register
|
|
|
|
*/
|
|
|
|
if (en)
|
2020-03-12 13:01:05 +03:00
|
|
|
ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
|
2018-04-26 16:08:23 +03:00
|
|
|
else
|
2020-03-12 13:01:05 +03:00
|
|
|
ret = sdw_write(s_rt->slave, addr, 0x0);
|
2018-04-26 16:08:23 +03:00
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
dev_err(&s_rt->slave->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"Slave chn_en reg write failed:%d port:%d\n",
|
2018-04-26 16:08:23 +03:00
|
|
|
ret, t_params->port_num);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_port_runtime *p_rt,
|
|
|
|
bool en)
|
2018-04-26 16:08:23 +03:00
|
|
|
{
|
|
|
|
struct sdw_transport_params *t_params = &p_rt->transport_params;
|
|
|
|
struct sdw_bus *bus = m_rt->bus;
|
|
|
|
struct sdw_enable_ch enable_ch;
|
2019-04-11 06:17:00 +03:00
|
|
|
int ret;
|
2018-04-26 16:08:23 +03:00
|
|
|
|
|
|
|
enable_ch.port_num = p_rt->num;
|
|
|
|
enable_ch.ch_mask = p_rt->ch_mask;
|
|
|
|
enable_ch.enable = en;
|
|
|
|
|
|
|
|
/* Perform Master port channel(s) enable/disable */
|
|
|
|
if (bus->port_ops->dpn_port_enable_ch) {
|
|
|
|
ret = bus->port_ops->dpn_port_enable_ch(bus,
|
2019-05-01 18:57:35 +03:00
|
|
|
&enable_ch,
|
|
|
|
bus->params.next_bank);
|
2018-04-26 16:08:23 +03:00
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(bus->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"Master chn_en write failed:%d port:%d\n",
|
2018-04-26 16:08:23 +03:00
|
|
|
ret, t_params->port_num);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
dev_err(bus->dev,
|
|
|
|
"dpn_port_enable_ch not supported, %s failed\n",
|
|
|
|
en ? "enable" : "disable");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_enable_disable_ports() - Enable/disable port(s) for Master and
|
|
|
|
* Slave(s)
|
|
|
|
*
|
|
|
|
* @m_rt: Master stream runtime
|
|
|
|
* @en: mode (enable/disable)
|
|
|
|
*/
|
|
|
|
static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *s_port, *m_port;
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_slave_runtime *s_rt;
|
2018-04-26 16:08:23 +03:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
/* Enable/Disable Slave port(s) */
|
|
|
|
list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
|
|
|
|
list_for_each_entry(s_port, &s_rt->port_list, port_node) {
|
|
|
|
ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
|
2019-05-01 18:57:35 +03:00
|
|
|
s_port, en);
|
2018-04-26 16:08:23 +03:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable/Disable Master port(s) */
|
|
|
|
list_for_each_entry(m_port, &m_rt->port_list, port_node) {
|
|
|
|
ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_prepare_ch prep_ch,
|
|
|
|
enum sdw_port_prep_ops cmd)
|
2018-04-26 16:08:23 +03:00
|
|
|
{
|
|
|
|
const struct sdw_slave_ops *ops = s_rt->slave->ops;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (ops->port_prep) {
|
|
|
|
ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(&s_rt->slave->dev,
|
2019-05-02 13:59:24 +03:00
|
|
|
"Slave Port Prep cmd %d failed: %d\n",
|
|
|
|
cmd, ret);
|
2018-04-26 16:08:23 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_slave_runtime *s_rt,
|
|
|
|
struct sdw_port_runtime *p_rt,
|
|
|
|
bool prep)
|
2018-04-26 16:08:23 +03:00
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct completion *port_ready;
|
2018-04-26 16:08:23 +03:00
|
|
|
struct sdw_dpn_prop *dpn_prop;
|
|
|
|
struct sdw_prepare_ch prep_ch;
|
|
|
|
bool intr = false;
|
|
|
|
int ret = 0, val;
|
|
|
|
u32 addr;
|
|
|
|
|
|
|
|
prep_ch.num = p_rt->num;
|
|
|
|
prep_ch.ch_mask = p_rt->ch_mask;
|
|
|
|
|
|
|
|
dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
|
2019-05-01 18:57:35 +03:00
|
|
|
s_rt->direction,
|
|
|
|
prep_ch.num);
|
2018-04-26 16:08:23 +03:00
|
|
|
if (!dpn_prop) {
|
|
|
|
dev_err(bus->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"Slave Port:%d properties not found\n", prep_ch.num);
|
2018-04-26 16:08:23 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
prep_ch.prepare = prep;
|
|
|
|
|
|
|
|
prep_ch.bank = bus->params.next_bank;
|
|
|
|
|
2020-09-20 22:32:05 +03:00
|
|
|
if (dpn_prop->imp_def_interrupts || !dpn_prop->simple_ch_prep_sm ||
|
|
|
|
bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL)
|
2018-04-26 16:08:23 +03:00
|
|
|
intr = true;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable interrupt before Port prepare.
|
|
|
|
* For Port de-prepare, it is assumed that port
|
|
|
|
* was prepared earlier
|
|
|
|
*/
|
|
|
|
if (prep && intr) {
|
|
|
|
ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
|
2019-05-22 22:47:25 +03:00
|
|
|
dpn_prop->imp_def_interrupts);
|
2018-04-26 16:08:23 +03:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Inform slave about the impending port prepare */
|
|
|
|
sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
|
|
|
|
|
|
|
|
/* Prepare Slave port implementing CP_SM */
|
|
|
|
if (!dpn_prop->simple_ch_prep_sm) {
|
|
|
|
addr = SDW_DPN_PREPARECTRL(p_rt->num);
|
|
|
|
|
|
|
|
if (prep)
|
2020-03-12 13:01:05 +03:00
|
|
|
ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
|
2018-04-26 16:08:23 +03:00
|
|
|
else
|
2020-03-12 13:01:05 +03:00
|
|
|
ret = sdw_write(s_rt->slave, addr, 0x0);
|
2018-04-26 16:08:23 +03:00
|
|
|
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(&s_rt->slave->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"Slave prep_ctrl reg write failed\n");
|
2018-04-26 16:08:23 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Wait for completion on port ready */
|
|
|
|
port_ready = &s_rt->slave->port_ready[prep_ch.num];
|
2021-06-18 17:47:45 +03:00
|
|
|
wait_for_completion_timeout(port_ready,
|
|
|
|
msecs_to_jiffies(dpn_prop->ch_prep_timeout));
|
2018-04-26 16:08:23 +03:00
|
|
|
|
|
|
|
val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
|
2021-06-18 17:47:45 +03:00
|
|
|
if ((val < 0) || (val & p_rt->ch_mask)) {
|
|
|
|
ret = (val < 0) ? val : -ETIMEDOUT;
|
2018-04-26 16:08:23 +03:00
|
|
|
dev_err(&s_rt->slave->dev,
|
2021-06-18 17:47:45 +03:00
|
|
|
"Chn prep failed for port %d: %d\n", prep_ch.num, ret);
|
|
|
|
return ret;
|
2018-04-26 16:08:23 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Inform slaves about ports prepared */
|
|
|
|
sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
|
|
|
|
|
|
|
|
/* Disable interrupt after Port de-prepare */
|
|
|
|
if (!prep && intr)
|
|
|
|
ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
|
2019-05-22 22:47:25 +03:00
|
|
|
dpn_prop->imp_def_interrupts);
|
2018-04-26 16:08:23 +03:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_port_runtime *p_rt,
|
|
|
|
bool prep)
|
2018-04-26 16:08:23 +03:00
|
|
|
{
|
|
|
|
struct sdw_transport_params *t_params = &p_rt->transport_params;
|
|
|
|
struct sdw_bus *bus = m_rt->bus;
|
|
|
|
const struct sdw_master_port_ops *ops = bus->port_ops;
|
|
|
|
struct sdw_prepare_ch prep_ch;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
prep_ch.num = p_rt->num;
|
|
|
|
prep_ch.ch_mask = p_rt->ch_mask;
|
|
|
|
prep_ch.prepare = prep; /* Prepare/De-prepare */
|
|
|
|
prep_ch.bank = bus->params.next_bank;
|
|
|
|
|
|
|
|
/* Pre-prepare/Pre-deprepare port(s) */
|
|
|
|
if (ops->dpn_port_prep) {
|
|
|
|
ret = ops->dpn_port_prep(bus, &prep_ch);
|
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Port prepare failed for port:%d\n",
|
2019-05-01 18:57:35 +03:00
|
|
|
t_params->port_num);
|
2018-04-26 16:08:23 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
|
|
|
|
* Slave(s)
|
|
|
|
*
|
|
|
|
* @m_rt: Master runtime handle
|
|
|
|
* @prep: Prepare or De-prepare
|
|
|
|
*/
|
|
|
|
static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_slave_runtime *s_rt;
|
2018-04-26 16:08:23 +03:00
|
|
|
struct sdw_port_runtime *p_rt;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
/* Prepare/De-prepare Slave port(s) */
|
|
|
|
list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
|
|
|
|
list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
|
|
|
|
ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
|
2019-05-01 18:57:35 +03:00
|
|
|
p_rt, prep);
|
2018-04-26 16:08:23 +03:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Prepare/De-prepare Master port(s) */
|
|
|
|
list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
|
|
|
|
ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:28 +03:00
|
|
|
/**
|
|
|
|
* sdw_notify_config() - Notify bus configuration
|
|
|
|
*
|
|
|
|
* @m_rt: Master runtime handle
|
|
|
|
*
|
|
|
|
* This function notifies the Master(s) and Slave(s) of the
|
|
|
|
* new bus configuration.
|
|
|
|
*/
|
|
|
|
static int sdw_notify_config(struct sdw_master_runtime *m_rt)
|
|
|
|
{
|
|
|
|
struct sdw_slave_runtime *s_rt;
|
|
|
|
struct sdw_bus *bus = m_rt->bus;
|
|
|
|
struct sdw_slave *slave;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (bus->ops->set_bus_conf) {
|
|
|
|
ret = bus->ops->set_bus_conf(bus, &bus->params);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
|
|
|
|
slave = s_rt->slave;
|
|
|
|
|
|
|
|
if (slave->ops->bus_config) {
|
|
|
|
ret = slave->ops->bus_config(slave, &bus->params);
|
2020-01-15 02:52:26 +03:00
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Notify Slave: %d failed\n",
|
2019-05-01 18:57:35 +03:00
|
|
|
slave->dev_num);
|
2020-01-15 02:52:26 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2018-04-26 16:08:28 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_program_params() - Program transport and port parameters for Master(s)
|
|
|
|
* and Slave(s)
|
|
|
|
*
|
|
|
|
* @bus: SDW bus instance
|
2020-01-15 02:52:27 +03:00
|
|
|
* @prepare: true if sdw_program_params() is called by _prepare.
|
2018-04-26 16:08:28 +03:00
|
|
|
*/
|
2020-01-15 02:52:27 +03:00
|
|
|
static int sdw_program_params(struct sdw_bus *bus, bool prepare)
|
2018-04-26 16:08:28 +03:00
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_master_runtime *m_rt;
|
2018-04-26 16:08:28 +03:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
|
2020-01-15 02:52:27 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* this loop walks through all master runtimes for a
|
|
|
|
* bus, but the ports can only be configured while
|
|
|
|
* explicitly preparing a stream or handling an
|
|
|
|
* already-prepared stream otherwise.
|
|
|
|
*/
|
|
|
|
if (!prepare &&
|
|
|
|
m_rt->stream->state == SDW_STREAM_CONFIGURED)
|
|
|
|
continue;
|
|
|
|
|
2018-04-26 16:08:28 +03:00
|
|
|
ret = sdw_program_port_params(m_rt);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(bus->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"Program transport params failed: %d\n", ret);
|
2018-04-26 16:08:28 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = sdw_notify_config(m_rt);
|
|
|
|
if (ret < 0) {
|
2019-05-02 13:59:24 +03:00
|
|
|
dev_err(bus->dev,
|
|
|
|
"Notify bus config failed: %d\n", ret);
|
2018-04-26 16:08:28 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable port(s) on alternate bank for all active streams */
|
|
|
|
if (m_rt->stream->state != SDW_STREAM_ENABLED)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
ret = sdw_enable_disable_ports(m_rt, true);
|
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Enable channel failed: %d\n", ret);
|
2018-04-26 16:08:28 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:16 +03:00
|
|
|
static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
|
2018-04-26 16:08:28 +03:00
|
|
|
{
|
|
|
|
int col_index, row_index;
|
2018-07-27 12:14:16 +03:00
|
|
|
bool multi_link;
|
2018-04-26 16:08:28 +03:00
|
|
|
struct sdw_msg *wr_msg;
|
2019-08-06 03:55:14 +03:00
|
|
|
u8 *wbuf;
|
|
|
|
int ret;
|
2018-04-26 16:08:28 +03:00
|
|
|
u16 addr;
|
|
|
|
|
|
|
|
wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
|
|
|
|
if (!wr_msg)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2018-07-27 12:14:16 +03:00
|
|
|
bus->defer_msg.msg = wr_msg;
|
|
|
|
|
2018-04-26 16:08:28 +03:00
|
|
|
wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
|
|
|
|
if (!wbuf) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto error_1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get row and column index to program register */
|
|
|
|
col_index = sdw_find_col_index(bus->params.col);
|
|
|
|
row_index = sdw_find_row_index(bus->params.row);
|
|
|
|
wbuf[0] = col_index | (row_index << 3);
|
|
|
|
|
|
|
|
if (bus->params.next_bank)
|
|
|
|
addr = SDW_SCP_FRAMECTRL_B1;
|
|
|
|
else
|
|
|
|
addr = SDW_SCP_FRAMECTRL_B0;
|
|
|
|
|
|
|
|
sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
|
2019-05-01 18:57:35 +03:00
|
|
|
SDW_MSG_FLAG_WRITE, wbuf);
|
2018-04-26 16:08:28 +03:00
|
|
|
wr_msg->ssp_sync = true;
|
|
|
|
|
2018-07-27 12:14:16 +03:00
|
|
|
/*
|
|
|
|
* Set the multi_link flag only when both the hardware supports
|
2020-09-01 18:05:53 +03:00
|
|
|
* and hardware-based sync is required
|
2018-07-27 12:14:16 +03:00
|
|
|
*/
|
2020-09-01 18:05:53 +03:00
|
|
|
multi_link = bus->multi_link && (m_rt_count >= bus->hw_sync_min_links);
|
2018-07-27 12:14:16 +03:00
|
|
|
|
|
|
|
if (multi_link)
|
|
|
|
ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
|
|
|
|
else
|
|
|
|
ret = sdw_transfer(bus, wr_msg);
|
|
|
|
|
2021-07-14 06:22:04 +03:00
|
|
|
if (ret < 0 && ret != -ENODATA) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
|
2018-04-26 16:08:28 +03:00
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:16 +03:00
|
|
|
if (!multi_link) {
|
|
|
|
kfree(wr_msg);
|
|
|
|
kfree(wbuf);
|
|
|
|
bus->defer_msg.msg = NULL;
|
|
|
|
bus->params.curr_bank = !bus->params.curr_bank;
|
|
|
|
bus->params.next_bank = !bus->params.next_bank;
|
|
|
|
}
|
2018-04-26 16:08:28 +03:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error:
|
|
|
|
kfree(wbuf);
|
|
|
|
error_1:
|
|
|
|
kfree(wr_msg);
|
2020-09-02 23:26:50 +03:00
|
|
|
bus->defer_msg.msg = NULL;
|
2018-04-26 16:08:28 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:16 +03:00
|
|
|
/**
|
|
|
|
* sdw_ml_sync_bank_switch: Multilink register bank switch
|
|
|
|
*
|
|
|
|
* @bus: SDW bus instance
|
|
|
|
*
|
|
|
|
* Caller function should free the buffers on error
|
|
|
|
*/
|
|
|
|
static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
|
|
|
|
{
|
|
|
|
unsigned long time_left;
|
|
|
|
|
|
|
|
if (!bus->multi_link)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* Wait for completion of transfer */
|
|
|
|
time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
|
|
|
|
bus->bank_switch_timeout);
|
|
|
|
|
|
|
|
if (!time_left) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Controller Timed out on bank switch\n");
|
2018-07-27 12:14:16 +03:00
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
bus->params.curr_bank = !bus->params.curr_bank;
|
|
|
|
bus->params.next_bank = !bus->params.next_bank;
|
|
|
|
|
|
|
|
if (bus->defer_msg.msg) {
|
|
|
|
kfree(bus->defer_msg.msg->buf);
|
|
|
|
kfree(bus->defer_msg.msg);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:28 +03:00
|
|
|
static int do_bank_switch(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_master_runtime *m_rt;
|
2018-04-26 16:08:28 +03:00
|
|
|
const struct sdw_master_ops *ops;
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_bus *bus;
|
2018-07-27 12:14:16 +03:00
|
|
|
bool multi_link = false;
|
2020-09-01 18:05:53 +03:00
|
|
|
int m_rt_count;
|
2018-04-26 16:08:28 +03:00
|
|
|
int ret = 0;
|
|
|
|
|
2020-09-01 18:05:53 +03:00
|
|
|
m_rt_count = stream->m_rt_count;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
|
|
|
ops = bus->ops;
|
|
|
|
|
2020-09-01 18:05:53 +03:00
|
|
|
if (bus->multi_link && m_rt_count >= bus->hw_sync_min_links) {
|
2018-07-27 12:14:16 +03:00
|
|
|
multi_link = true;
|
|
|
|
mutex_lock(&bus->msg_lock);
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Pre-bank switch */
|
|
|
|
if (ops->pre_bank_switch) {
|
|
|
|
ret = ops->pre_bank_switch(bus);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(bus->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"Pre bank switch op failed: %d\n", ret);
|
2018-07-27 12:14:16 +03:00
|
|
|
goto msg_unlock;
|
2018-07-27 12:14:14 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:16 +03:00
|
|
|
/*
|
|
|
|
* Perform Bank switch operation.
|
|
|
|
* For multi link cases, the actual bank switch is
|
|
|
|
* synchronized across all Masters and happens later as a
|
|
|
|
* part of post_bank_switch ops.
|
|
|
|
*/
|
2020-09-01 18:05:53 +03:00
|
|
|
ret = sdw_bank_switch(bus, m_rt_count);
|
2018-04-26 16:08:28 +03:00
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Bank switch failed: %d\n", ret);
|
2018-07-27 12:14:16 +03:00
|
|
|
goto error;
|
2018-04-26 16:08:28 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:16 +03:00
|
|
|
/*
|
|
|
|
* For multi link cases, it is expected that the bank switch is
|
|
|
|
* triggered by the post_bank_switch for the first Master in the list
|
|
|
|
* and for the other Masters the post_bank_switch() should return doing
|
|
|
|
* nothing.
|
|
|
|
*/
|
2018-07-27 12:14:14 +03:00
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
|
|
|
ops = bus->ops;
|
2018-04-26 16:08:28 +03:00
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Post-bank switch */
|
|
|
|
if (ops->post_bank_switch) {
|
|
|
|
ret = ops->post_bank_switch(bus);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(bus->dev,
|
2019-05-02 13:59:24 +03:00
|
|
|
"Post bank switch op failed: %d\n",
|
|
|
|
ret);
|
2018-07-27 12:14:16 +03:00
|
|
|
goto error;
|
2018-07-27 12:14:14 +03:00
|
|
|
}
|
2020-09-01 18:05:53 +03:00
|
|
|
} else if (multi_link) {
|
2018-07-27 12:14:16 +03:00
|
|
|
dev_err(bus->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"Post bank switch ops not implemented\n");
|
2022-03-07 10:40:39 +03:00
|
|
|
ret = -EINVAL;
|
2018-07-27 12:14:16 +03:00
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set the bank switch timeout to default, if not set */
|
|
|
|
if (!bus->bank_switch_timeout)
|
|
|
|
bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
|
|
|
|
|
|
|
|
/* Check if bank switch was successful */
|
|
|
|
ret = sdw_ml_sync_bank_switch(bus);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(bus->dev,
|
2019-05-01 18:57:45 +03:00
|
|
|
"multi link bank switch failed: %d\n", ret);
|
2018-07-27 12:14:16 +03:00
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2020-09-01 18:05:53 +03:00
|
|
|
if (multi_link)
|
2019-06-06 14:22:22 +03:00
|
|
|
mutex_unlock(&bus->msg_lock);
|
2018-07-27 12:14:16 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
error:
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
2020-09-02 23:26:50 +03:00
|
|
|
if (bus->defer_msg.msg) {
|
|
|
|
kfree(bus->defer_msg.msg->buf);
|
|
|
|
kfree(bus->defer_msg.msg);
|
|
|
|
}
|
2018-07-27 12:14:16 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
msg_unlock:
|
|
|
|
|
|
|
|
if (multi_link) {
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
|
|
|
if (mutex_is_locked(&bus->msg_lock))
|
|
|
|
mutex_unlock(&bus->msg_lock);
|
2018-04-26 16:08:28 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:00 +03:00
|
|
|
static struct sdw_port_runtime *sdw_port_alloc(struct list_head *port_list)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *p_rt;
|
|
|
|
|
|
|
|
p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
|
|
|
|
if (!p_rt)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
list_add_tail(&p_rt->port_node, port_list);
|
|
|
|
|
|
|
|
return p_rt;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_port_config(struct sdw_port_runtime *p_rt,
|
|
|
|
struct sdw_port_config *port_config,
|
|
|
|
int port_index)
|
|
|
|
{
|
|
|
|
p_rt->ch_mask = port_config[port_index].ch_mask;
|
|
|
|
p_rt->num = port_config[port_index].num;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* TODO: Check port capabilities for requested configuration
|
|
|
|
*/
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sdw_port_free(struct sdw_port_runtime *p_rt)
|
|
|
|
{
|
|
|
|
list_del(&p_rt->port_node);
|
|
|
|
kfree(p_rt);
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:14 +03:00
|
|
|
static bool sdw_slave_port_allocated(struct sdw_slave_runtime *s_rt)
|
|
|
|
{
|
|
|
|
return !list_empty(&s_rt->port_list);
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:04 +03:00
|
|
|
static void sdw_slave_port_free(struct sdw_slave *slave,
|
|
|
|
struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *p_rt, *_p_rt;
|
|
|
|
struct sdw_master_runtime *m_rt;
|
|
|
|
struct sdw_slave_runtime *s_rt;
|
|
|
|
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
|
|
|
|
if (s_rt->slave != slave)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(p_rt, _p_rt,
|
|
|
|
&s_rt->port_list, port_node) {
|
|
|
|
sdw_port_free(p_rt);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_slave_port_alloc(struct sdw_slave *slave,
|
|
|
|
struct sdw_slave_runtime *s_rt,
|
|
|
|
unsigned int num_config)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *p_rt;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Iterate for number of ports to perform initialization */
|
|
|
|
for (i = 0; i < num_config; i++) {
|
|
|
|
p_rt = sdw_port_alloc(&s_rt->port_list);
|
|
|
|
if (!p_rt)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_slave_port_is_valid_range(struct device *dev, int num)
|
|
|
|
{
|
|
|
|
if (!SDW_VALID_PORT_RANGE(num)) {
|
|
|
|
dev_err(dev, "SoundWire: Invalid port number :%d\n", num);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_slave_port_config(struct sdw_slave *slave,
|
|
|
|
struct sdw_slave_runtime *s_rt,
|
|
|
|
struct sdw_port_config *port_config)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *p_rt;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
i = 0;
|
|
|
|
list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
|
|
|
|
/*
|
|
|
|
* TODO: Check valid port range as defined by DisCo/
|
|
|
|
* slave
|
|
|
|
*/
|
|
|
|
ret = sdw_slave_port_is_valid_range(&slave->dev, port_config[i].num);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = sdw_port_config(p_rt, port_config, i);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:14 +03:00
|
|
|
static bool sdw_master_port_allocated(struct sdw_master_runtime *m_rt)
|
|
|
|
{
|
|
|
|
return !list_empty(&m_rt->port_list);
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:04 +03:00
|
|
|
static void sdw_master_port_free(struct sdw_master_runtime *m_rt)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *p_rt, *_p_rt;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
|
|
|
|
sdw_port_free(p_rt);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_master_port_alloc(struct sdw_master_runtime *m_rt,
|
|
|
|
unsigned int num_ports)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *p_rt;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Iterate for number of ports to perform initialization */
|
|
|
|
for (i = 0; i < num_ports; i++) {
|
|
|
|
p_rt = sdw_port_alloc(&m_rt->port_list);
|
|
|
|
if (!p_rt)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sdw_master_port_config(struct sdw_master_runtime *m_rt,
|
|
|
|
struct sdw_port_config *port_config)
|
|
|
|
{
|
|
|
|
struct sdw_port_runtime *p_rt;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
i = 0;
|
|
|
|
list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
|
|
|
|
ret = sdw_port_config(p_rt, port_config, i);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:07 +03:00
|
|
|
/**
|
2022-01-26 04:17:08 +03:00
|
|
|
* sdw_slave_rt_alloc() - Allocate a Slave runtime handle.
|
2022-01-26 04:17:07 +03:00
|
|
|
*
|
|
|
|
* @slave: Slave handle
|
2022-01-26 04:17:11 +03:00
|
|
|
* @m_rt: Master runtime handle
|
2022-01-26 04:17:07 +03:00
|
|
|
*
|
|
|
|
* This function is to be called with bus_lock held.
|
|
|
|
*/
|
|
|
|
static struct sdw_slave_runtime
|
2022-01-26 04:17:11 +03:00
|
|
|
*sdw_slave_rt_alloc(struct sdw_slave *slave,
|
|
|
|
struct sdw_master_runtime *m_rt)
|
2022-01-26 04:17:07 +03:00
|
|
|
{
|
|
|
|
struct sdw_slave_runtime *s_rt;
|
|
|
|
|
|
|
|
s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
|
|
|
|
if (!s_rt)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&s_rt->port_list);
|
|
|
|
s_rt->slave = slave;
|
|
|
|
|
2022-01-26 04:17:11 +03:00
|
|
|
list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
|
|
|
|
|
2022-01-26 04:17:07 +03:00
|
|
|
return s_rt;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:08 +03:00
|
|
|
/**
|
|
|
|
* sdw_slave_rt_config() - Configure a Slave runtime handle.
|
|
|
|
*
|
|
|
|
* @s_rt: Slave runtime handle
|
|
|
|
* @stream_config: Stream configuration
|
|
|
|
*
|
|
|
|
* This function is to be called with bus_lock held.
|
|
|
|
*/
|
|
|
|
static int sdw_slave_rt_config(struct sdw_slave_runtime *s_rt,
|
|
|
|
struct sdw_stream_config *stream_config)
|
|
|
|
{
|
|
|
|
s_rt->ch_count = stream_config->ch_count;
|
|
|
|
s_rt->direction = stream_config->direction;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:13 +03:00
|
|
|
static struct sdw_slave_runtime *sdw_slave_rt_find(struct sdw_slave *slave,
|
|
|
|
struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
struct sdw_slave_runtime *s_rt, *_s_rt;
|
|
|
|
struct sdw_master_runtime *m_rt;
|
|
|
|
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
/* Retrieve Slave runtime handle */
|
|
|
|
list_for_each_entry_safe(s_rt, _s_rt,
|
|
|
|
&m_rt->slave_rt_list, m_rt_node) {
|
|
|
|
if (s_rt->slave == slave)
|
|
|
|
return s_rt;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:10 +03:00
|
|
|
/**
|
|
|
|
* sdw_slave_rt_free() - Free Slave(s) runtime handle
|
|
|
|
*
|
|
|
|
* @slave: Slave handle.
|
|
|
|
* @stream: Stream runtime handle.
|
|
|
|
*
|
|
|
|
* This function is to be called with bus_lock held.
|
|
|
|
*/
|
|
|
|
static void sdw_slave_rt_free(struct sdw_slave *slave,
|
|
|
|
struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2022-01-26 04:17:13 +03:00
|
|
|
struct sdw_slave_runtime *s_rt;
|
2022-01-26 04:17:10 +03:00
|
|
|
|
2022-01-26 04:17:13 +03:00
|
|
|
s_rt = sdw_slave_rt_find(slave, stream);
|
|
|
|
if (s_rt) {
|
|
|
|
list_del(&s_rt->m_rt_node);
|
|
|
|
kfree(s_rt);
|
2022-01-26 04:17:10 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
static struct sdw_master_runtime
|
2022-01-26 04:17:06 +03:00
|
|
|
*sdw_master_rt_find(struct sdw_bus *bus,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_stream_runtime *stream)
|
2018-07-27 12:14:14 +03:00
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_master_runtime *m_rt;
|
2018-07-27 12:14:14 +03:00
|
|
|
|
|
|
|
/* Retrieve Bus handle if already available */
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
if (m_rt->bus == bus)
|
|
|
|
return m_rt;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:08 +03:00
|
|
|
/**
|
2022-01-26 04:17:06 +03:00
|
|
|
* sdw_master_rt_alloc() - Allocates a Master runtime handle
|
2018-04-26 16:08:08 +03:00
|
|
|
*
|
|
|
|
* @bus: SDW bus instance
|
|
|
|
* @stream: Stream runtime handle.
|
|
|
|
*
|
|
|
|
* This function is to be called with bus_lock held.
|
|
|
|
*/
|
|
|
|
static struct sdw_master_runtime
|
2022-01-26 04:17:06 +03:00
|
|
|
*sdw_master_rt_alloc(struct sdw_bus *bus,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_stream_runtime *stream)
|
2018-04-26 16:08:08 +03:00
|
|
|
{
|
|
|
|
struct sdw_master_runtime *m_rt;
|
|
|
|
|
|
|
|
m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
|
|
|
|
if (!m_rt)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
/* Initialization of Master runtime handle */
|
2018-04-26 16:08:13 +03:00
|
|
|
INIT_LIST_HEAD(&m_rt->port_list);
|
2018-04-26 16:08:08 +03:00
|
|
|
INIT_LIST_HEAD(&m_rt->slave_rt_list);
|
2018-07-27 12:14:14 +03:00
|
|
|
list_add_tail(&m_rt->stream_node, &stream->master_list);
|
2018-04-26 16:08:08 +03:00
|
|
|
|
|
|
|
list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
|
|
|
|
|
|
|
|
m_rt->bus = bus;
|
|
|
|
m_rt->stream = stream;
|
|
|
|
|
|
|
|
return m_rt;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:06 +03:00
|
|
|
/**
|
|
|
|
* sdw_master_rt_config() - Configure Master runtime handle
|
|
|
|
*
|
|
|
|
* @m_rt: Master runtime handle
|
|
|
|
* @stream_config: Stream configuration
|
|
|
|
*
|
|
|
|
* This function is to be called with bus_lock held.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int sdw_master_rt_config(struct sdw_master_runtime *m_rt,
|
|
|
|
struct sdw_stream_config *stream_config)
|
|
|
|
{
|
|
|
|
m_rt->ch_count = stream_config->ch_count;
|
|
|
|
m_rt->direction = stream_config->direction;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:08 +03:00
|
|
|
/**
|
2022-01-26 04:17:10 +03:00
|
|
|
* sdw_master_rt_free() - Free Master runtime handle
|
2018-04-26 16:08:08 +03:00
|
|
|
*
|
2018-07-27 12:14:14 +03:00
|
|
|
* @m_rt: Master runtime node
|
2018-04-26 16:08:08 +03:00
|
|
|
* @stream: Stream runtime handle.
|
|
|
|
*
|
|
|
|
* This function is to be called with bus_lock held
|
|
|
|
* It frees the Master runtime handle and associated Slave(s) runtime
|
2022-01-26 04:17:10 +03:00
|
|
|
* handle. If this is called first then sdw_slave_rt_free() will have
|
2018-04-26 16:08:08 +03:00
|
|
|
* no effect as Slave(s) runtime handle would already be freed up.
|
|
|
|
*/
|
2022-01-26 04:17:10 +03:00
|
|
|
static void sdw_master_rt_free(struct sdw_master_runtime *m_rt,
|
|
|
|
struct sdw_stream_runtime *stream)
|
2018-04-26 16:08:08 +03:00
|
|
|
{
|
|
|
|
struct sdw_slave_runtime *s_rt, *_s_rt;
|
|
|
|
|
2018-07-27 12:14:10 +03:00
|
|
|
list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
|
2022-01-26 04:17:04 +03:00
|
|
|
sdw_slave_port_free(s_rt->slave, stream);
|
2022-01-26 04:17:10 +03:00
|
|
|
sdw_slave_rt_free(s_rt->slave, stream);
|
2018-07-27 12:14:10 +03:00
|
|
|
}
|
2018-04-26 16:08:08 +03:00
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
list_del(&m_rt->stream_node);
|
2018-04-26 16:08:08 +03:00
|
|
|
list_del(&m_rt->bus_node);
|
2018-07-27 12:14:14 +03:00
|
|
|
kfree(m_rt);
|
2018-04-26 16:08:08 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_config_stream() - Configure the allocated stream
|
|
|
|
*
|
|
|
|
* @dev: SDW device
|
|
|
|
* @stream: SoundWire stream
|
|
|
|
* @stream_config: Stream configuration for audio stream
|
|
|
|
* @is_slave: is API called from Slave or Master
|
|
|
|
*
|
|
|
|
* This function is to be called with bus_lock held.
|
|
|
|
*/
|
|
|
|
static int sdw_config_stream(struct device *dev,
|
2019-05-01 18:57:35 +03:00
|
|
|
struct sdw_stream_runtime *stream,
|
|
|
|
struct sdw_stream_config *stream_config,
|
|
|
|
bool is_slave)
|
2018-04-26 16:08:08 +03:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Update the stream rate, channel and bps based on data
|
|
|
|
* source. For more than one data source (multilink),
|
|
|
|
* match the rate, bps, stream type and increment number of channels.
|
|
|
|
*
|
|
|
|
* If rate/bps is zero, it means the values are not set, so skip
|
|
|
|
* comparison and allow the value to be set and stored in stream
|
|
|
|
*/
|
|
|
|
if (stream->params.rate &&
|
2019-05-01 18:57:35 +03:00
|
|
|
stream->params.rate != stream_config->frame_rate) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(dev, "rate not matching, stream:%s\n", stream->name);
|
2018-04-26 16:08:08 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stream->params.bps &&
|
2019-05-01 18:57:35 +03:00
|
|
|
stream->params.bps != stream_config->bps) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(dev, "bps not matching, stream:%s\n", stream->name);
|
2018-04-26 16:08:08 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
stream->type = stream_config->type;
|
|
|
|
stream->params.rate = stream_config->frame_rate;
|
|
|
|
stream->params.bps = stream_config->bps;
|
|
|
|
|
|
|
|
/* TODO: Update this check during Device-device support */
|
|
|
|
if (is_slave)
|
|
|
|
stream->params.ch_count += stream_config->ch_count;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2022-01-26 04:17:09 +03:00
|
|
|
* sdw_get_slave_dpn_prop() - Get Slave port capabilities
|
2018-04-26 16:08:08 +03:00
|
|
|
*
|
2022-01-26 04:17:09 +03:00
|
|
|
* @slave: Slave handle
|
|
|
|
* @direction: Data direction.
|
|
|
|
* @port_num: Port number
|
2018-04-26 16:08:08 +03:00
|
|
|
*/
|
2022-01-26 04:17:09 +03:00
|
|
|
struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
|
|
|
|
enum sdw_data_direction direction,
|
|
|
|
unsigned int port_num)
|
2018-04-26 16:08:08 +03:00
|
|
|
{
|
2022-01-26 04:17:09 +03:00
|
|
|
struct sdw_dpn_prop *dpn_prop;
|
|
|
|
u8 num_ports;
|
|
|
|
int i;
|
2018-04-26 16:08:08 +03:00
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
if (direction == SDW_DATA_DIR_TX) {
|
|
|
|
num_ports = hweight32(slave->prop.source_ports);
|
|
|
|
dpn_prop = slave->prop.src_dpn_prop;
|
|
|
|
} else {
|
|
|
|
num_ports = hweight32(slave->prop.sink_ports);
|
|
|
|
dpn_prop = slave->prop.sink_dpn_prop;
|
2018-07-27 12:14:16 +03:00
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
for (i = 0; i < num_ports; i++) {
|
|
|
|
if (dpn_prop[i].num == port_num)
|
|
|
|
return &dpn_prop[i];
|
2018-04-26 16:08:08 +03:00
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
return NULL;
|
|
|
|
}
|
2018-04-26 16:08:13 +03:00
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
/**
|
|
|
|
* sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
|
|
|
|
*
|
|
|
|
* @stream: SoundWire stream
|
|
|
|
*
|
|
|
|
* Acquire bus_lock for each of the master runtime(m_rt) part of this
|
|
|
|
* stream to reconfigure the bus.
|
|
|
|
* NOTE: This function is called from SoundWire stream ops and is
|
|
|
|
* expected that a global lock is held before acquiring bus_lock.
|
|
|
|
*/
|
|
|
|
static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
struct sdw_master_runtime *m_rt;
|
|
|
|
struct sdw_bus *bus;
|
2018-07-27 12:14:16 +03:00
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
/* Iterate for all Master(s) in Master list */
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
2018-07-27 12:14:09 +03:00
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
mutex_lock(&bus->bus_lock);
|
|
|
|
}
|
2018-04-26 16:08:08 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2022-01-26 04:17:09 +03:00
|
|
|
* sdw_release_bus_lock: Release bus lock for all Master runtime(s)
|
2018-04-26 16:08:08 +03:00
|
|
|
*
|
|
|
|
* @stream: SoundWire stream
|
2018-07-27 12:14:08 +03:00
|
|
|
*
|
2022-01-26 04:17:09 +03:00
|
|
|
* Release the previously held bus_lock after reconfiguring the bus.
|
|
|
|
* NOTE: This function is called from SoundWire stream ops and is
|
|
|
|
* expected that a global lock is held before releasing bus_lock.
|
2018-04-26 16:08:08 +03:00
|
|
|
*/
|
2022-01-26 04:17:09 +03:00
|
|
|
static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
struct sdw_master_runtime *m_rt;
|
|
|
|
struct sdw_bus *bus;
|
|
|
|
|
|
|
|
/* Iterate for all Master(s) in Master list */
|
|
|
|
list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
|
|
|
mutex_unlock(&bus->bus_lock);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _sdw_prepare_stream(struct sdw_stream_runtime *stream,
|
|
|
|
bool update_params)
|
2018-04-26 16:08:08 +03:00
|
|
|
{
|
|
|
|
struct sdw_master_runtime *m_rt;
|
2022-01-26 04:17:09 +03:00
|
|
|
struct sdw_bus *bus = NULL;
|
|
|
|
struct sdw_master_prop *prop;
|
|
|
|
struct sdw_bus_params params;
|
2018-04-26 16:08:08 +03:00
|
|
|
int ret;
|
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
/* Prepare Master(s) and Slave(s) port(s) associated with stream */
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
|
|
|
prop = &bus->prop;
|
|
|
|
memcpy(¶ms, &bus->params, sizeof(params));
|
2018-04-26 16:08:08 +03:00
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
/* TODO: Support Asynchronous mode */
|
|
|
|
if ((prop->max_clk_freq % stream->params.rate) != 0) {
|
|
|
|
dev_err(bus->dev, "Async mode not supported\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2020-01-15 02:52:25 +03:00
|
|
|
if (!update_params)
|
|
|
|
goto program_params;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Increment cumulative bus bandwidth */
|
|
|
|
/* TODO: Update this during Device-Device support */
|
|
|
|
bus->params.bandwidth += m_rt->stream->params.rate *
|
|
|
|
m_rt->ch_count * m_rt->stream->params.bps;
|
|
|
|
|
2019-08-13 11:35:46 +03:00
|
|
|
/* Compute params */
|
|
|
|
if (bus->compute_params) {
|
|
|
|
ret = bus->compute_params(bus);
|
|
|
|
if (ret < 0) {
|
2021-03-23 03:58:54 +03:00
|
|
|
dev_err(bus->dev, "Compute params failed: %d\n",
|
2019-08-13 11:35:46 +03:00
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-01-15 02:52:25 +03:00
|
|
|
program_params:
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Program params */
|
2020-01-15 02:52:27 +03:00
|
|
|
ret = sdw_program_params(bus, true);
|
2018-07-27 12:14:14 +03:00
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Program params failed: %d\n", ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
goto restore_params;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
}
|
|
|
|
|
2019-08-06 03:55:14 +03:00
|
|
|
if (!bus) {
|
|
|
|
pr_err("Configuration error in %s\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:33 +03:00
|
|
|
ret = do_bank_switch(stream);
|
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Bank switch failed: %d\n", ret);
|
2018-04-26 16:08:33 +03:00
|
|
|
goto restore_params;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
|
|
|
|
|
|
|
/* Prepare port(s) on the new clock configuration */
|
|
|
|
ret = sdw_prep_deprep_ports(m_rt, true);
|
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
|
2019-05-01 18:57:35 +03:00
|
|
|
ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
stream->state = SDW_STREAM_PREPARED;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
restore_params:
|
|
|
|
memcpy(&bus->params, ¶ms, sizeof(params));
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_prepare_stream() - Prepare SoundWire stream
|
|
|
|
*
|
|
|
|
* @stream: Soundwire stream
|
|
|
|
*
|
2018-05-08 21:14:57 +03:00
|
|
|
* Documentation/driver-api/soundwire/stream.rst explains this API in detail
|
2018-04-26 16:08:33 +03:00
|
|
|
*/
|
|
|
|
int sdw_prepare_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2020-01-15 02:52:25 +03:00
|
|
|
bool update_params = true;
|
2020-01-15 02:52:24 +03:00
|
|
|
int ret;
|
2018-04-26 16:08:33 +03:00
|
|
|
|
|
|
|
if (!stream) {
|
2019-05-01 18:57:45 +03:00
|
|
|
pr_err("SoundWire: Handle not found for stream\n");
|
2018-04-26 16:08:33 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_acquire_bus_lock(stream);
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2020-01-15 02:52:24 +03:00
|
|
|
if (stream->state == SDW_STREAM_PREPARED) {
|
|
|
|
ret = 0;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
if (stream->state != SDW_STREAM_CONFIGURED &&
|
|
|
|
stream->state != SDW_STREAM_DEPREPARED &&
|
|
|
|
stream->state != SDW_STREAM_DISABLED) {
|
|
|
|
pr_err("%s: %s: inconsistent state state %d\n",
|
|
|
|
__func__, stream->name, stream->state);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2020-01-15 02:52:25 +03:00
|
|
|
/*
|
|
|
|
* when the stream is DISABLED, this means sdw_prepare_stream()
|
|
|
|
* is called as a result of an underflow or a resume operation.
|
|
|
|
* In this case, the bus parameters shall not be recomputed, but
|
|
|
|
* still need to be re-applied
|
|
|
|
*/
|
|
|
|
if (stream->state == SDW_STREAM_DISABLED)
|
|
|
|
update_params = false;
|
|
|
|
|
|
|
|
ret = _sdw_prepare_stream(stream, update_params);
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
state_err:
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_release_bus_lock(stream);
|
2018-04-26 16:08:33 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_prepare_stream);
|
|
|
|
|
|
|
|
static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_master_runtime *m_rt;
|
2018-07-27 12:14:14 +03:00
|
|
|
struct sdw_bus *bus = NULL;
|
2018-04-26 16:08:33 +03:00
|
|
|
int ret;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Enable Master(s) and Slave(s) port(s) associated with stream */
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Program params */
|
2020-01-15 02:52:27 +03:00
|
|
|
ret = sdw_program_params(bus, false);
|
2018-07-27 12:14:14 +03:00
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Program params failed: %d\n", ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable port(s) */
|
|
|
|
ret = sdw_enable_disable_ports(m_rt, true);
|
|
|
|
if (ret < 0) {
|
2019-05-02 13:59:24 +03:00
|
|
|
dev_err(bus->dev,
|
|
|
|
"Enable port(s) failed ret: %d\n", ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
}
|
|
|
|
|
2019-08-06 03:55:14 +03:00
|
|
|
if (!bus) {
|
|
|
|
pr_err("Configuration error in %s\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:33 +03:00
|
|
|
ret = do_bank_switch(stream);
|
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Bank switch failed: %d\n", ret);
|
2018-04-26 16:08:33 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
stream->state = SDW_STREAM_ENABLED;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_enable_stream() - Enable SoundWire stream
|
|
|
|
*
|
|
|
|
* @stream: Soundwire stream
|
|
|
|
*
|
2018-05-08 21:14:57 +03:00
|
|
|
* Documentation/driver-api/soundwire/stream.rst explains this API in detail
|
2018-04-26 16:08:33 +03:00
|
|
|
*/
|
|
|
|
int sdw_enable_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
int ret;
|
2018-04-26 16:08:33 +03:00
|
|
|
|
|
|
|
if (!stream) {
|
2019-05-01 18:57:45 +03:00
|
|
|
pr_err("SoundWire: Handle not found for stream\n");
|
2018-04-26 16:08:33 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_acquire_bus_lock(stream);
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2022-01-26 04:17:15 +03:00
|
|
|
if (stream->state == SDW_STREAM_ENABLED) {
|
|
|
|
ret = 0;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
if (stream->state != SDW_STREAM_PREPARED &&
|
|
|
|
stream->state != SDW_STREAM_DISABLED) {
|
|
|
|
pr_err("%s: %s: inconsistent state state %d\n",
|
|
|
|
__func__, stream->name, stream->state);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:33 +03:00
|
|
|
ret = _sdw_enable_stream(stream);
|
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
state_err:
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_release_bus_lock(stream);
|
2018-04-26 16:08:33 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_enable_stream);
|
|
|
|
|
|
|
|
static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_master_runtime *m_rt;
|
2018-04-26 16:08:33 +03:00
|
|
|
int ret;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_bus *bus = m_rt->bus;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Disable port(s) */
|
|
|
|
ret = sdw_enable_disable_ports(m_rt, false);
|
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
}
|
|
|
|
stream->state = SDW_STREAM_DISABLED;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_bus *bus = m_rt->bus;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Program params */
|
2020-01-15 02:52:27 +03:00
|
|
|
ret = sdw_program_params(bus, false);
|
2018-07-27 12:14:14 +03:00
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Program params failed: %d\n", ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
}
|
|
|
|
|
2019-08-06 03:55:13 +03:00
|
|
|
ret = do_bank_switch(stream);
|
|
|
|
if (ret < 0) {
|
2019-08-06 03:55:14 +03:00
|
|
|
pr_err("Bank switch failed: %d\n", ret);
|
2019-08-06 03:55:13 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* make sure alternate bank (previous current) is also disabled */
|
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_bus *bus = m_rt->bus;
|
|
|
|
|
2019-08-06 03:55:13 +03:00
|
|
|
/* Disable port(s) */
|
|
|
|
ret = sdw_enable_disable_ports(m_rt, false);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2018-04-26 16:08:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_disable_stream() - Disable SoundWire stream
|
|
|
|
*
|
|
|
|
* @stream: Soundwire stream
|
|
|
|
*
|
2018-05-08 21:14:57 +03:00
|
|
|
* Documentation/driver-api/soundwire/stream.rst explains this API in detail
|
2018-04-26 16:08:33 +03:00
|
|
|
*/
|
|
|
|
int sdw_disable_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
int ret;
|
2018-04-26 16:08:33 +03:00
|
|
|
|
|
|
|
if (!stream) {
|
2019-05-01 18:57:45 +03:00
|
|
|
pr_err("SoundWire: Handle not found for stream\n");
|
2018-04-26 16:08:33 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_acquire_bus_lock(stream);
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2022-01-26 04:17:15 +03:00
|
|
|
if (stream->state == SDW_STREAM_DISABLED) {
|
|
|
|
ret = 0;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
if (stream->state != SDW_STREAM_ENABLED) {
|
|
|
|
pr_err("%s: %s: inconsistent state state %d\n",
|
|
|
|
__func__, stream->name, stream->state);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:33 +03:00
|
|
|
ret = _sdw_disable_stream(stream);
|
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
state_err:
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_release_bus_lock(stream);
|
2018-04-26 16:08:33 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_disable_stream);
|
|
|
|
|
|
|
|
static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
struct sdw_master_runtime *m_rt;
|
|
|
|
struct sdw_bus *bus;
|
2018-04-26 16:08:33 +03:00
|
|
|
int ret = 0;
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
|
|
|
bus = m_rt->bus;
|
|
|
|
/* De-prepare port(s) */
|
|
|
|
ret = sdw_prep_deprep_ports(m_rt, false);
|
|
|
|
if (ret < 0) {
|
2019-05-02 13:59:24 +03:00
|
|
|
dev_err(bus->dev,
|
|
|
|
"De-prepare port(s) failed: %d\n", ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* TODO: Update this during Device-Device support */
|
|
|
|
bus->params.bandwidth -= m_rt->stream->params.rate *
|
|
|
|
m_rt->ch_count * m_rt->stream->params.bps;
|
2018-04-26 16:08:33 +03:00
|
|
|
|
2020-09-08 16:15:20 +03:00
|
|
|
/* Compute params */
|
|
|
|
if (bus->compute_params) {
|
|
|
|
ret = bus->compute_params(bus);
|
|
|
|
if (ret < 0) {
|
2021-03-23 03:58:54 +03:00
|
|
|
dev_err(bus->dev, "Compute params failed: %d\n",
|
2020-09-08 16:15:20 +03:00
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
/* Program params */
|
2020-01-15 02:52:27 +03:00
|
|
|
ret = sdw_program_params(bus, false);
|
2018-07-27 12:14:14 +03:00
|
|
|
if (ret < 0) {
|
2019-05-01 18:57:45 +03:00
|
|
|
dev_err(bus->dev, "Program params failed: %d\n", ret);
|
2018-07-27 12:14:14 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2018-04-26 16:08:33 +03:00
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
stream->state = SDW_STREAM_DEPREPARED;
|
2018-04-26 16:08:33 +03:00
|
|
|
return do_bank_switch(stream);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_deprepare_stream() - Deprepare SoundWire stream
|
|
|
|
*
|
|
|
|
* @stream: Soundwire stream
|
|
|
|
*
|
2018-05-08 21:14:57 +03:00
|
|
|
* Documentation/driver-api/soundwire/stream.rst explains this API in detail
|
2018-04-26 16:08:33 +03:00
|
|
|
*/
|
|
|
|
int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
2019-08-06 03:55:14 +03:00
|
|
|
int ret;
|
2018-04-26 16:08:33 +03:00
|
|
|
|
|
|
|
if (!stream) {
|
2019-05-01 18:57:45 +03:00
|
|
|
pr_err("SoundWire: Handle not found for stream\n");
|
2018-04-26 16:08:33 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_acquire_bus_lock(stream);
|
2020-01-15 02:52:23 +03:00
|
|
|
|
2022-01-26 04:17:15 +03:00
|
|
|
if (stream->state == SDW_STREAM_DEPREPARED) {
|
|
|
|
ret = 0;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
if (stream->state != SDW_STREAM_PREPARED &&
|
|
|
|
stream->state != SDW_STREAM_DISABLED) {
|
|
|
|
pr_err("%s: %s: inconsistent state state %d\n",
|
|
|
|
__func__, stream->name, stream->state);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto state_err;
|
|
|
|
}
|
|
|
|
|
2018-04-26 16:08:33 +03:00
|
|
|
ret = _sdw_deprepare_stream(stream);
|
|
|
|
|
2020-01-15 02:52:23 +03:00
|
|
|
state_err:
|
2018-07-27 12:14:14 +03:00
|
|
|
sdw_release_bus_lock(stream);
|
2018-04-26 16:08:33 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_deprepare_stream);
|
2020-06-30 21:43:53 +03:00
|
|
|
|
|
|
|
static int set_stream(struct snd_pcm_substream *substream,
|
|
|
|
struct sdw_stream_runtime *sdw_stream)
|
|
|
|
{
|
|
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
|
|
struct snd_soc_dai *dai;
|
|
|
|
int ret = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Set stream pointer on all DAIs */
|
|
|
|
for_each_rtd_dais(rtd, i, dai) {
|
2021-12-24 05:10:31 +03:00
|
|
|
ret = snd_soc_dai_set_stream(dai, sdw_stream, substream->stream);
|
2020-06-30 21:43:53 +03:00
|
|
|
if (ret < 0) {
|
2021-03-23 03:58:54 +03:00
|
|
|
dev_err(rtd->dev, "failed to set stream pointer on dai %s\n", dai->name);
|
2020-06-30 21:43:53 +03:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
/**
|
|
|
|
* sdw_alloc_stream() - Allocate and return stream runtime
|
|
|
|
*
|
|
|
|
* @stream_name: SoundWire stream name
|
|
|
|
*
|
|
|
|
* Allocates a SoundWire stream runtime instance.
|
|
|
|
* sdw_alloc_stream should be called only once per stream. Typically
|
|
|
|
* invoked from ALSA/ASoC machine/platform driver.
|
|
|
|
*/
|
|
|
|
struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name)
|
|
|
|
{
|
|
|
|
struct sdw_stream_runtime *stream;
|
|
|
|
|
|
|
|
stream = kzalloc(sizeof(*stream), GFP_KERNEL);
|
|
|
|
if (!stream)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
stream->name = stream_name;
|
|
|
|
INIT_LIST_HEAD(&stream->master_list);
|
|
|
|
stream->state = SDW_STREAM_ALLOCATED;
|
|
|
|
stream->m_rt_count = 0;
|
|
|
|
|
|
|
|
return stream;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_alloc_stream);
|
|
|
|
|
2020-06-30 21:43:53 +03:00
|
|
|
/**
|
|
|
|
* sdw_startup_stream() - Startup SoundWire stream
|
|
|
|
*
|
2020-07-15 12:57:02 +03:00
|
|
|
* @sdw_substream: Soundwire stream
|
2020-06-30 21:43:53 +03:00
|
|
|
*
|
|
|
|
* Documentation/driver-api/soundwire/stream.rst explains this API in detail
|
|
|
|
*/
|
|
|
|
int sdw_startup_stream(void *sdw_substream)
|
|
|
|
{
|
|
|
|
struct snd_pcm_substream *substream = sdw_substream;
|
|
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
|
|
struct sdw_stream_runtime *sdw_stream;
|
|
|
|
char *name;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
|
|
|
name = kasprintf(GFP_KERNEL, "%s-Playback", substream->name);
|
|
|
|
else
|
|
|
|
name = kasprintf(GFP_KERNEL, "%s-Capture", substream->name);
|
|
|
|
|
|
|
|
if (!name)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
sdw_stream = sdw_alloc_stream(name);
|
|
|
|
if (!sdw_stream) {
|
2021-03-23 03:58:54 +03:00
|
|
|
dev_err(rtd->dev, "alloc stream failed for substream DAI %s\n", substream->name);
|
2020-06-30 21:43:53 +03:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = set_stream(substream, sdw_stream);
|
|
|
|
if (ret < 0)
|
|
|
|
goto release_stream;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
release_stream:
|
|
|
|
sdw_release_stream(sdw_stream);
|
|
|
|
set_stream(substream, NULL);
|
|
|
|
error:
|
|
|
|
kfree(name);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_startup_stream);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_shutdown_stream() - Shutdown SoundWire stream
|
|
|
|
*
|
2020-07-15 12:57:02 +03:00
|
|
|
* @sdw_substream: Soundwire stream
|
2020-06-30 21:43:53 +03:00
|
|
|
*
|
|
|
|
* Documentation/driver-api/soundwire/stream.rst explains this API in detail
|
|
|
|
*/
|
|
|
|
void sdw_shutdown_stream(void *sdw_substream)
|
|
|
|
{
|
|
|
|
struct snd_pcm_substream *substream = sdw_substream;
|
|
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
|
|
struct sdw_stream_runtime *sdw_stream;
|
|
|
|
struct snd_soc_dai *dai;
|
|
|
|
|
|
|
|
/* Find stream from first CPU DAI */
|
|
|
|
dai = asoc_rtd_to_cpu(rtd, 0);
|
|
|
|
|
2021-12-24 05:10:31 +03:00
|
|
|
sdw_stream = snd_soc_dai_get_stream(dai, substream->stream);
|
2020-06-30 21:43:53 +03:00
|
|
|
|
2020-09-03 23:47:36 +03:00
|
|
|
if (IS_ERR(sdw_stream)) {
|
2021-03-23 03:58:54 +03:00
|
|
|
dev_err(rtd->dev, "no stream found for DAI %s\n", dai->name);
|
2020-06-30 21:43:53 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* release memory */
|
|
|
|
kfree(sdw_stream->name);
|
|
|
|
sdw_release_stream(sdw_stream);
|
|
|
|
|
|
|
|
/* clear DAI data */
|
|
|
|
set_stream(substream, NULL);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_shutdown_stream);
|
2022-01-26 04:17:09 +03:00
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_release_stream() - Free the assigned stream runtime
|
|
|
|
*
|
|
|
|
* @stream: SoundWire stream runtime
|
|
|
|
*
|
|
|
|
* sdw_release_stream should be called only once per stream
|
|
|
|
*/
|
|
|
|
void sdw_release_stream(struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
kfree(stream);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_release_stream);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_stream_add_master() - Allocate and add master runtime to a stream
|
|
|
|
*
|
|
|
|
* @bus: SDW Bus instance
|
|
|
|
* @stream_config: Stream configuration for audio stream
|
|
|
|
* @port_config: Port configuration for audio stream
|
|
|
|
* @num_ports: Number of ports
|
|
|
|
* @stream: SoundWire stream
|
|
|
|
*/
|
|
|
|
int sdw_stream_add_master(struct sdw_bus *bus,
|
|
|
|
struct sdw_stream_config *stream_config,
|
|
|
|
struct sdw_port_config *port_config,
|
|
|
|
unsigned int num_ports,
|
|
|
|
struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
struct sdw_master_runtime *m_rt;
|
2022-01-26 04:17:12 +03:00
|
|
|
bool alloc_master_rt = true;
|
2022-01-26 04:17:09 +03:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
mutex_lock(&bus->bus_lock);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* For multi link streams, add the second master only if
|
|
|
|
* the bus supports it.
|
|
|
|
* Check if bus->multi_link is set
|
|
|
|
*/
|
|
|
|
if (!bus->multi_link && stream->m_rt_count > 0) {
|
|
|
|
dev_err(bus->dev,
|
|
|
|
"Multilink not supported, link %d\n", bus->link_id);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto unlock;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* check if Master is already allocated (e.g. as a result of Slave adding
|
|
|
|
* it first), if so skip allocation and go to configuration
|
|
|
|
*/
|
|
|
|
m_rt = sdw_master_rt_find(bus, stream);
|
2022-01-26 04:17:12 +03:00
|
|
|
if (m_rt) {
|
|
|
|
alloc_master_rt = false;
|
2022-01-26 04:17:09 +03:00
|
|
|
goto skip_alloc_master_rt;
|
2022-01-26 04:17:12 +03:00
|
|
|
}
|
2022-01-26 04:17:09 +03:00
|
|
|
|
|
|
|
m_rt = sdw_master_rt_alloc(bus, stream);
|
|
|
|
if (!m_rt) {
|
|
|
|
dev_err(bus->dev, "Master runtime alloc failed for stream:%s\n", stream->name);
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2022-01-26 04:17:12 +03:00
|
|
|
skip_alloc_master_rt:
|
|
|
|
|
2022-01-26 04:17:14 +03:00
|
|
|
if (sdw_master_port_allocated(m_rt))
|
|
|
|
goto skip_alloc_master_port;
|
|
|
|
|
2022-01-26 04:17:12 +03:00
|
|
|
ret = sdw_master_port_alloc(m_rt, num_ports);
|
|
|
|
if (ret)
|
|
|
|
goto alloc_error;
|
|
|
|
|
|
|
|
stream->m_rt_count++;
|
2022-01-26 04:17:09 +03:00
|
|
|
|
2022-01-26 04:17:14 +03:00
|
|
|
skip_alloc_master_port:
|
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
ret = sdw_master_rt_config(m_rt, stream_config);
|
|
|
|
if (ret < 0)
|
|
|
|
goto unlock;
|
|
|
|
|
|
|
|
ret = sdw_config_stream(bus->dev, stream, stream_config, false);
|
|
|
|
if (ret)
|
2022-01-26 04:17:12 +03:00
|
|
|
goto unlock;
|
2022-01-26 04:17:09 +03:00
|
|
|
|
|
|
|
ret = sdw_master_port_config(m_rt, port_config);
|
|
|
|
|
|
|
|
goto unlock;
|
|
|
|
|
2022-01-26 04:17:12 +03:00
|
|
|
alloc_error:
|
|
|
|
/*
|
|
|
|
* we only cleanup what was allocated in this routine
|
|
|
|
*/
|
|
|
|
if (alloc_master_rt)
|
|
|
|
sdw_master_rt_free(m_rt, stream);
|
2022-01-26 04:17:09 +03:00
|
|
|
unlock:
|
|
|
|
mutex_unlock(&bus->bus_lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_stream_add_master);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_stream_remove_master() - Remove master from sdw_stream
|
|
|
|
*
|
|
|
|
* @bus: SDW Bus instance
|
|
|
|
* @stream: SoundWire stream
|
|
|
|
*
|
|
|
|
* This removes and frees port_rt and master_rt from a stream
|
|
|
|
*/
|
|
|
|
int sdw_stream_remove_master(struct sdw_bus *bus,
|
|
|
|
struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
struct sdw_master_runtime *m_rt, *_m_rt;
|
|
|
|
|
|
|
|
mutex_lock(&bus->bus_lock);
|
|
|
|
|
|
|
|
list_for_each_entry_safe(m_rt, _m_rt,
|
|
|
|
&stream->master_list, stream_node) {
|
|
|
|
if (m_rt->bus != bus)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
sdw_master_port_free(m_rt);
|
2022-01-26 04:17:10 +03:00
|
|
|
sdw_master_rt_free(m_rt, stream);
|
2022-01-26 04:17:09 +03:00
|
|
|
stream->m_rt_count--;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (list_empty(&stream->master_list))
|
|
|
|
stream->state = SDW_STREAM_RELEASED;
|
|
|
|
|
|
|
|
mutex_unlock(&bus->bus_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_stream_remove_master);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
|
|
|
|
*
|
|
|
|
* @slave: SDW Slave instance
|
|
|
|
* @stream_config: Stream configuration for audio stream
|
|
|
|
* @stream: SoundWire stream
|
|
|
|
* @port_config: Port configuration for audio stream
|
|
|
|
* @num_ports: Number of ports
|
|
|
|
*
|
|
|
|
* It is expected that Slave is added before adding Master
|
|
|
|
* to the Stream.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
int sdw_stream_add_slave(struct sdw_slave *slave,
|
|
|
|
struct sdw_stream_config *stream_config,
|
|
|
|
struct sdw_port_config *port_config,
|
|
|
|
unsigned int num_ports,
|
|
|
|
struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
struct sdw_slave_runtime *s_rt;
|
|
|
|
struct sdw_master_runtime *m_rt;
|
2022-01-26 04:17:12 +03:00
|
|
|
bool alloc_master_rt = true;
|
|
|
|
bool alloc_slave_rt = true;
|
|
|
|
|
2022-01-26 04:17:09 +03:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
mutex_lock(&slave->bus->bus_lock);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* check if Master is already allocated, if so skip allocation
|
|
|
|
* and go to configuration
|
|
|
|
*/
|
|
|
|
m_rt = sdw_master_rt_find(slave->bus, stream);
|
2022-01-26 04:17:12 +03:00
|
|
|
if (m_rt) {
|
|
|
|
alloc_master_rt = false;
|
2022-01-26 04:17:09 +03:00
|
|
|
goto skip_alloc_master_rt;
|
2022-01-26 04:17:12 +03:00
|
|
|
}
|
2022-01-26 04:17:09 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If this API is invoked by Slave first then m_rt is not valid.
|
|
|
|
* So, allocate m_rt and add Slave to it.
|
|
|
|
*/
|
|
|
|
m_rt = sdw_master_rt_alloc(slave->bus, stream);
|
|
|
|
if (!m_rt) {
|
|
|
|
dev_err(&slave->dev, "Master runtime alloc failed for stream:%s\n", stream->name);
|
|
|
|
ret = -ENOMEM;
|
2022-01-26 04:17:12 +03:00
|
|
|
goto unlock;
|
2022-01-26 04:17:09 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
skip_alloc_master_rt:
|
2022-01-26 04:17:14 +03:00
|
|
|
s_rt = sdw_slave_rt_find(slave, stream);
|
|
|
|
if (s_rt)
|
|
|
|
goto skip_alloc_slave_rt;
|
|
|
|
|
2022-01-26 04:17:11 +03:00
|
|
|
s_rt = sdw_slave_rt_alloc(slave, m_rt);
|
2022-01-26 04:17:09 +03:00
|
|
|
if (!s_rt) {
|
|
|
|
dev_err(&slave->dev, "Slave runtime alloc failed for stream:%s\n", stream->name);
|
2022-01-26 04:17:12 +03:00
|
|
|
alloc_slave_rt = false;
|
2022-01-26 04:17:09 +03:00
|
|
|
ret = -ENOMEM;
|
2022-01-26 04:17:12 +03:00
|
|
|
goto alloc_error;
|
2022-01-26 04:17:09 +03:00
|
|
|
}
|
|
|
|
|
2022-01-26 04:17:14 +03:00
|
|
|
skip_alloc_slave_rt:
|
|
|
|
if (sdw_slave_port_allocated(s_rt))
|
|
|
|
goto skip_port_alloc;
|
|
|
|
|
2022-01-26 04:17:12 +03:00
|
|
|
ret = sdw_slave_port_alloc(slave, s_rt, num_ports);
|
2022-01-26 04:17:09 +03:00
|
|
|
if (ret)
|
2022-01-26 04:17:12 +03:00
|
|
|
goto alloc_error;
|
2022-01-26 04:17:09 +03:00
|
|
|
|
2022-01-26 04:17:14 +03:00
|
|
|
skip_port_alloc:
|
2022-01-26 04:17:12 +03:00
|
|
|
ret = sdw_master_rt_config(m_rt, stream_config);
|
2022-01-26 04:17:09 +03:00
|
|
|
if (ret)
|
2022-01-26 04:17:12 +03:00
|
|
|
goto unlock;
|
2022-01-26 04:17:09 +03:00
|
|
|
|
2022-01-26 04:17:12 +03:00
|
|
|
ret = sdw_slave_rt_config(s_rt, stream_config);
|
2022-01-26 04:17:09 +03:00
|
|
|
if (ret)
|
2022-01-26 04:17:12 +03:00
|
|
|
goto unlock;
|
|
|
|
|
|
|
|
ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
|
|
|
|
if (ret)
|
|
|
|
goto unlock;
|
2022-01-26 04:17:09 +03:00
|
|
|
|
|
|
|
ret = sdw_slave_port_config(slave, s_rt, port_config);
|
|
|
|
if (ret)
|
2022-01-26 04:17:12 +03:00
|
|
|
goto unlock;
|
2022-01-26 04:17:09 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Change stream state to CONFIGURED on first Slave add.
|
|
|
|
* Bus is not aware of number of Slave(s) in a stream at this
|
|
|
|
* point so cannot depend on all Slave(s) to be added in order to
|
|
|
|
* change stream state to CONFIGURED.
|
|
|
|
*/
|
|
|
|
stream->state = SDW_STREAM_CONFIGURED;
|
2022-01-26 04:17:12 +03:00
|
|
|
goto unlock;
|
2022-01-26 04:17:09 +03:00
|
|
|
|
2022-01-26 04:17:12 +03:00
|
|
|
alloc_error:
|
2022-01-26 04:17:09 +03:00
|
|
|
/*
|
2022-01-26 04:17:12 +03:00
|
|
|
* we only cleanup what was allocated in this routine. The 'else if'
|
|
|
|
* is intentional, the 'master_rt_free' will call sdw_slave_rt_free()
|
|
|
|
* internally.
|
2022-01-26 04:17:09 +03:00
|
|
|
*/
|
2022-01-26 04:17:12 +03:00
|
|
|
if (alloc_master_rt)
|
|
|
|
sdw_master_rt_free(m_rt, stream);
|
|
|
|
else if (alloc_slave_rt)
|
|
|
|
sdw_slave_rt_free(slave, stream);
|
|
|
|
unlock:
|
2022-01-26 04:17:09 +03:00
|
|
|
mutex_unlock(&slave->bus->bus_lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_stream_add_slave);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* sdw_stream_remove_slave() - Remove slave from sdw_stream
|
|
|
|
*
|
|
|
|
* @slave: SDW Slave instance
|
|
|
|
* @stream: SoundWire stream
|
|
|
|
*
|
|
|
|
* This removes and frees port_rt and slave_rt from a stream
|
|
|
|
*/
|
|
|
|
int sdw_stream_remove_slave(struct sdw_slave *slave,
|
|
|
|
struct sdw_stream_runtime *stream)
|
|
|
|
{
|
|
|
|
mutex_lock(&slave->bus->bus_lock);
|
|
|
|
|
|
|
|
sdw_slave_port_free(slave, stream);
|
2022-01-26 04:17:10 +03:00
|
|
|
sdw_slave_rt_free(slave, stream);
|
2022-01-26 04:17:09 +03:00
|
|
|
|
|
|
|
mutex_unlock(&slave->bus->bus_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sdw_stream_remove_slave);
|