drm/i915: Rename bunch of vlv_ watermark structures to g4x_
We'll be wanting to share some of these watermark structures on g4x, so let's rename them to have a g4x_ prefix instead of vlv_. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170421181432.15216-5-ville.syrjala@linux.intel.com Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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@ -1652,11 +1652,11 @@ struct ilk_wm_values {
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enum intel_ddb_partitioning partitioning;
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};
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struct vlv_pipe_wm {
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struct g4x_pipe_wm {
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uint16_t plane[I915_MAX_PLANES];
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};
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struct vlv_sr_wm {
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struct g4x_sr_wm {
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uint16_t plane;
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uint16_t cursor;
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};
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@ -1666,8 +1666,8 @@ struct vlv_wm_ddl_values {
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};
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struct vlv_wm_values {
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struct vlv_pipe_wm pipe[3];
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struct vlv_sr_wm sr;
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struct g4x_pipe_wm pipe[3];
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struct g4x_sr_wm sr;
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struct vlv_wm_ddl_values ddl[3];
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uint8_t level;
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bool cxsr;
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@ -512,8 +512,8 @@ enum vlv_wm_level {
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};
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struct vlv_wm_state {
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struct vlv_pipe_wm wm[NUM_VLV_WM_LEVELS];
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struct vlv_sr_wm sr[NUM_VLV_WM_LEVELS];
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struct g4x_pipe_wm wm[NUM_VLV_WM_LEVELS];
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struct g4x_sr_wm sr[NUM_VLV_WM_LEVELS];
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uint8_t num_levels;
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bool cxsr;
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};
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@ -549,7 +549,7 @@ struct intel_crtc_wm_state {
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struct {
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/* "raw" watermarks (not inverted) */
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struct vlv_pipe_wm raw[NUM_VLV_WM_LEVELS];
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struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS];
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/* intermediate watermarks (inverted) */
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struct vlv_wm_state intermediate;
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/* optimal watermarks (inverted) */
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@ -1062,7 +1062,7 @@ static bool vlv_need_sprite0_fifo_workaround(unsigned int active_planes)
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static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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const struct vlv_pipe_wm *raw =
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const struct g4x_pipe_wm *raw =
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&crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2];
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struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;
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unsigned int active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
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@ -1178,7 +1178,7 @@ static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state,
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bool dirty = false;
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for (; level < num_levels; level++) {
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struct vlv_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
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struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
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dirty |= raw->plane[plane_id] != value;
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raw->plane[plane_id] = value;
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@ -1202,7 +1202,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
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}
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for (level = 0; level < num_levels; level++) {
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struct vlv_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
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struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
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int wm = vlv_compute_wm_level(crtc_state, plane_state, level);
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int max_wm = plane_id == PLANE_CURSOR ? 63 : 511;
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@ -1230,7 +1230,7 @@ out:
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static bool vlv_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state,
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enum plane_id plane_id, int level)
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{
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const struct vlv_pipe_wm *raw =
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const struct g4x_pipe_wm *raw =
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&crtc_state->wm.vlv.raw[level];
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const struct vlv_fifo_state *fifo_state =
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&crtc_state->wm.vlv.fifo_state;
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@ -1315,7 +1315,7 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
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wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;
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for (level = 0; level < wm_state->num_levels; level++) {
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const struct vlv_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
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const struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
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const int sr_fifo_size = INTEL_INFO(dev_priv)->num_pipes * 512 - 1;
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if (!vlv_raw_crtc_wm_is_valid(crtc_state, level))
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@ -4785,7 +4785,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev)
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active->cxsr = wm->cxsr;
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for (level = 0; level < active->num_levels; level++) {
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struct vlv_pipe_wm *raw =
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struct g4x_pipe_wm *raw =
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&crtc_state->wm.vlv.raw[level];
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active->sr[level].plane = wm->sr.plane;
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@ -4845,7 +4845,7 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
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continue;
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for (level = 0; level < wm_state->num_levels; level++) {
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struct vlv_pipe_wm *raw =
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struct g4x_pipe_wm *raw =
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&crtc_state->wm.vlv.raw[level];
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raw->plane[plane_id] = 0;
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