arm64: tegra: Device tree changes for v5.15-rc1
Contains a couple of fixes across the board and adds support for the recently released NVIDIA Jetson TX2 NX Developer Kit. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmEWmSETHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoQBWEAC0QGn6KBXuqIqOdphFjRD4N9U8cJjO Xj7TG2JrVH93JC9PVzYfBxBNKURp4J2d6J5ChSjo+YrgDybjDgouV7R6idUKUcTp EU7Gxv8WZ5zHp+qNU6lh/ZFzf8m25mPS9dg4j3+vv1bsIYPf8RvQztJXqgXujPWD eY120agyLiIWOCoBWYC0IZ7O2FXtHk+1yOaznzBa96CrjE2sfL1NiuUgh8W9IbLG QuKbWQxNn5fldljgYnbdLd25F/DnbMqPm9v5LaiCKtMrdhtL0HWZQNiAjtTGcdS3 i29SyPwh0PZ4XHr088Gr4YsZ1jwTeQNmaSmkKvtaP4GUK2p1jOkqYAQOxGhppAbX Y/zToY2uheRRi5NNblluPN0KFvzE/YF5RKQnRMzsyhd3q0x3v/uVr2K3MIhSLMrh uNxQoJcl26Zksh8mgIE2xmlm6bzRS/sOxJwKWyOyAnOa10ctXILN5TW/zKV64bj2 t9l+Y9w7xBmoRs4liThl+mCdT9wDcV2j0JCvk3NbA29OxDHL7t8IxbTS0FTbjlnY A7ShMjQIBCHqdqFvH4e/+o9H4s13xdxxasWCkejeGUAH7aGlisZAeZh3guAYc5sy x7hKKFq5a5p/gfGSQrckTO3dEh8hFqzhXv8lRJENTHnsKdCNuW0dF7EyOXjEfjLe bfWjw4eYTE88Sw== =GoQ0 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEa0dMACgkQmmx57+YA GNkaQBAAu3R0HU2Z7VWTdHBjTAnHWSsDwDsc9CN6EdDnDQTqxCgzsvySaasgxfN0 xqNUrhD15osAl2Wj96r0bJMJfrKftK9ZmqHfEIjDMGUWJ++Z//gKB6iIARuoYYMI 84Xhu/6umQAv7sdObOh66LLlXZDtpQyRKslCpTFRhGg2+42/Z0wBIHEEHG40wgJQ /JcF3mHIhh2A7WhXH9sKC3uxg1PfU8UkNLmaQPUgdRwIJzBx5S8oRapCcLGwZJDj AUBBUhIeYrRByc+evjLqaCdcPJ/5rkboJyf929nSudP8Hv+4JP71dmJPVgBoTdix 0KEmItD79pv9Y7qKlOR0P1Ng180WP/N4ihukGgobef4RUAAoGrmo4Or1ceO4VB/8 ReL4q0L12jpb0FGz3AfpEsERojIEIGkg2l2oMNDofxJT47/EfwCJ2Kc7SDCm9cWn MWZ/shjBUI5YF5AQg/y8hOLsWHBso3aRaF+IT1wvmFxcavAxAOh/vDHETyWEABqT G7YtW0ZCYW+YH8MkERyUgOue+S1xCF9x4iFaeddYkwl3m2o7g1PehpWNpla/9SM9 gteNT49Cw9I0gmAk/+y82IMY7IYUYEBLquqHxDkq62J23Qp1ThKN/yqVAsMicm/q k9IcUMipNCsn6MruUE1A0+BAkfmu6YZguXuGo6+MXIc8m07Ou6w= =VTDC -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.15-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.15-rc1 Contains a couple of fixes across the board and adds support for the recently released NVIDIA Jetson TX2 NX Developer Kit. * tag 'tegra-for-5.15-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix compatible string for Tegra132 CPUs arm64: tegra: Add missing interconnects property for USB on Tegra186 arm64: tegra: Add NVIDIA Jetson TX2 NX Developer Kit support arm64: tegra: Add PWM nodes on Tegra186 arm64: tegra194: p2888: Correct interrupt trigger type of temperature sensor arm64: tegra: Fix Tegra194 PCIe EP compatible string Link: https://lore.kernel.org/r/20210813162157.2820913-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
1de4893238
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@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p3450-0000.dtb
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dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
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dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
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dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
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dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb
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dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
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dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
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dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb
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@ -1227,13 +1227,13 @@
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cpu@0 {
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device_type = "cpu";
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compatible = "nvidia,denver";
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compatible = "nvidia,tegra132-denver";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "nvidia,denver";
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compatible = "nvidia,tegra132-denver";
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reg = <1>;
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};
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};
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@ -0,0 +1,718 @@
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/input/gpio-keys.h>
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#include <dt-bindings/mfd/max77620.h>
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#include "tegra186.dtsi"
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/ {
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model = "NVIDIA Jetson TX2 NX Developer Kit";
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compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
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aliases {
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ethernet0 = "/ethernet@2490000";
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i2c0 = "/bpmp/i2c";
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i2c1 = "/i2c@3160000";
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i2c2 = "/i2c@c240000";
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i2c3 = "/i2c@3180000";
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i2c4 = "/i2c@3190000";
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i2c5 = "/i2c@31c0000";
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i2c6 = "/i2c@c250000";
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i2c7 = "/i2c@31e0000";
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mmc0 = "/mmc@3460000";
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serial0 = &uarta;
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};
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chosen {
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bootargs = "earlycon console=ttyS0,115200n8";
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stdout-path = "serial0:115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x70000000>;
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};
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ethernet@2490000 {
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status = "okay";
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phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
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phy-handle = <&phy>;
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phy-mode = "rgmii-id";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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interrupt-parent = <&gpio_aon>;
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interrupts = <TEGRA186_AON_GPIO(AA, 7) IRQ_TYPE_LEVEL_LOW>;
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#phy-cells = <0>;
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};
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};
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};
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memory-controller@2c00000 {
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status = "okay";
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};
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timer@3010000 {
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status = "okay";
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};
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serial@3100000 {
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status = "okay";
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};
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i2c@3160000 {
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status = "okay";
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};
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i2c@3180000 {
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status = "okay";
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power-monitor@40 {
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compatible = "ti,ina3221";
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reg = <0x40>;
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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label = "VDD_IN";
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shunt-resistor-micro-ohms = <5>;
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};
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channel@1 {
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reg = <1>;
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label = "VDD_CPU_GPU";
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shunt-resistor-micro-ohms = <5>;
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};
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channel@2 {
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reg = <2>;
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label = "VDD_SOC";
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shunt-resistor-micro-ohms = <>;
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};
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};
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};
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ddc: i2c@3190000 {
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status = "okay";
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};
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i2c@31c0000 {
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status = "okay";
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};
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i2c@31e0000 {
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status = "okay";
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};
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/* SDMMC4 (eMMC) */
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mmc@3460000 {
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status = "okay";
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bus-width = <8>;
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non-removable;
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vqmmc-supply = <&vdd_1v8_ap>;
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vmmc-supply = <&vdd_3v3_sys>;
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};
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hda@3510000 {
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nvidia,model = "jetson-tx2-hda";
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status = "okay";
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};
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padctl@3520000 {
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status = "okay";
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avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
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avdd-usb-supply = <&vdd_3v3_sys>;
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vclamp-usb-supply = <&vdd_1v8>;
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vddio-hsic-supply = <&gnd>;
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pads {
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usb2 {
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status = "okay";
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lanes {
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micro_b: usb2-0 {
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nvidia,function = "xusb";
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status = "okay";
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};
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usb2-1 {
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nvidia,function = "xusb";
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status = "okay";
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};
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usb2-2 {
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nvidia,function = "xusb";
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status = "okay";
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};
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};
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};
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usb3 {
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status = "okay";
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lanes {
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usb3-1 {
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nvidia,function = "xusb";
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status = "okay";
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};
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};
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};
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};
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ports {
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usb2-0 {
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status = "okay";
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mode = "otg";
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vbus-supply = <&vdd_5v0_sys>;
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usb-role-switch;
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connector {
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compatible = "gpio-usb-b-connector",
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"usb-b-connector";
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label = "micro-USB";
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type = "micro";
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vbus-gpios = <&gpio
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TEGRA186_MAIN_GPIO(L, 4)
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GPIO_ACTIVE_LOW>;
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id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
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};
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};
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usb2-1 {
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status = "okay";
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mode = "host";
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vbus-supply = <&vdd_5v0_sys>;
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};
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usb2-2 {
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status = "okay";
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mode = "host";
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vbus-supply = <&vdd_5v0_sys>;
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};
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usb3-1 {
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nvidia,usb2-companion = <1>;
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vbus-supply = <&vdd_5v0_sys>;
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status = "okay";
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};
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};
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};
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usb@3530000 {
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status = "okay";
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phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
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<&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
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<&{/padctl@3520000/pads/usb2/lanes/usb2-2}>,
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<&{/padctl@3520000/pads/usb3/lanes/usb3-1}>;
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phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-1";
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};
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usb@3550000 {
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status = "okay";
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phys = <µ_b>;
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phy-names = "usb2-0";
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};
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hsp@3c00000 {
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status = "okay";
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};
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i2c@c240000 {
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status = "okay";
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};
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i2c@c250000 {
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status = "okay";
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/* module ID EEPROM */
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eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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label = "module";
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vcc-supply = <&vdd_1v8>;
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address-width = <8>;
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pagesize = <8>;
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size = <256>;
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read-only;
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};
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/* carrier board ID EEPROM */
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eeprom@57 {
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compatible = "atmel,24c02";
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reg = <0x57>;
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label = "system";
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vcc-supply = <&vdd_1v8>;
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address-width = <8>;
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pagesize = <8>;
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size = <256>;
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read-only;
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};
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};
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rtc@c2a0000 {
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status = "okay";
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};
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pwm@c340000 {
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status = "okay";
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};
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pmc@c360000 {
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nvidia,invert-interrupt;
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};
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pcie@10003000 {
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status = "okay";
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dvdd-pex-supply = <&vdd_pex>;
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hvdd-pex-pll-supply = <&vdd_1v8>;
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hvdd-pex-supply = <&vdd_1v8>;
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vddio-pexctl-aud-supply = <&vdd_1v8>;
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pci@1,0 {
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nvidia,num-lanes = <2>;
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status = "okay";
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};
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pci@2,0 {
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nvidia,num-lanes = <1>;
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status = "disabled";
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};
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pci@3,0 {
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nvidia,num-lanes = <1>;
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status = "okay";
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};
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};
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host1x@13e00000 {
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status = "okay";
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dpaux@15040000 {
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status = "okay";
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};
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display-hub@15200000 {
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status = "okay";
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};
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dsi@15300000 {
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status = "disabled";
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};
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/* DP */
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sor@15540000 {
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status = "okay";
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avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
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vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
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nvidia,dpaux = <&dpaux>;
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};
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/* HDMI */
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sor@15580000 {
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status = "okay";
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avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
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vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
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hdmi-supply = <&vdd_hdmi>;
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nvidia,ddc-i2c-bus = <&ddc>;
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nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1)
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GPIO_ACTIVE_LOW>;
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};
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dpaux@155c0000 {
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status = "okay";
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};
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};
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gpu@17000000 {
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status = "okay";
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};
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fan: fan {
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compatible = "pwm-fan";
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pwms = <&pwm4 0 45334>;
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cooling-levels = <0 64 128 255>;
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#cooling-cells = <2>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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power {
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label = "Power";
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gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0)
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GPIO_ACTIVE_LOW>;
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linux,input-type = <EV_KEY>;
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linux,code = <KEY_POWER>;
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debounce-interval = <10>;
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wakeup-event-action = <EV_ACT_ASSERTED>;
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wakeup-source;
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1)
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GPIO_ACTIVE_LOW>;
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linux,input-type = <EV_KEY>;
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linux,code = <KEY_VOLUMEUP>;
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debounce-interval = <10>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2)
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GPIO_ACTIVE_LOW>;
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linux,input-type = <EV_KEY>;
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linux,code = <KEY_VOLUMEDOWN>;
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debounce-interval = <10>;
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};
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};
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cpus {
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cpu@0 {
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enable-method = "psci";
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};
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cpu@1 {
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enable-method = "psci";
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};
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cpu@2 {
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enable-method = "psci";
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};
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cpu@3 {
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enable-method = "psci";
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};
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cpu@4 {
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu@5 {
|
||||
enable-method = "psci";
|
||||
};
|
||||
};
|
||||
|
||||
bpmp {
|
||||
i2c {
|
||||
status = "okay";
|
||||
|
||||
pmic: pmic@3c {
|
||||
compatible = "maxim,max77620";
|
||||
reg = <0x3c>;
|
||||
|
||||
interrupt-parent = <&pmc>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max77620_default>;
|
||||
|
||||
max77620_default: pinmux {
|
||||
gpio0 {
|
||||
pins = "gpio0";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
gpio1 {
|
||||
pins = "gpio1";
|
||||
function = "fps-out";
|
||||
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
|
||||
};
|
||||
|
||||
gpio2 {
|
||||
pins = "gpio2";
|
||||
function = "fps-out";
|
||||
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
|
||||
};
|
||||
|
||||
gpio3 {
|
||||
pins = "gpio3";
|
||||
function = "fps-out";
|
||||
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
|
||||
};
|
||||
|
||||
gpio4 {
|
||||
pins = "gpio4";
|
||||
function = "32k-out1";
|
||||
drive-push-pull = <1>;
|
||||
};
|
||||
|
||||
gpio5 {
|
||||
pins = "gpio5";
|
||||
function = "gpio";
|
||||
drive-push-pull = <0>;
|
||||
};
|
||||
|
||||
gpio6 {
|
||||
pins = "gpio6";
|
||||
function = "gpio";
|
||||
drive-push-pull = <1>;
|
||||
};
|
||||
|
||||
gpio7 {
|
||||
pins = "gpio7";
|
||||
function = "gpio";
|
||||
drive-push-pull = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
fps {
|
||||
fps0 {
|
||||
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
|
||||
maxim,shutdown-fps-time-period-us = <640>;
|
||||
};
|
||||
|
||||
fps1 {
|
||||
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
|
||||
maxim,shutdown-fps-time-period-us = <640>;
|
||||
};
|
||||
|
||||
fps2 {
|
||||
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
|
||||
maxim,shutdown-fps-time-period-us = <640>;
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
in-sd0-supply = <&vdd_5v0_sys>;
|
||||
in-sd1-supply = <&vdd_5v0_sys>;
|
||||
in-sd2-supply = <&vdd_5v0_sys>;
|
||||
in-sd3-supply = <&vdd_5v0_sys>;
|
||||
|
||||
in-ldo0-1-supply = <&vdd_5v0_sys>;
|
||||
in-ldo2-supply = <&vdd_5v0_sys>;
|
||||
in-ldo3-5-supply = <&vdd_5v0_sys>;
|
||||
in-ldo4-6-supply = <&vdd_1v8>;
|
||||
in-ldo7-8-supply = <&avdd_dsi_csi>;
|
||||
|
||||
sd0 {
|
||||
regulator-name = "VDD_DDR_1V1_PMIC";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
avdd_dsi_csi: sd1 {
|
||||
regulator-name = "AVDD_DSI_CSI_1V2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
vdd_1v8: sd2 {
|
||||
regulator-name = "VDD_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vdd_3v3_sys: sd3 {
|
||||
regulator-name = "VDD_3V3_SYS";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vdd_1v8_pll: ldo0 {
|
||||
regulator-name = "VDD_1V8_AP_PLL";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
ldo2 {
|
||||
regulator-name = "VDDIO_3V3_AOHV";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vddio_sdmmc1: ldo3 {
|
||||
regulator-name = "VDDIO_SDMMC1_AP";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo4 {
|
||||
regulator-name = "VDD_RTC";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
};
|
||||
|
||||
vddio_sdmmc3: ldo5 {
|
||||
regulator-name = "VDDIO_SDMMC3_AP";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
vdd_hdmi_1v05: ldo7 {
|
||||
regulator-name = "VDD_HDMI_1V05";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
};
|
||||
|
||||
vdd_pex: ldo8 {
|
||||
regulator-name = "VDD_PEX_1V05";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-1.0";
|
||||
status = "okay";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
gnd: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "GND";
|
||||
regulator-min-microvolt = <0>;
|
||||
regulator-max-microvolt = <0>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_5v0_sys: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_5V0_SYS";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_1v8_ap: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_1V8_AP";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
vin-supply = <&vdd_1v8>;
|
||||
};
|
||||
|
||||
vdd_hdmi: regulator@3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_5V0_HDMI_CON";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
|
||||
vin-supply = <&vdd_5v0_sys>;
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu {
|
||||
polling-delay = <0>;
|
||||
polling-delay-passive = <500>;
|
||||
status = "okay";
|
||||
|
||||
trips {
|
||||
cpu_trip_critical: critical {
|
||||
temperature = <96500>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
|
||||
cpu_trip_hot: hot {
|
||||
temperature = <79000>;
|
||||
hysteresis = <2000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
cpu_trip_active: active {
|
||||
temperature = <62000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
cpu_trip_passive: passive {
|
||||
temperature = <45000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
cpu-critical {
|
||||
cooling-device = <&fan 3 3>;
|
||||
trip = <&cpu_trip_critical>;
|
||||
};
|
||||
|
||||
cpu-hot {
|
||||
cooling-device = <&fan 2 2>;
|
||||
trip = <&cpu_trip_hot>;
|
||||
};
|
||||
|
||||
cpu-active {
|
||||
cooling-device = <&fan 1 1>;
|
||||
trip = <&cpu_trip_active>;
|
||||
};
|
||||
|
||||
cpu-passive {
|
||||
cooling-device = <&fan 0 0>;
|
||||
trip = <&cpu_trip_passive>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpu {
|
||||
polling-delay = <0>;
|
||||
polling-delay-passive = <500>;
|
||||
status = "okay";
|
||||
|
||||
trips {
|
||||
gpu_alert0: critical {
|
||||
temperature = <99000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
aux {
|
||||
polling-delay = <0>;
|
||||
polling-delay-passive = <500>;
|
||||
status = "okay";
|
||||
|
||||
trips {
|
||||
aux_alert0: critical {
|
||||
temperature = <90000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -548,6 +548,83 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm1: pwm@3280000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0x3280000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM1>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM1>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
pwm2: pwm@3290000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0x3290000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM2>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM2>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
pwm3: pwm@32a0000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0x32a0000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM3>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM3>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
pwm5: pwm@32c0000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0x32c0000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM5>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM5>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
pwm6: pwm@32d0000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0x32d0000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM6>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM6>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
pwm7: pwm@32e0000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0x32e0000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM7>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM7>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
pwm8: pwm@32f0000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0x32f0000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM8>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM8>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
sdmmc1: mmc@3400000 {
|
||||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03400000 0x0 0x10000>;
|
||||
|
|
@ -826,6 +903,9 @@
|
|||
<&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
|
||||
<&bpmp TEGRA186_CLK_XUSB_FS>;
|
||||
clock-names = "dev", "ss", "ss_src", "fs_src";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_DEVR &emc>,
|
||||
<&mc TEGRA186_MEMORY_CLIENT_XUSB_DEVW &emc>;
|
||||
interconnect-names = "dma-mem", "write";
|
||||
iommus = <&smmu TEGRA186_SID_XUSB_DEV>;
|
||||
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBB>,
|
||||
<&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
|
||||
|
|
@ -944,6 +1024,17 @@
|
|||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pwm4: pwm@c340000 {
|
||||
compatible = "nvidia,tegra186-pwm";
|
||||
reg = <0x0 0xc340000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA186_CLK_PWM4>;
|
||||
clock-names = "pwm";
|
||||
resets = <&bpmp TEGRA186_RESET_PWM4>;
|
||||
reset-names = "pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
pmc: pmc@c360000 {
|
||||
compatible = "nvidia,tegra186-pmc";
|
||||
reg = <0 0x0c360000 0 0x10000>,
|
||||
|
|
|
|||
|
|
@ -309,7 +309,7 @@
|
|||
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <TEGRA194_MAIN_GPIO(H, 2)
|
||||
IRQ_TYPE_LEVEL_LOW>;
|
||||
IRQ_TYPE_EDGE_FALLING>;
|
||||
vcc-supply = <&vdd_1v8ls>;
|
||||
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -2098,7 +2098,7 @@
|
|||
};
|
||||
|
||||
pcie_ep@14160000 {
|
||||
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
|
||||
compatible = "nvidia,tegra194-pcie-ep";
|
||||
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
|
||||
reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
|
||||
<0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
|
||||
|
|
@ -2130,7 +2130,7 @@
|
|||
};
|
||||
|
||||
pcie_ep@14180000 {
|
||||
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
|
||||
compatible = "nvidia,tegra194-pcie-ep";
|
||||
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
|
||||
reg = <0x00 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
|
||||
<0x00 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
|
||||
|
|
@ -2162,7 +2162,7 @@
|
|||
};
|
||||
|
||||
pcie_ep@141a0000 {
|
||||
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
|
||||
compatible = "nvidia,tegra194-pcie-ep";
|
||||
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
|
||||
reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
|
||||
<0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
|
||||
|
|
|
|||
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