Linux 5.2-rc2
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlzrJgUeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiG1XAIAJajJpeKc9MVQipi zWiI+WgHDg8gG/HnLKzP2Zp4MUjTCz30t0rnBbdo6AyK6LnPBL53yxg9q64XN7vI p/h2ys+/DvqhIYSPWX6C++HYQT4Cb5ghxJABEIsztd3G4nfB9L2vgq9zKSNFusTD UtfUxufciZPX515TuE4IqWMwS4Ut5daH7V3jjZunhPiayTFv64e1KbpKLLzHR0NR DfFbrPcdp7VyCT/A5AKrqfqeB6O9dm/Fe4CsdsaKuzASCXJ6GUc/A7iZDndv/KA4 f5Xh7SGlQ2TfT1ud/aMfdw3AcMjqB8zgMJenovJ7UuHDfULBWNeAmMh/cTDwY9eY Xgyvfm0= =S8p9 -----END PGP SIGNATURE----- Merge tag 'v5.2-rc2' into patchwork Merge back from upstream into media tree, as there are some patches merged upstream that has pontential of causing conflicts (one actually rised a conflict already). Linux 5.2-rc2 * tag 'v5.2-rc2': (377 commits) Linux 5.2-rc2 random: fix soft lockup when trying to read from an uninitialized blocking pool tracing: Silence GCC 9 array bounds warning ext4: fix dcache lookup of !casefolded directories locking/lock_events: Use this_cpu_add() when necessary KVM: x86: fix return value for reserved EFER tools/kvm_stat: fix fields filter for child events KVM: selftests: Wrap vcpu_nested_state_get/set functions with x86 guard kvm: selftests: aarch64: compile with warnings on kvm: selftests: aarch64: fix default vm mode kvm: selftests: aarch64: dirty_log_test: fix unaligned memslot size KVM: s390: fix memory slot handling for KVM_SET_USER_MEMORY_REGION KVM: x86/pmu: do not mask the value that is written to fixed PMUs KVM: x86/pmu: mask the result of rdpmc according to the width of the counters x86/kvm/pmu: Set AMD's virt PMU version to 1 KVM: x86: do not spam dmesg with VMCS/VMCB dumps kvm: Check irqchip mode before assign irqfd kvm: svm/avic: fix off-by-one in checking host APIC ID KVM: selftests: do not blindly clobber registers in guest asm KVM: selftests: Remove duplicated TEST_ASSERT in hyperv_cpuid.c ...
This commit is contained in:
Mauro Carvalho Chehab
Коммит
1e0566fd4a
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@ -58,13 +58,14 @@ stable kernels.
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|||
| ARM | Cortex-A72 | #853709 | N/A |
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||||
| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
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||||
| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
|
||||
| ARM | Cortex-A76 | #1188873 | ARM64_ERRATUM_1188873 |
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| ARM | Cortex-A76 | #1188873,1418040| ARM64_ERRATUM_1418040 |
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||||
| ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |
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||||
| ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 |
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||||
| ARM | Neoverse-N1 | #1188873 | ARM64_ERRATUM_1188873 |
|
||||
| ARM | MMU-500 | #841119,#826419 | N/A |
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||||
| ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 |
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||||
| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
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||||
| ARM | MMU-500 | #841119,826419 | N/A |
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| | | | |
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| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
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||||
| Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 |
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| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
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||||
| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
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| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
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|
|
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@ -131,7 +131,7 @@ The following sections detail encoding of each kind.
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``btf_type`` is followed by a ``u32`` with the following bits arrangement::
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#define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24)
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#define BTF_INT_OFFSET(VAL) (((VAL & 0x00ff0000)) >> 16)
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#define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16)
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#define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff)
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The ``BTF_INT_ENCODING`` has the following attributes::
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|
|
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|
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@ -5,7 +5,7 @@ DT_MK_SCHEMA ?= dt-mk-schema
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DT_MK_SCHEMA_FLAGS := $(if $(DT_SCHEMA_FILES), -u)
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quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<)
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cmd_chk_binding = $(DT_DOC_CHECKER) $< ; \
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cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \
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$(DT_EXTRACT_EX) $< > $@
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$(obj)/%.example.dts: $(src)/%.yaml FORCE
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@ -216,7 +216,7 @@ Example:
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#size-cells = <0>;
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A57_0: cpu@0 {
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compatible = "arm,cortex-a57","arm,armv8";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x0>;
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device_type = "cpu";
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enable-method = "psci";
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@ -225,7 +225,7 @@ Example:
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.....
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A53_0: cpu@100 {
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compatible = "arm,cortex-a53","arm,armv8";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x100>;
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device_type = "cpu";
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enable-method = "psci";
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@ -118,7 +118,7 @@ cpus {
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};
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A57_0: cpu@0 {
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compatible = "arm,cortex-a57","arm,armv8";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x0>;
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device_type = "cpu";
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enable-method = "psci";
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@ -129,7 +129,7 @@ cpus {
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};
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A57_1: cpu@1 {
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compatible = "arm,cortex-a57","arm,armv8";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x1>;
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device_type = "cpu";
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enable-method = "psci";
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@ -140,7 +140,7 @@ cpus {
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};
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A53_0: cpu@100 {
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compatible = "arm,cortex-a53","arm,armv8";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x100>;
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device_type = "cpu";
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enable-method = "psci";
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@ -151,7 +151,7 @@ cpus {
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};
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A53_1: cpu@101 {
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compatible = "arm,cortex-a53","arm,armv8";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x101>;
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device_type = "cpu";
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enable-method = "psci";
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@ -162,7 +162,7 @@ cpus {
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};
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A53_2: cpu@102 {
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compatible = "arm,cortex-a53","arm,armv8";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x102>;
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device_type = "cpu";
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enable-method = "psci";
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@ -173,7 +173,7 @@ cpus {
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};
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A53_3: cpu@103 {
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compatible = "arm,cortex-a53","arm,armv8";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x103>;
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device_type = "cpu";
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enable-method = "psci";
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|
|
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@ -41,7 +41,7 @@ Examples:
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|||
Consumer:
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||||
========
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See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
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Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt for
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||||
Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml for
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further details.
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||||
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||||
An interrupt consumer on an SoC using crossbar will use:
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@ -35,7 +35,7 @@ board device tree, including the system base clock, as selected by XOM[0]
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pin of the SoC. Refer to generic fixed rate clock bindings
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documentation[1] for more information how to specify these clocks.
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[1] Documentation/devicetree/bindings/clock/fixed-clock.txt
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[1] Documentation/devicetree/bindings/clock/fixed-clock.yaml
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Example: Clock controller node:
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@ -92,6 +92,8 @@ properties:
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minItems: 2
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maxItems: 4
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ranges: true
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interrupts:
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description: Interrupt source of the parent interrupt controller on
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secondary GICs, or VGIC maintenance interrupt on primary GIC (see
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|
@ -197,28 +199,28 @@ examples:
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interrupt-controller@e1101000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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#address-cells = <2>;
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#size-cells = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-controller;
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interrupts = <1 8 0xf04>;
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ranges = <0 0 0 0xe1100000 0 0x100000>;
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reg = <0x0 0xe1110000 0 0x01000>,
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<0x0 0xe112f000 0 0x02000>,
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<0x0 0xe1140000 0 0x10000>,
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<0x0 0xe1160000 0 0x10000>;
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ranges = <0 0xe1100000 0x100000>;
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reg = <0xe1110000 0x01000>,
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<0xe112f000 0x02000>,
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<0xe1140000 0x10000>,
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<0xe1160000 0x10000>;
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v2m0: v2m@8000 {
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v2m0: v2m@80000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0x80000 0 0x1000>;
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reg = <0x80000 0x1000>;
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};
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||||
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||||
//...
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||||
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v2mN: v2m@9000 {
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v2mN: v2m@90000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0x90000 0 0x1000>;
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reg = <0x90000 0x1000>;
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};
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||||
};
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||||
...
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||||
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@ -23,7 +23,7 @@ Required properties:
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|||
- marvell,spi-base : List of GIC base SPI interrupts, one for each
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ODMI frame. Those SPI interrupts are 0-based,
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i.e marvell,spi-base = <128> will use SPI #96.
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See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
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See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
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for details about the GIC Device Tree binding.
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||||
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||||
Example:
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|
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@ -15,7 +15,7 @@ Optional properties:
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|||
- power-supply: specifies the power source. It can either be a regulator
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or a gpio which enables a regulator, i.e. a regulator-fixed as
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described in
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||||
Documentation/devicetree/bindings/regulator/fixed-regulator.txt
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Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
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||||
|
||||
Example:
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||||
|
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@ -24,7 +24,7 @@ Optional children nodes:
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|||
Children nodes represent the available nand chips.
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Other properties:
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see Documentation/devicetree/bindings/mtd/nand.txt for generic bindings.
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see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
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Example demonstrate on AXG SoC:
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|
|
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|
@ -101,12 +101,12 @@ Required properties:
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|||
number (e.g., 0, 1, 2, etc.)
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- #address-cells : see partition.txt
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- #size-cells : see partition.txt
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- nand-ecc-strength : see nand.txt
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- nand-ecc-step-size : must be 512 or 1024. See nand.txt
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- nand-ecc-strength : see nand-controller.yaml
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- nand-ecc-step-size : must be 512 or 1024. See nand-controller.yaml
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Optional properties:
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- nand-on-flash-bbt : boolean, to enable the on-flash BBT for this
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chip-select. See nand.txt
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chip-select. See nand-controller.yaml
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- brcm,nand-oob-sector-size : integer, to denote the spare area sector size
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expected for the ECC layout in use. This size, in
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addition to the strength and step-size,
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|
|
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|
@ -22,16 +22,16 @@ Sub-nodes:
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select is connected.
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||||
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||||
Optional properties:
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||||
- nand-ecc-step-size: see nand.txt for details.
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- nand-ecc-step-size: see nand-controller.yaml for details.
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||||
If present, the value must be
|
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512 for "altr,socfpga-denali-nand"
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1024 for "socionext,uniphier-denali-nand-v5a"
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1024 for "socionext,uniphier-denali-nand-v5b"
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||||
- nand-ecc-strength: see nand.txt for details. Valid values are:
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- nand-ecc-strength: see nand-controller.yaml for details. Valid values are:
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8, 15 for "altr,socfpga-denali-nand"
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8, 16, 24 for "socionext,uniphier-denali-nand-v5a"
|
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8, 16 for "socionext,uniphier-denali-nand-v5b"
|
||||
- nand-ecc-maximize: see nand.txt for details
|
||||
- nand-ecc-maximize: see nand-controller.yaml for details
|
||||
|
||||
The chip nodes may optionally contain sub-nodes describing partitions of the
|
||||
address space. See partition.txt for more detail.
|
||||
|
|
|
|||
|
|
@ -30,9 +30,9 @@ Optional properties:
|
|||
command is asserted. Zero means one cycle, 255 means 256
|
||||
cycles.
|
||||
- bank: default NAND bank to use (0-3 are valid, 0 is the default).
|
||||
- nand-ecc-mode : see nand.txt
|
||||
- nand-ecc-strength : see nand.txt
|
||||
- nand-ecc-step-size : see nand.txt
|
||||
- nand-ecc-mode : see nand-controller.yaml
|
||||
- nand-ecc-strength : see nand-controller.yaml
|
||||
- nand-ecc-step-size : see nand-controller.yaml
|
||||
|
||||
Can support 1-bit HW ECC (default) or if stronger correction is required,
|
||||
software-based BCH.
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ explained in a separate documents - please refer to
|
|||
Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
|
||||
|
||||
For NAND specific properties such as ECC modes or bus width, please refer to
|
||||
Documentation/devicetree/bindings/mtd/nand.txt
|
||||
Documentation/devicetree/bindings/mtd/nand-controller.yaml
|
||||
|
||||
|
||||
Required properties:
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ Required properties:
|
|||
NAND controller's registers. The second contains base
|
||||
physical address and size of NAND controller's buffer.
|
||||
- interrupts: Interrupt number for nfc.
|
||||
- nand-bus-width: See nand.txt.
|
||||
- nand-bus-width: See nand-controller.yaml.
|
||||
- nand-ecc-mode: Support none and hw ecc mode.
|
||||
- #address-cells: Partition address, should be set 1.
|
||||
- #size-cells: Partition size, should be set 1.
|
||||
|
|
|
|||
|
|
@ -36,29 +36,29 @@ Children nodes represent the available NAND chips.
|
|||
|
||||
Required properties:
|
||||
- reg: shall contain the native Chip Select ids (0-3).
|
||||
- nand-rb: see nand.txt (0-1).
|
||||
- nand-rb: see nand-controller.yaml (0-1).
|
||||
|
||||
Optional properties:
|
||||
- marvell,nand-keep-config: orders the driver not to take the timings
|
||||
from the core and leaving them completely untouched. Bootloader
|
||||
timings will then be used.
|
||||
- label: MTD name.
|
||||
- nand-on-flash-bbt: see nand.txt.
|
||||
- nand-ecc-mode: see nand.txt. Will use hardware ECC if not specified.
|
||||
- nand-ecc-algo: see nand.txt. This property is essentially useful when
|
||||
- nand-on-flash-bbt: see nand-controller.yaml.
|
||||
- nand-ecc-mode: see nand-controller.yaml. Will use hardware ECC if not specified.
|
||||
- nand-ecc-algo: see nand-controller.yaml. This property is essentially useful when
|
||||
not using hardware ECC. Howerver, it may be added when using hardware
|
||||
ECC for clarification but will be ignored by the driver because ECC
|
||||
mode is chosen depending on the page size and the strength required by
|
||||
the NAND chip. This value may be overwritten with nand-ecc-strength
|
||||
property.
|
||||
- nand-ecc-strength: see nand.txt.
|
||||
- nand-ecc-step-size: see nand.txt. Marvell's NAND flash controller does
|
||||
- nand-ecc-strength: see nand-controller.yaml.
|
||||
- nand-ecc-step-size: see nand-controller.yaml. Marvell's NAND flash controller does
|
||||
use fixed strength (1-bit for Hamming, 16-bit for BCH), so the actual
|
||||
step size will shrink or grow in order to fit the required strength.
|
||||
Step sizes are not completely random for all and follow certain
|
||||
patterns described in AN-379, "Marvell SoC NFC ECC".
|
||||
|
||||
See Documentation/devicetree/bindings/mtd/nand.txt for more details on
|
||||
See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on
|
||||
generic bindings.
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -4,9 +4,9 @@ Required properties:
|
|||
- compatible: "fsl,imxXX-nand"
|
||||
- reg: address range of the nfc block
|
||||
- interrupts: irq to be used
|
||||
- nand-bus-width: see nand.txt
|
||||
- nand-ecc-mode: see nand.txt
|
||||
- nand-on-flash-bbt: see nand.txt
|
||||
- nand-bus-width: see nand-controller.yaml
|
||||
- nand-ecc-mode: see nand-controller.yaml
|
||||
- nand-on-flash-bbt: see nand-controller.yaml
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -26,14 +26,14 @@ Optional children node properties:
|
|||
"hw" is supported.
|
||||
- nand-ecc-algo: string, algorithm of NAND ECC.
|
||||
Supported values with "hw" ECC mode are: "rs", "bch".
|
||||
- nand-bus-width : See nand.txt
|
||||
- nand-on-flash-bbt: See nand.txt
|
||||
- nand-bus-width : See nand-controller.yaml
|
||||
- nand-on-flash-bbt: See nand-controller.yaml
|
||||
- nand-ecc-strength: integer representing the number of bits to correct
|
||||
per ECC step (always 512). Supported strength using HW ECC
|
||||
modes are:
|
||||
- RS: 4, 6, 8
|
||||
- BCH: 4, 8, 14, 16
|
||||
- nand-ecc-maximize: See nand.txt
|
||||
- nand-ecc-maximize: See nand-controller.yaml
|
||||
- nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM
|
||||
are chosen.
|
||||
- wp-gpios: GPIO specifier for the write protect pin.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
* Oxford Semiconductor OXNAS NAND Controller
|
||||
|
||||
Please refer to nand.txt for generic information regarding MTD NAND bindings.
|
||||
Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings.
|
||||
|
||||
Required properties:
|
||||
- compatible: "oxsemi,ox820-nand"
|
||||
|
|
|
|||
|
|
@ -47,8 +47,8 @@ Required properties:
|
|||
- #size-cells: see partition.txt
|
||||
|
||||
Optional properties:
|
||||
- nand-bus-width: see nand.txt
|
||||
- nand-ecc-strength: see nand.txt. If not specified, then ECC strength will
|
||||
- nand-bus-width: see nand-controller.yaml
|
||||
- nand-ecc-strength: see nand-controller.yaml. If not specified, then ECC strength will
|
||||
be used according to chip requirement and available
|
||||
OOB size.
|
||||
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ Required properties:
|
|||
"samsung,s3c2412-nand"
|
||||
"samsung,s3c2440-nand"
|
||||
- reg : register's location and length.
|
||||
- #address-cells, #size-cells : see nand.txt
|
||||
- #address-cells, #size-cells : see nand-controller.yaml
|
||||
- clocks : phandle to the nand controller clock
|
||||
- clock-names : must contain "nand"
|
||||
|
||||
|
|
@ -14,8 +14,8 @@ Optional child nodes:
|
|||
Child nodes representing the available nand chips.
|
||||
|
||||
Optional child properties:
|
||||
- nand-ecc-mode : see nand.txt
|
||||
- nand-on-flash-bbt : see nand.txt
|
||||
- nand-ecc-mode : see nand-controller.yaml
|
||||
- nand-on-flash-bbt : see nand-controller.yaml
|
||||
|
||||
Each child device node may optionally contain a 'partitions' sub-node,
|
||||
which further contains sub-nodes describing the flash partition mapping.
|
||||
|
|
|
|||
|
|
@ -24,9 +24,9 @@ Required properties:
|
|||
- reg: describes the CS lines assigned to the NAND device.
|
||||
|
||||
Optional properties:
|
||||
- nand-on-flash-bbt: see nand.txt
|
||||
- nand-ecc-strength: see nand.txt
|
||||
- nand-ecc-step-size: see nand.txt
|
||||
- nand-on-flash-bbt: see nand-controller.yaml
|
||||
- nand-ecc-strength: see nand-controller.yaml
|
||||
- nand-ecc-step-size: see nand-controller.yaml
|
||||
|
||||
The following ECC strength and step size are currently supported:
|
||||
- nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Hamming)
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ Required properties:
|
|||
- #size-cells: <0>
|
||||
|
||||
Children nodes represent the available NAND chips.
|
||||
See Documentation/devicetree/bindings/mtd/nand.txt for generic bindings.
|
||||
See Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -25,14 +25,14 @@ only handle one NAND chip.
|
|||
|
||||
Required properties:
|
||||
- compatible: Should be set to "fsl,vf610-nfc-cs".
|
||||
- nand-bus-width: see nand.txt
|
||||
- nand-ecc-mode: see nand.txt
|
||||
- nand-bus-width: see nand-controller.yaml
|
||||
- nand-ecc-mode: see nand-controller.yaml
|
||||
|
||||
Required properties for hardware ECC:
|
||||
- nand-ecc-strength: supported strengths are 24 and 32 bit (see nand.txt)
|
||||
- nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml)
|
||||
- nand-ecc-step-size: step size equals page size, currently only 2k pages are
|
||||
supported
|
||||
- nand-on-flash-bbt: see nand.txt
|
||||
- nand-on-flash-bbt: see nand-controller.yaml
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,38 @@
|
|||
DT compatible string versioning for SiFive open-source IP blocks
|
||||
|
||||
This document describes the version specification for DT "compatible"
|
||||
strings for open-source SiFive IP blocks. HDL for these IP blocks
|
||||
can be found in this public repository:
|
||||
|
||||
https://github.com/sifive/sifive-blocks
|
||||
|
||||
IP block-specific DT compatible strings are contained within the HDL,
|
||||
in the form "sifive,<ip-block-name><integer version number>".
|
||||
|
||||
An example is "sifive,uart0" from:
|
||||
|
||||
https://github.com/sifive/sifive-blocks/blob/v1.0/src/main/scala/devices/uart/UART.scala#L43
|
||||
|
||||
Until these IP blocks (or IP integration) support version
|
||||
auto-discovery, the maintainers of these IP blocks intend to increment
|
||||
the suffixed number in the compatible string whenever the software
|
||||
interface to these IP blocks changes, or when the functionality of the
|
||||
underlying IP blocks changes in a way that software should be aware of.
|
||||
|
||||
Driver developers can use compatible string "match" values such as
|
||||
"sifive,uart0" to indicate that their driver is compatible with the
|
||||
register interface and functionality associated with the relevant
|
||||
upstream sifive-blocks commits. It is expected that most drivers will
|
||||
match on these IP block-specific compatible strings.
|
||||
|
||||
DT data authors, when writing data for a particular SoC, should
|
||||
continue to specify an SoC-specific compatible string value, such as
|
||||
"sifive,fu540-c000-uart". This way, if SoC-specific
|
||||
integration-specific bug fixes or workarounds are needed, the kernel
|
||||
or other system software can match on this string to apply them. The
|
||||
IP block-specific compatible string (such as "sifive,uart0") should
|
||||
then be specified as a subsequent value.
|
||||
|
||||
An example of this style:
|
||||
|
||||
compatible = "sifive,fu540-c000-uart", "sifive,uart0";
|
||||
|
|
@ -251,7 +251,7 @@ for defining a counter device.
|
|||
.. kernel-doc:: include/linux/counter.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: drivers/counter/generic-counter.c
|
||||
.. kernel-doc:: drivers/counter/counter.c
|
||||
:export:
|
||||
|
||||
Implementation
|
||||
|
|
|
|||
|
|
@ -437,20 +437,6 @@ more details, with real examples.
|
|||
The second argument is optional, and if supplied will be used
|
||||
if first argument is not supported.
|
||||
|
||||
cc-ldoption
|
||||
cc-ldoption is used to check if $(CC) when used to link object files
|
||||
supports the given option. An optional second option may be
|
||||
specified if first option are not supported.
|
||||
|
||||
Example:
|
||||
#arch/x86/kernel/Makefile
|
||||
vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
|
||||
|
||||
In the above example, vsyscall-flags will be assigned the option
|
||||
-Wl$(comma)--hash-style=sysv if it is supported by $(CC).
|
||||
The second argument is optional, and if supplied will be used
|
||||
if first argument is not supported.
|
||||
|
||||
as-instr
|
||||
as-instr checks if the assembler reports a specific instruction
|
||||
and then outputs either option1 or option2
|
||||
|
|
|
|||
|
|
@ -410,7 +410,7 @@ Notes on loading the dump-capture kernel:
|
|||
* Boot parameter "1" boots the dump-capture kernel into single-user
|
||||
mode without networking. If you want networking, use "3".
|
||||
|
||||
* We generally don' have to bring up a SMP kernel just to capture the
|
||||
* We generally don't have to bring up a SMP kernel just to capture the
|
||||
dump. Hence generally it is useful either to build a UP dump-capture
|
||||
kernel or specify maxcpus=1 option while loading dump-capture kernel.
|
||||
Note, though maxcpus always works, you had better replace it with
|
||||
|
|
|
|||
|
|
@ -560,10 +560,10 @@ tcp_comp_sack_delay_ns - LONG INTEGER
|
|||
Default : 1,000,000 ns (1 ms)
|
||||
|
||||
tcp_comp_sack_nr - INTEGER
|
||||
Max numer of SACK that can be compressed.
|
||||
Max number of SACK that can be compressed.
|
||||
Using 0 disables SACK compression.
|
||||
|
||||
Detault : 44
|
||||
Default : 44
|
||||
|
||||
tcp_slow_start_after_idle - BOOLEAN
|
||||
If set, provide RFC2861 behavior and time out the congestion
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ The following technologies are described:
|
|||
* Generic Segmentation Offload - GSO
|
||||
* Generic Receive Offload - GRO
|
||||
* Partial Generic Segmentation Offload - GSO_PARTIAL
|
||||
* SCTP accelleration with GSO - GSO_BY_FRAGS
|
||||
* SCTP acceleration with GSO - GSO_BY_FRAGS
|
||||
|
||||
|
||||
TCP Segmentation Offload
|
||||
|
|
@ -148,7 +148,7 @@ that the IPv4 ID field is incremented in the case that a given header does
|
|||
not have the DF bit set.
|
||||
|
||||
|
||||
SCTP accelleration with GSO
|
||||
SCTP acceleration with GSO
|
||||
===========================
|
||||
|
||||
SCTP - despite the lack of hardware support - can still take advantage of
|
||||
|
|
|
|||
16
MAINTAINERS
16
MAINTAINERS
|
|
@ -2627,7 +2627,7 @@ F: Documentation/devicetree/bindings/eeprom/at24.txt
|
|||
F: drivers/misc/eeprom/at24.c
|
||||
|
||||
ATA OVER ETHERNET (AOE) DRIVER
|
||||
M: "Ed L. Cashin" <ed.cashin@acm.org>
|
||||
M: "Justin Sanders" <justin@coraid.com>
|
||||
W: http://www.openaoe.org/
|
||||
S: Supported
|
||||
F: Documentation/aoe/
|
||||
|
|
@ -2768,7 +2768,7 @@ AVIA HX711 ANALOG DIGITAL CONVERTER IIO DRIVER
|
|||
M: Andreas Klinger <ak@it-klinger.de>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/avia-hx711.txt
|
||||
F: Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
|
||||
F: drivers/iio/adc/hx711.c
|
||||
|
||||
AX.25 NETWORK LAYER
|
||||
|
|
@ -8611,14 +8611,12 @@ F: arch/x86/include/asm/svm.h
|
|||
F: arch/x86/kvm/svm.c
|
||||
|
||||
KERNEL VIRTUAL MACHINE FOR ARM/ARM64 (KVM/arm, KVM/arm64)
|
||||
M: Christoffer Dall <christoffer.dall@arm.com>
|
||||
M: Marc Zyngier <marc.zyngier@arm.com>
|
||||
R: James Morse <james.morse@arm.com>
|
||||
R: Julien Thierry <julien.thierry@arm.com>
|
||||
R: Suzuki K Pouloze <suzuki.poulose@arm.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: kvmarm@lists.cs.columbia.edu
|
||||
W: http://systems.cs.columbia.edu/projects/kvm-arm
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git
|
||||
S: Maintained
|
||||
F: arch/arm/include/uapi/asm/kvm*
|
||||
|
|
@ -11068,10 +11066,8 @@ S: Supported
|
|||
F: drivers/net/ethernet/qlogic/netxen/
|
||||
|
||||
NFC SUBSYSTEM
|
||||
M: Samuel Ortiz <sameo@linux.intel.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
L: linux-nfc@lists.01.org (subscribers-only)
|
||||
S: Supported
|
||||
L: netdev@vger.kernel.org
|
||||
S: Orphan
|
||||
F: net/nfc/
|
||||
F: include/net/nfc/
|
||||
F: include/uapi/linux/nfc.h
|
||||
|
|
@ -11228,7 +11224,7 @@ F: drivers/video/fbdev/riva/
|
|||
F: drivers/video/fbdev/nvidia/
|
||||
|
||||
NVM EXPRESS DRIVER
|
||||
M: Keith Busch <keith.busch@intel.com>
|
||||
M: Keith Busch <kbusch@kernel.org>
|
||||
M: Jens Axboe <axboe@fb.com>
|
||||
M: Christoph Hellwig <hch@lst.de>
|
||||
M: Sagi Grimberg <sagi@grimberg.me>
|
||||
|
|
@ -14353,7 +14349,7 @@ SIMPLEFB FB DRIVER
|
|||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/display/simple-framebuffer.txt
|
||||
F: Documentation/devicetree/bindings/display/simple-framebuffer.yaml
|
||||
F: drivers/video/fbdev/simplefb.c
|
||||
F: include/linux/platform_data/simplefb.h
|
||||
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -2,8 +2,8 @@
|
|||
VERSION = 5
|
||||
PATCHLEVEL = 2
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = Shy Crocodile
|
||||
EXTRAVERSION = -rc2
|
||||
NAME = Golden Lions
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
|
|
|||
|
|
@ -1,16 +1,8 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
* include/asm-alpha/xor.h
|
||||
*
|
||||
* Optimized RAID-5 checksumming functions for alpha EV5 and EV6
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* (for example /usr/src/linux/COPYING); if not, write to the Free
|
||||
* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
extern void xor_alpha_2(unsigned long, unsigned long *, unsigned long *);
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Makefile for the FPU instruction emulation.
|
||||
#
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/kernel.h>
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Makefile for the linux alpha-specific parts of the memory manager.
|
||||
#
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* aks-cdu.dts - Device Tree file for AK signal CDU
|
||||
*
|
||||
* Copyright (C) 2012 AK signal Brno a.s.
|
||||
* 2012 Jiri Prchal <jiri.prchal@aksignal.cz>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-ariag25.dts - Device Tree file for Acme Systems Aria G25 (AT91SAM9G25 based)
|
||||
*
|
||||
* Copyright (C) 2013 Douglas Gilbert <dgilbert@interlog.com>,
|
||||
* Robert Nelson <robertcnelson@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g25.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-cosino.dtsi - Device Tree file for Cosino core module
|
||||
*
|
||||
|
|
@ -7,8 +8,6 @@
|
|||
* Derived from at91sam9x5ek.dtsi by:
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "at91sam9g35.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-cosino_mega2560.dts - Device Tree file for Cosino board with
|
||||
* Mega 2560 extension
|
||||
|
|
@ -8,8 +9,6 @@
|
|||
* Derived from at91sam9g35ek.dts by:
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board
|
||||
*
|
||||
* Based on DT files for at91sam9g20ek evaluation board (AT91SAM9G20 SoC)
|
||||
*
|
||||
* Copyright (C) 2013 Douglas Gilbert <dgilbert@interlog.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g20.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-kizbox.dts - Device Tree file for Overkiz Kizbox board
|
||||
*
|
||||
* Copyright (C) 2012-2014 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
* 2014-2015 Gaël PORTAY <g.portay@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g20.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-kizbox2.dts - Device Tree file for Overkiz Kizbox 2 board
|
||||
*
|
||||
* Copyright (C) 2014 Gaël PORTAY <g.portay@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d31.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-kizboxmini.dts - Device Tree file for Overkiz Kizbox mini board
|
||||
*
|
||||
* Copyright (C) 2014 Gaël PORTAY <g.portay@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g25.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
|
||||
*
|
||||
* Copyright (C) 2017 Axentia Technologies AB
|
||||
*
|
||||
* Author: Peter Rosin <peda@axentia.se>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "sama5d31.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-sam9_l9260.dts - Device Tree file for Olimex SAM9-L9260 board
|
||||
*
|
||||
* Copyright (C) 2016 Raashid Muhammed <raashidmuhammed@zilogic.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9260.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board
|
||||
*
|
||||
* Copyright (C) 2014 Atmel,
|
||||
* 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d36.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
|
||||
*
|
||||
* Copyright (C) 2017 Axentia Technologies AB
|
||||
*
|
||||
* Author: Peter Rosin <peda@axentia.se>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
|
||||
*
|
||||
|
|
@ -6,8 +7,6 @@
|
|||
* 2012 Joachim Eastwood <manabian@gmail.com>
|
||||
*
|
||||
* Based on at91sam9260.dtsi
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91rm9200_pqfp.dtsi - Device Tree Include file for AT91RM9200 PQFP family SoC
|
||||
*
|
||||
* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "at91rm9200.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
|
||||
* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g15.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g25.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g35.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
|
||||
* applies to AT91SAM9G45, AT91SAM9M10,
|
||||
|
|
@ -5,8 +6,6 @@
|
|||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g45.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Hong Xu <hong.xu@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Hong Xu <hong.xu@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9n12.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
|
||||
*
|
||||
* Copyright (C) 2014 Microchip
|
||||
* Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9x25.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9x35ek.dts - Device Tree file for AT91SAM9X35-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9x35.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
|
||||
* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
|
||||
|
|
@ -5,8 +6,6 @@
|
|||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9x5dm.dtsi - Device Tree file for SAM9x5 display module
|
||||
*
|
||||
|
|
@ -5,8 +6,6 @@
|
|||
* 2014 Free Electrons
|
||||
*
|
||||
* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "at91sam9x5cm.dtsi"
|
||||
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* DTS file for CSR SiRFatlas6 Evaluation Board
|
||||
*
|
||||
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* DTS file for CSR SiRFatlas6 SoC
|
||||
*
|
||||
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* DTS file for CSR SiRFatlas7 Evaluation Board
|
||||
*
|
||||
* Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* DTS file for CSR SiRFatlas7 SoC
|
||||
*
|
||||
* Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -1,8 +1,4 @@
|
|||
/*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*/
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,8 +1,4 @@
|
|||
/*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*/
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "ep7211.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
|
|
|||
|
|
@ -1,8 +1,4 @@
|
|||
/*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*/
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "ep7209.dtsi"
|
||||
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* evk-pro3.dts - Device Tree file for Telit EVK-PRO3 with Telit GE863-PRO3
|
||||
*
|
||||
* Copyright (C) 2012 Telit,
|
||||
* 2012 Fabio Porcedda <fabio.porcedda@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* ge863_pro3.dtsi - Device Tree file for Telit GE863-PRO3
|
||||
*
|
||||
* Copyright (C) 2012 Telit,
|
||||
* 2012 Fabio Porcedda <fabio.porcedda@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "at91sam9260.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,19 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,19 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/clock/hi3519-clock.h>
|
||||
|
|
|
|||
|
|
@ -1,19 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "imx51.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,19 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,8 +1,7 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
|
||||
*
|
||||
* Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,8 +1,7 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
|
||||
*
|
||||
* Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
|
|
|||
|
|
@ -1,10 +1,7 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
|
||||
* Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 (or later) as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition
|
||||
*
|
||||
* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* ox810se.dtsi - Device tree file for Oxford Semiconductor OX810SE SoC
|
||||
*
|
||||
* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later
|
||||
*/
|
||||
|
||||
#include <dt-bindings/clock/oxsemi,ox810se.h>
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
|
||||
*
|
||||
* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* ox820.dtsi - Device tree file for Oxford Semiconductor OX820 SoC
|
||||
*
|
||||
* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* DTS file for CSR SiRFprimaII Evaluation Board
|
||||
*
|
||||
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* DTS file for CSR SiRFprimaII SoC
|
||||
*
|
||||
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
|
||||
*
|
||||
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "dt-bindings/clock/pxa-clock.h"
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
|
||||
* applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Atmel,
|
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d31.dtsi - Device Tree Include file for SAMA5D31 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "sama5d3.dtsi"
|
||||
#include "sama5d3_lcd.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d31ek.dts - Device Tree file for SAMA5D31-EK board
|
||||
*
|
||||
* Copyright (C) 2013 Atmel,
|
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d31.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d33.dtsi - Device Tree Include file for SAMA5D33 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "sama5d3.dtsi"
|
||||
#include "sama5d3_lcd.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d33ek.dts - Device Tree file for SAMA5D33-EK board
|
||||
*
|
||||
* Copyright (C) 2013 Atmel,
|
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d33.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d34.dtsi - Device Tree Include file for SAMA5D34 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "sama5d3.dtsi"
|
||||
#include "sama5d3_lcd.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d34ek.dts - Device Tree file for SAMA5D34-EK board
|
||||
*
|
||||
* Copyright (C) 2013 Atmel,
|
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d34.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d35.dtsi - Device Tree Include file for SAMA5D35 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "sama5d3.dtsi"
|
||||
#include "sama5d3_gmac.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d35ek.dts - Device Tree file for SAMA5D35-EK board
|
||||
*
|
||||
* Copyright (C) 2013 Atmel,
|
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d35.dtsi"
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* sama5d36.dtsi - Device Tree Include file for SAMA5D36 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Atmel,
|
||||
* 2013 Josh Wu <josh.wu@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "sama5d3.dtsi"
|
||||
#include "sama5d3_can.dtsi"
|
||||
|
|
|
|||
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