Merge branch 'linus' into timers/core
Reason: Pick up the hrtimer_clock_to_base_table fix from mainline Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Коммит
3687a2c0d8
|
@ -294,6 +294,7 @@
|
||||||
<!ENTITY sub-srggb10 SYSTEM "v4l/pixfmt-srggb10.xml">
|
<!ENTITY sub-srggb10 SYSTEM "v4l/pixfmt-srggb10.xml">
|
||||||
<!ENTITY sub-srggb8 SYSTEM "v4l/pixfmt-srggb8.xml">
|
<!ENTITY sub-srggb8 SYSTEM "v4l/pixfmt-srggb8.xml">
|
||||||
<!ENTITY sub-y10 SYSTEM "v4l/pixfmt-y10.xml">
|
<!ENTITY sub-y10 SYSTEM "v4l/pixfmt-y10.xml">
|
||||||
|
<!ENTITY sub-y12 SYSTEM "v4l/pixfmt-y12.xml">
|
||||||
<!ENTITY sub-pixfmt SYSTEM "v4l/pixfmt.xml">
|
<!ENTITY sub-pixfmt SYSTEM "v4l/pixfmt.xml">
|
||||||
<!ENTITY sub-cropcap SYSTEM "v4l/vidioc-cropcap.xml">
|
<!ENTITY sub-cropcap SYSTEM "v4l/vidioc-cropcap.xml">
|
||||||
<!ENTITY sub-dbg-g-register SYSTEM "v4l/vidioc-dbg-g-register.xml">
|
<!ENTITY sub-dbg-g-register SYSTEM "v4l/vidioc-dbg-g-register.xml">
|
||||||
|
|
|
@ -34,7 +34,7 @@
|
||||||
<varlistentry>
|
<varlistentry>
|
||||||
<term><parameter>request</parameter></term>
|
<term><parameter>request</parameter></term>
|
||||||
<listitem>
|
<listitem>
|
||||||
<para>MEDIA_IOC_ENUM_LINKS</para>
|
<para>MEDIA_IOC_SETUP_LINK</para>
|
||||||
</listitem>
|
</listitem>
|
||||||
</varlistentry>
|
</varlistentry>
|
||||||
<varlistentry>
|
<varlistentry>
|
||||||
|
|
|
@ -0,0 +1,79 @@
|
||||||
|
<refentry id="V4L2-PIX-FMT-Y12">
|
||||||
|
<refmeta>
|
||||||
|
<refentrytitle>V4L2_PIX_FMT_Y12 ('Y12 ')</refentrytitle>
|
||||||
|
&manvol;
|
||||||
|
</refmeta>
|
||||||
|
<refnamediv>
|
||||||
|
<refname><constant>V4L2_PIX_FMT_Y12</constant></refname>
|
||||||
|
<refpurpose>Grey-scale image</refpurpose>
|
||||||
|
</refnamediv>
|
||||||
|
<refsect1>
|
||||||
|
<title>Description</title>
|
||||||
|
|
||||||
|
<para>This is a grey-scale image with a depth of 12 bits per pixel. Pixels
|
||||||
|
are stored in 16-bit words with unused high bits padded with 0. The least
|
||||||
|
significant byte is stored at lower memory addresses (little-endian).</para>
|
||||||
|
|
||||||
|
<example>
|
||||||
|
<title><constant>V4L2_PIX_FMT_Y12</constant> 4 × 4
|
||||||
|
pixel image</title>
|
||||||
|
|
||||||
|
<formalpara>
|
||||||
|
<title>Byte Order.</title>
|
||||||
|
<para>Each cell is one byte.
|
||||||
|
<informaltable frame="none">
|
||||||
|
<tgroup cols="9" align="center">
|
||||||
|
<colspec align="left" colwidth="2*" />
|
||||||
|
<tbody valign="top">
|
||||||
|
<row>
|
||||||
|
<entry>start + 0:</entry>
|
||||||
|
<entry>Y'<subscript>00low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>00high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>01low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>01high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>02low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>02high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>03low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>03high</subscript></entry>
|
||||||
|
</row>
|
||||||
|
<row>
|
||||||
|
<entry>start + 8:</entry>
|
||||||
|
<entry>Y'<subscript>10low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>10high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>11low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>11high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>12low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>12high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>13low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>13high</subscript></entry>
|
||||||
|
</row>
|
||||||
|
<row>
|
||||||
|
<entry>start + 16:</entry>
|
||||||
|
<entry>Y'<subscript>20low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>20high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>21low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>21high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>22low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>22high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>23low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>23high</subscript></entry>
|
||||||
|
</row>
|
||||||
|
<row>
|
||||||
|
<entry>start + 24:</entry>
|
||||||
|
<entry>Y'<subscript>30low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>30high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>31low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>31high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>32low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>32high</subscript></entry>
|
||||||
|
<entry>Y'<subscript>33low</subscript></entry>
|
||||||
|
<entry>Y'<subscript>33high</subscript></entry>
|
||||||
|
</row>
|
||||||
|
</tbody>
|
||||||
|
</tgroup>
|
||||||
|
</informaltable>
|
||||||
|
</para>
|
||||||
|
</formalpara>
|
||||||
|
</example>
|
||||||
|
</refsect1>
|
||||||
|
</refentry>
|
|
@ -696,6 +696,7 @@ information.</para>
|
||||||
&sub-packed-yuv;
|
&sub-packed-yuv;
|
||||||
&sub-grey;
|
&sub-grey;
|
||||||
&sub-y10;
|
&sub-y10;
|
||||||
|
&sub-y12;
|
||||||
&sub-y16;
|
&sub-y16;
|
||||||
&sub-yuyv;
|
&sub-yuyv;
|
||||||
&sub-uyvy;
|
&sub-uyvy;
|
||||||
|
|
|
@ -456,6 +456,23 @@
|
||||||
<entry>b<subscript>1</subscript></entry>
|
<entry>b<subscript>1</subscript></entry>
|
||||||
<entry>b<subscript>0</subscript></entry>
|
<entry>b<subscript>0</subscript></entry>
|
||||||
</row>
|
</row>
|
||||||
|
<row id="V4L2-MBUS-FMT-SGBRG8-1X8">
|
||||||
|
<entry>V4L2_MBUS_FMT_SGBRG8_1X8</entry>
|
||||||
|
<entry>0x3013</entry>
|
||||||
|
<entry></entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>g<subscript>7</subscript></entry>
|
||||||
|
<entry>g<subscript>6</subscript></entry>
|
||||||
|
<entry>g<subscript>5</subscript></entry>
|
||||||
|
<entry>g<subscript>4</subscript></entry>
|
||||||
|
<entry>g<subscript>3</subscript></entry>
|
||||||
|
<entry>g<subscript>2</subscript></entry>
|
||||||
|
<entry>g<subscript>1</subscript></entry>
|
||||||
|
<entry>g<subscript>0</subscript></entry>
|
||||||
|
</row>
|
||||||
<row id="V4L2-MBUS-FMT-SGRBG8-1X8">
|
<row id="V4L2-MBUS-FMT-SGRBG8-1X8">
|
||||||
<entry>V4L2_MBUS_FMT_SGRBG8_1X8</entry>
|
<entry>V4L2_MBUS_FMT_SGRBG8_1X8</entry>
|
||||||
<entry>0x3002</entry>
|
<entry>0x3002</entry>
|
||||||
|
@ -473,6 +490,23 @@
|
||||||
<entry>g<subscript>1</subscript></entry>
|
<entry>g<subscript>1</subscript></entry>
|
||||||
<entry>g<subscript>0</subscript></entry>
|
<entry>g<subscript>0</subscript></entry>
|
||||||
</row>
|
</row>
|
||||||
|
<row id="V4L2-MBUS-FMT-SRGGB8-1X8">
|
||||||
|
<entry>V4L2_MBUS_FMT_SRGGB8_1X8</entry>
|
||||||
|
<entry>0x3014</entry>
|
||||||
|
<entry></entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>r<subscript>7</subscript></entry>
|
||||||
|
<entry>r<subscript>6</subscript></entry>
|
||||||
|
<entry>r<subscript>5</subscript></entry>
|
||||||
|
<entry>r<subscript>4</subscript></entry>
|
||||||
|
<entry>r<subscript>3</subscript></entry>
|
||||||
|
<entry>r<subscript>2</subscript></entry>
|
||||||
|
<entry>r<subscript>1</subscript></entry>
|
||||||
|
<entry>r<subscript>0</subscript></entry>
|
||||||
|
</row>
|
||||||
<row id="V4L2-MBUS-FMT-SBGGR10-DPCM8-1X8">
|
<row id="V4L2-MBUS-FMT-SBGGR10-DPCM8-1X8">
|
||||||
<entry>V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8</entry>
|
<entry>V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8</entry>
|
||||||
<entry>0x300b</entry>
|
<entry>0x300b</entry>
|
||||||
|
@ -2159,6 +2193,31 @@
|
||||||
<entry>u<subscript>1</subscript></entry>
|
<entry>u<subscript>1</subscript></entry>
|
||||||
<entry>u<subscript>0</subscript></entry>
|
<entry>u<subscript>0</subscript></entry>
|
||||||
</row>
|
</row>
|
||||||
|
<row id="V4L2-MBUS-FMT-Y12-1X12">
|
||||||
|
<entry>V4L2_MBUS_FMT_Y12_1X12</entry>
|
||||||
|
<entry>0x2013</entry>
|
||||||
|
<entry></entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>-</entry>
|
||||||
|
<entry>y<subscript>11</subscript></entry>
|
||||||
|
<entry>y<subscript>10</subscript></entry>
|
||||||
|
<entry>y<subscript>9</subscript></entry>
|
||||||
|
<entry>y<subscript>8</subscript></entry>
|
||||||
|
<entry>y<subscript>7</subscript></entry>
|
||||||
|
<entry>y<subscript>6</subscript></entry>
|
||||||
|
<entry>y<subscript>5</subscript></entry>
|
||||||
|
<entry>y<subscript>4</subscript></entry>
|
||||||
|
<entry>y<subscript>3</subscript></entry>
|
||||||
|
<entry>y<subscript>2</subscript></entry>
|
||||||
|
<entry>y<subscript>1</subscript></entry>
|
||||||
|
<entry>y<subscript>0</subscript></entry>
|
||||||
|
</row>
|
||||||
<row id="V4L2-MBUS-FMT-UYVY8-1X16">
|
<row id="V4L2-MBUS-FMT-UYVY8-1X16">
|
||||||
<entry>V4L2_MBUS_FMT_UYVY8_1X16</entry>
|
<entry>V4L2_MBUS_FMT_UYVY8_1X16</entry>
|
||||||
<entry>0x200f</entry>
|
<entry>0x200f</entry>
|
||||||
|
|
|
@ -52,8 +52,10 @@ Brief summary of control files.
|
||||||
tasks # attach a task(thread) and show list of threads
|
tasks # attach a task(thread) and show list of threads
|
||||||
cgroup.procs # show list of processes
|
cgroup.procs # show list of processes
|
||||||
cgroup.event_control # an interface for event_fd()
|
cgroup.event_control # an interface for event_fd()
|
||||||
memory.usage_in_bytes # show current memory(RSS+Cache) usage.
|
memory.usage_in_bytes # show current res_counter usage for memory
|
||||||
memory.memsw.usage_in_bytes # show current memory+Swap usage
|
(See 5.5 for details)
|
||||||
|
memory.memsw.usage_in_bytes # show current res_counter usage for memory+Swap
|
||||||
|
(See 5.5 for details)
|
||||||
memory.limit_in_bytes # set/show limit of memory usage
|
memory.limit_in_bytes # set/show limit of memory usage
|
||||||
memory.memsw.limit_in_bytes # set/show limit of memory+Swap usage
|
memory.memsw.limit_in_bytes # set/show limit of memory+Swap usage
|
||||||
memory.failcnt # show the number of memory usage hits limits
|
memory.failcnt # show the number of memory usage hits limits
|
||||||
|
@ -453,6 +455,15 @@ memory under it will be reclaimed.
|
||||||
You can reset failcnt by writing 0 to failcnt file.
|
You can reset failcnt by writing 0 to failcnt file.
|
||||||
# echo 0 > .../memory.failcnt
|
# echo 0 > .../memory.failcnt
|
||||||
|
|
||||||
|
5.5 usage_in_bytes
|
||||||
|
|
||||||
|
For efficiency, as other kernel components, memory cgroup uses some optimization
|
||||||
|
to avoid unnecessary cacheline false sharing. usage_in_bytes is affected by the
|
||||||
|
method and doesn't show 'exact' value of memory(and swap) usage, it's an fuzz
|
||||||
|
value for efficient access. (Of course, when necessary, it's synchronized.)
|
||||||
|
If you want to know more exact memory usage, you should use RSS+CACHE(+SWAP)
|
||||||
|
value in memory.stat(see 5.2).
|
||||||
|
|
||||||
6. Hierarchy support
|
6. Hierarchy support
|
||||||
|
|
||||||
The memory controller supports a deep hierarchy and hierarchical accounting.
|
The memory controller supports a deep hierarchy and hierarchical accounting.
|
||||||
|
|
|
@ -14,10 +14,6 @@ Supported chips:
|
||||||
Prefix: 'gl523sm'
|
Prefix: 'gl523sm'
|
||||||
Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
|
Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
|
||||||
Datasheet:
|
Datasheet:
|
||||||
* Intel Xeon Processor
|
|
||||||
Prefix: - any other - may require 'force_adm1021' parameter
|
|
||||||
Addresses scanned: none
|
|
||||||
Datasheet: Publicly available at Intel website
|
|
||||||
* Maxim MAX1617
|
* Maxim MAX1617
|
||||||
Prefix: 'max1617'
|
Prefix: 'max1617'
|
||||||
Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
|
Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
|
||||||
|
@ -91,21 +87,27 @@ will do no harm, but will return 'old' values. It is possible to make
|
||||||
ADM1021-clones do faster measurements, but there is really no good reason
|
ADM1021-clones do faster measurements, but there is really no good reason
|
||||||
for that.
|
for that.
|
||||||
|
|
||||||
Xeon support
|
|
||||||
------------
|
|
||||||
|
|
||||||
Some Xeon processors have real max1617, adm1021, or compatible chips
|
Netburst-based Xeon support
|
||||||
within them, with two temperature sensors.
|
---------------------------
|
||||||
|
|
||||||
Other Xeons have chips with only one sensor.
|
Some Xeon processors based on the Netburst (early Pentium 4, from 2001 to
|
||||||
|
2003) microarchitecture had real MAX1617, ADM1021, or compatible chips
|
||||||
|
within them, with two temperature sensors. Other Xeon processors of this
|
||||||
|
era (with 400 MHz FSB) had chips with only one temperature sensor.
|
||||||
|
|
||||||
If you have a Xeon, and the adm1021 module loads, and both temperatures
|
If you have such an old Xeon, and you get two valid temperatures when
|
||||||
appear valid, then things are good.
|
loading the adm1021 module, then things are good.
|
||||||
|
|
||||||
If the adm1021 module doesn't load, you should try this:
|
If nothing happens when loading the adm1021 module, and you are certain
|
||||||
modprobe adm1021 force_adm1021=BUS,ADDRESS
|
that your specific Xeon processor model includes compatible sensors, you
|
||||||
ADDRESS can only be 0x18, 0x1a, 0x29, 0x2b, 0x4c, or 0x4e.
|
will have to explicitly instantiate the sensor chips from user-space. See
|
||||||
|
method 4 in Documentation/i2c/instantiating-devices. Possible slave
|
||||||
|
addresses are 0x18, 0x1a, 0x29, 0x2b, 0x4c, or 0x4e. It is likely that
|
||||||
|
only temp2 will be correct and temp1 will have to be ignored.
|
||||||
|
|
||||||
If you have dual Xeons you may have appear to have two separate
|
Previous generations of the Xeon processor (based on Pentium II/III)
|
||||||
adm1021-compatible chips, or two single-temperature sensors, at distinct
|
didn't have these sensors. Next generations of Xeon processors (533 MHz
|
||||||
addresses.
|
FSB and faster) lost them, until the Core-based generation which
|
||||||
|
introduced integrated digital thermal sensors. These are supported by
|
||||||
|
the coretemp driver.
|
||||||
|
|
|
@ -32,6 +32,16 @@ Supported chips:
|
||||||
Addresses scanned: I2C 0x4c and 0x4d
|
Addresses scanned: I2C 0x4c and 0x4d
|
||||||
Datasheet: Publicly available at the ON Semiconductor website
|
Datasheet: Publicly available at the ON Semiconductor website
|
||||||
http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
|
http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
|
||||||
|
* Analog Devices ADT7461A
|
||||||
|
Prefix: 'adt7461a'
|
||||||
|
Addresses scanned: I2C 0x4c and 0x4d
|
||||||
|
Datasheet: Publicly available at the ON Semiconductor website
|
||||||
|
http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461A
|
||||||
|
* ON Semiconductor NCT1008
|
||||||
|
Prefix: 'nct1008'
|
||||||
|
Addresses scanned: I2C 0x4c and 0x4d
|
||||||
|
Datasheet: Publicly available at the ON Semiconductor website
|
||||||
|
http://www.onsemi.com/PowerSolutions/product.do?id=NCT1008
|
||||||
* Maxim MAX6646
|
* Maxim MAX6646
|
||||||
Prefix: 'max6646'
|
Prefix: 'max6646'
|
||||||
Addresses scanned: I2C 0x4d
|
Addresses scanned: I2C 0x4d
|
||||||
|
@ -149,7 +159,7 @@ ADM1032:
|
||||||
* ALERT is triggered by open remote sensor.
|
* ALERT is triggered by open remote sensor.
|
||||||
* SMBus PEC support for Write Byte and Receive Byte transactions.
|
* SMBus PEC support for Write Byte and Receive Byte transactions.
|
||||||
|
|
||||||
ADT7461:
|
ADT7461, ADT7461A, NCT1008:
|
||||||
* Extended temperature range (breaks compatibility)
|
* Extended temperature range (breaks compatibility)
|
||||||
* Lower resolution for remote temperature
|
* Lower resolution for remote temperature
|
||||||
|
|
||||||
|
@ -195,9 +205,9 @@ are exported, one for each channel, but these values are of course linked.
|
||||||
Only the local hysteresis can be set from user-space, and the same delta
|
Only the local hysteresis can be set from user-space, and the same delta
|
||||||
applies to the remote hysteresis.
|
applies to the remote hysteresis.
|
||||||
|
|
||||||
The lm90 driver will not update its values more frequently than every
|
The lm90 driver will not update its values more frequently than configured with
|
||||||
other second; reading them more often will do no harm, but will return
|
the update_interval attribute; reading them more often will do no harm, but will
|
||||||
'old' values.
|
return 'old' values.
|
||||||
|
|
||||||
SMBus Alert Support
|
SMBus Alert Support
|
||||||
-------------------
|
-------------------
|
||||||
|
@ -205,11 +215,12 @@ SMBus Alert Support
|
||||||
This driver has basic support for SMBus alert. When an alert is received,
|
This driver has basic support for SMBus alert. When an alert is received,
|
||||||
the status register is read and the faulty temperature channel is logged.
|
the status register is read and the faulty temperature channel is logged.
|
||||||
|
|
||||||
The Analog Devices chips (ADM1032 and ADT7461) do not implement the SMBus
|
The Analog Devices chips (ADM1032, ADT7461 and ADT7461A) and ON
|
||||||
alert protocol properly so additional care is needed: the ALERT output is
|
Semiconductor chips (NCT1008) do not implement the SMBus alert protocol
|
||||||
disabled when an alert is received, and is re-enabled only when the alarm
|
properly so additional care is needed: the ALERT output is disabled when
|
||||||
is gone. Otherwise the chip would block alerts from other chips in the bus
|
an alert is received, and is re-enabled only when the alarm is gone.
|
||||||
as long as the alarm is active.
|
Otherwise the chip would block alerts from other chips in the bus as long
|
||||||
|
as the alarm is active.
|
||||||
|
|
||||||
PEC Support
|
PEC Support
|
||||||
-----------
|
-----------
|
||||||
|
|
|
@ -37,7 +37,7 @@ Generic scaling / cropping scheme
|
||||||
-1'-
|
-1'-
|
||||||
|
|
||||||
In the above chart minuses and slashes represent "real" data amounts, points and
|
In the above chart minuses and slashes represent "real" data amounts, points and
|
||||||
accents represent "useful" data, basically, CEU scaled amd cropped output,
|
accents represent "useful" data, basically, CEU scaled and cropped output,
|
||||||
mapped back onto the client's source plane.
|
mapped back onto the client's source plane.
|
||||||
|
|
||||||
Such a configuration can be produced by user requests:
|
Such a configuration can be produced by user requests:
|
||||||
|
@ -65,7 +65,7 @@ Do not touch input rectangle - it is already optimal.
|
||||||
|
|
||||||
1. Calculate current sensor scales:
|
1. Calculate current sensor scales:
|
||||||
|
|
||||||
scale_s = ((3') - (3)) / ((2') - (2))
|
scale_s = ((2') - (2)) / ((3') - (3))
|
||||||
|
|
||||||
2. Calculate "effective" input crop (sensor subwindow) - CEU crop scaled back at
|
2. Calculate "effective" input crop (sensor subwindow) - CEU crop scaled back at
|
||||||
current sensor scales onto input window - this is user S_CROP:
|
current sensor scales onto input window - this is user S_CROP:
|
||||||
|
@ -80,7 +80,7 @@ window:
|
||||||
4. Calculate sensor output window by applying combined scales to real input
|
4. Calculate sensor output window by applying combined scales to real input
|
||||||
window:
|
window:
|
||||||
|
|
||||||
width_s_out = ((2') - (2)) / scale_comb
|
width_s_out = ((7') - (7)) = ((2') - (2)) / scale_comb
|
||||||
|
|
||||||
5. Apply iterative sensor S_FMT for sensor output window.
|
5. Apply iterative sensor S_FMT for sensor output window.
|
||||||
|
|
||||||
|
|
|
@ -12,6 +12,7 @@ CONTENTS
|
||||||
4. Application Programming Interface (API)
|
4. Application Programming Interface (API)
|
||||||
5. Example Execution Scenarios
|
5. Example Execution Scenarios
|
||||||
6. Guidelines
|
6. Guidelines
|
||||||
|
7. Debugging
|
||||||
|
|
||||||
|
|
||||||
1. Introduction
|
1. Introduction
|
||||||
|
@ -379,3 +380,42 @@ If q1 has WQ_CPU_INTENSIVE set,
|
||||||
* Unless work items are expected to consume a huge amount of CPU
|
* Unless work items are expected to consume a huge amount of CPU
|
||||||
cycles, using a bound wq is usually beneficial due to the increased
|
cycles, using a bound wq is usually beneficial due to the increased
|
||||||
level of locality in wq operations and work item execution.
|
level of locality in wq operations and work item execution.
|
||||||
|
|
||||||
|
|
||||||
|
7. Debugging
|
||||||
|
|
||||||
|
Because the work functions are executed by generic worker threads
|
||||||
|
there are a few tricks needed to shed some light on misbehaving
|
||||||
|
workqueue users.
|
||||||
|
|
||||||
|
Worker threads show up in the process list as:
|
||||||
|
|
||||||
|
root 5671 0.0 0.0 0 0 ? S 12:07 0:00 [kworker/0:1]
|
||||||
|
root 5672 0.0 0.0 0 0 ? S 12:07 0:00 [kworker/1:2]
|
||||||
|
root 5673 0.0 0.0 0 0 ? S 12:12 0:00 [kworker/0:0]
|
||||||
|
root 5674 0.0 0.0 0 0 ? S 12:13 0:00 [kworker/1:0]
|
||||||
|
|
||||||
|
If kworkers are going crazy (using too much cpu), there are two types
|
||||||
|
of possible problems:
|
||||||
|
|
||||||
|
1. Something beeing scheduled in rapid succession
|
||||||
|
2. A single work item that consumes lots of cpu cycles
|
||||||
|
|
||||||
|
The first one can be tracked using tracing:
|
||||||
|
|
||||||
|
$ echo workqueue:workqueue_queue_work > /sys/kernel/debug/tracing/set_event
|
||||||
|
$ cat /sys/kernel/debug/tracing/trace_pipe > out.txt
|
||||||
|
(wait a few secs)
|
||||||
|
^C
|
||||||
|
|
||||||
|
If something is busy looping on work queueing, it would be dominating
|
||||||
|
the output and the offender can be determined with the work item
|
||||||
|
function.
|
||||||
|
|
||||||
|
For the second type of problems it should be possible to just check
|
||||||
|
the stack trace of the offending worker thread.
|
||||||
|
|
||||||
|
$ cat /proc/THE_OFFENDING_KWORKER/stack
|
||||||
|
|
||||||
|
The work item's function should be trivially visible in the stack
|
||||||
|
trace.
|
||||||
|
|
29
MAINTAINERS
29
MAINTAINERS
|
@ -1032,12 +1032,13 @@ W: http://www.fluff.org/ben/linux/
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-s3c64xx/
|
F: arch/arm/mach-s3c64xx/
|
||||||
|
|
||||||
ARM/S5P ARM ARCHITECTURES
|
ARM/S5P EXYNOS ARM ARCHITECTURES
|
||||||
M: Kukjin Kim <kgene.kim@samsung.com>
|
M: Kukjin Kim <kgene.kim@samsung.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-s5p*/
|
F: arch/arm/mach-s5p*/
|
||||||
|
F: arch/arm/mach-exynos*/
|
||||||
|
|
||||||
ARM/SAMSUNG MOBILE MACHINE SUPPORT
|
ARM/SAMSUNG MOBILE MACHINE SUPPORT
|
||||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||||
|
@ -2808,7 +2809,7 @@ GPIO SUBSYSTEM
|
||||||
M: Grant Likely <grant.likely@secretlab.ca>
|
M: Grant Likely <grant.likely@secretlab.ca>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||||
F: Documentation/gpio/gpio.txt
|
F: Documentation/gpio.txt
|
||||||
F: drivers/gpio/
|
F: drivers/gpio/
|
||||||
F: include/linux/gpio*
|
F: include/linux/gpio*
|
||||||
|
|
||||||
|
@ -6921,6 +6922,18 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/mjg59/platform-drivers-x86.
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/platform/x86
|
F: drivers/platform/x86
|
||||||
|
|
||||||
|
XEN HYPERVISOR INTERFACE
|
||||||
|
M: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
|
||||||
|
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
||||||
|
L: virtualization@lists.linux-foundation.org
|
||||||
|
S: Supported
|
||||||
|
F: arch/x86/xen/
|
||||||
|
F: drivers/*/xen-*front.c
|
||||||
|
F: drivers/xen/
|
||||||
|
F: arch/x86/include/asm/xen/
|
||||||
|
F: include/xen/
|
||||||
|
|
||||||
XEN NETWORK BACKEND DRIVER
|
XEN NETWORK BACKEND DRIVER
|
||||||
M: Ian Campbell <ian.campbell@citrix.com>
|
M: Ian Campbell <ian.campbell@citrix.com>
|
||||||
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
||||||
|
@ -6942,18 +6955,6 @@ S: Supported
|
||||||
F: arch/x86/xen/*swiotlb*
|
F: arch/x86/xen/*swiotlb*
|
||||||
F: drivers/xen/*swiotlb*
|
F: drivers/xen/*swiotlb*
|
||||||
|
|
||||||
XEN HYPERVISOR INTERFACE
|
|
||||||
M: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
|
|
||||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
|
||||||
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
|
||||||
L: virtualization@lists.linux-foundation.org
|
|
||||||
S: Supported
|
|
||||||
F: arch/x86/xen/
|
|
||||||
F: drivers/*/xen-*front.c
|
|
||||||
F: drivers/xen/
|
|
||||||
F: arch/x86/include/asm/xen/
|
|
||||||
F: include/xen/
|
|
||||||
|
|
||||||
XFS FILESYSTEM
|
XFS FILESYSTEM
|
||||||
P: Silicon Graphics Inc
|
P: Silicon Graphics Inc
|
||||||
M: Alex Elder <aelder@sgi.com>
|
M: Alex Elder <aelder@sgi.com>
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
||||||
VERSION = 2
|
VERSION = 2
|
||||||
PATCHLEVEL = 6
|
PATCHLEVEL = 6
|
||||||
SUBLEVEL = 39
|
SUBLEVEL = 39
|
||||||
EXTRAVERSION = -rc4
|
EXTRAVERSION = -rc5
|
||||||
NAME = Flesh-Eating Bats with Fangs
|
NAME = Flesh-Eating Bats with Fangs
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
@ -314,7 +314,7 @@ static struct clk timer2_clk = {
|
||||||
.name = "timer2",
|
.name = "timer2",
|
||||||
.parent = &pll1_aux_clk,
|
.parent = &pll1_aux_clk,
|
||||||
.lpsc = DAVINCI_LPSC_TIMER2,
|
.lpsc = DAVINCI_LPSC_TIMER2,
|
||||||
.usecount = 1, /* REVISIT: why can't' this be disabled? */
|
.usecount = 1, /* REVISIT: why can't this be disabled? */
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clk timer3_clk = {
|
static struct clk timer3_clk = {
|
||||||
|
|
|
@ -274,7 +274,7 @@ static struct clk timer2_clk = {
|
||||||
.name = "timer2",
|
.name = "timer2",
|
||||||
.parent = &pll1_aux_clk,
|
.parent = &pll1_aux_clk,
|
||||||
.lpsc = DAVINCI_LPSC_TIMER2,
|
.lpsc = DAVINCI_LPSC_TIMER2,
|
||||||
.usecount = 1, /* REVISIT: why can't' this be disabled? */
|
.usecount = 1, /* REVISIT: why can't this be disabled? */
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clk_lookup dm644x_clks[] = {
|
static struct clk_lookup dm644x_clks[] = {
|
||||||
|
|
|
@ -68,7 +68,7 @@ obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
|
||||||
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
|
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
|
||||||
|
|
||||||
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
|
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
|
||||||
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
|
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec)
|
||||||
|
|
||||||
ifeq ($(CONFIG_PM_VERBOSE),y)
|
ifeq ($(CONFIG_PM_VERBOSE),y)
|
||||||
CFLAGS_pm_bus.o += -DDEBUG
|
CFLAGS_pm_bus.o += -DDEBUG
|
||||||
|
|
|
@ -141,14 +141,19 @@ static void __init rx51_init(void)
|
||||||
static void __init rx51_map_io(void)
|
static void __init rx51_map_io(void)
|
||||||
{
|
{
|
||||||
omap2_set_globals_3xxx();
|
omap2_set_globals_3xxx();
|
||||||
rx51_video_mem_init();
|
|
||||||
omap34xx_map_common_io();
|
omap34xx_map_common_io();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void __init rx51_reserve(void)
|
||||||
|
{
|
||||||
|
rx51_video_mem_init();
|
||||||
|
omap_reserve();
|
||||||
|
}
|
||||||
|
|
||||||
MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
|
MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
|
||||||
/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
|
/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
|
||||||
.boot_params = 0x80000100,
|
.boot_params = 0x80000100,
|
||||||
.reserve = omap_reserve,
|
.reserve = rx51_reserve,
|
||||||
.map_io = rx51_map_io,
|
.map_io = rx51_map_io,
|
||||||
.init_early = rx51_init_early,
|
.init_early = rx51_init_early,
|
||||||
.init_irq = omap_init_irq,
|
.init_irq = omap_init_irq,
|
||||||
|
|
|
@ -3116,14 +3116,9 @@ static struct omap_clk omap44xx_clks[] = {
|
||||||
CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
|
CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
|
||||||
CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
|
CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
|
||||||
CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
|
CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
|
||||||
CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X),
|
|
||||||
CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
|
CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
|
||||||
CLK("omapdss_dss", "fck", &dss_fck, CK_443X),
|
CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X),
|
||||||
/*
|
CLK("omapdss_dss", "ick", &dss_fck, CK_443X),
|
||||||
* On OMAP4, DSS ick is a dummy clock; this is needed for compatibility
|
|
||||||
* with OMAP2/3.
|
|
||||||
*/
|
|
||||||
CLK("omapdss_dss", "ick", &dummy_ck, CK_443X),
|
|
||||||
CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
|
CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
|
||||||
CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
|
CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
|
||||||
CLK(NULL, "emif2_fck", &emif2_fck, CK_443X),
|
CLK(NULL, "emif2_fck", &emif2_fck, CK_443X),
|
||||||
|
|
|
@ -247,6 +247,7 @@ struct omap3_cm_regs {
|
||||||
u32 per_cm_clksel;
|
u32 per_cm_clksel;
|
||||||
u32 emu_cm_clksel;
|
u32 emu_cm_clksel;
|
||||||
u32 emu_cm_clkstctrl;
|
u32 emu_cm_clkstctrl;
|
||||||
|
u32 pll_cm_autoidle;
|
||||||
u32 pll_cm_autoidle2;
|
u32 pll_cm_autoidle2;
|
||||||
u32 pll_cm_clksel4;
|
u32 pll_cm_clksel4;
|
||||||
u32 pll_cm_clksel5;
|
u32 pll_cm_clksel5;
|
||||||
|
@ -319,6 +320,15 @@ void omap3_cm_save_context(void)
|
||||||
omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
|
omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
|
||||||
cm_context.emu_cm_clkstctrl =
|
cm_context.emu_cm_clkstctrl =
|
||||||
omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
|
omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
|
||||||
|
/*
|
||||||
|
* As per erratum i671, ROM code does not respect the PER DPLL
|
||||||
|
* programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1.
|
||||||
|
* In this case, even though this register has been saved in
|
||||||
|
* scratchpad contents, we need to restore AUTO_PERIPH_DPLL
|
||||||
|
* by ourselves. So, we need to save it anyway.
|
||||||
|
*/
|
||||||
|
cm_context.pll_cm_autoidle =
|
||||||
|
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
|
||||||
cm_context.pll_cm_autoidle2 =
|
cm_context.pll_cm_autoidle2 =
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
|
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
|
||||||
cm_context.pll_cm_clksel4 =
|
cm_context.pll_cm_clksel4 =
|
||||||
|
@ -441,6 +451,13 @@ void omap3_cm_restore_context(void)
|
||||||
CM_CLKSEL1);
|
CM_CLKSEL1);
|
||||||
omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
|
omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
|
||||||
OMAP2_CM_CLKSTCTRL);
|
OMAP2_CM_CLKSTCTRL);
|
||||||
|
/*
|
||||||
|
* As per erratum i671, ROM code does not respect the PER DPLL
|
||||||
|
* programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1.
|
||||||
|
* In this case, we need to restore AUTO_PERIPH_DPLL by ourselves.
|
||||||
|
*/
|
||||||
|
omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle, PLL_MOD,
|
||||||
|
CM_AUTOIDLE);
|
||||||
omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
|
omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
|
||||||
CM_AUTOIDLE2);
|
CM_AUTOIDLE2);
|
||||||
omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
|
omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
|
||||||
|
|
|
@ -316,8 +316,14 @@ void omap3_save_scratchpad_contents(void)
|
||||||
omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
|
omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
|
||||||
prcm_block_contents.cm_clken_pll =
|
prcm_block_contents.cm_clken_pll =
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
||||||
|
/*
|
||||||
|
* As per erratum i671, ROM code does not respect the PER DPLL
|
||||||
|
* programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1.
|
||||||
|
* Then, in anycase, clear these bits to avoid extra latencies.
|
||||||
|
*/
|
||||||
prcm_block_contents.cm_autoidle_pll =
|
prcm_block_contents.cm_autoidle_pll =
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
|
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) &
|
||||||
|
~OMAP3430_AUTO_PERIPH_DPLL_MASK;
|
||||||
prcm_block_contents.cm_clksel1_pll =
|
prcm_block_contents.cm_clksel1_pll =
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
|
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
|
||||||
prcm_block_contents.cm_clksel2_pll =
|
prcm_block_contents.cm_clksel2_pll =
|
||||||
|
|
|
@ -1639,6 +1639,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2420_gpio1_hwmod = {
|
static struct omap_hwmod omap2420_gpio1_hwmod = {
|
||||||
.name = "gpio1",
|
.name = "gpio1",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap242x_gpio1_irqs,
|
.mpu_irqs = omap242x_gpio1_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1669,6 +1670,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2420_gpio2_hwmod = {
|
static struct omap_hwmod omap2420_gpio2_hwmod = {
|
||||||
.name = "gpio2",
|
.name = "gpio2",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap242x_gpio2_irqs,
|
.mpu_irqs = omap242x_gpio2_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1699,6 +1701,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2420_gpio3_hwmod = {
|
static struct omap_hwmod omap2420_gpio3_hwmod = {
|
||||||
.name = "gpio3",
|
.name = "gpio3",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap242x_gpio3_irqs,
|
.mpu_irqs = omap242x_gpio3_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1729,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2420_gpio4_hwmod = {
|
static struct omap_hwmod omap2420_gpio4_hwmod = {
|
||||||
.name = "gpio4",
|
.name = "gpio4",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap242x_gpio4_irqs,
|
.mpu_irqs = omap242x_gpio4_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1782,7 +1786,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
|
||||||
static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
|
static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
|
||||||
{
|
{
|
||||||
.pa_start = 0x48056000,
|
.pa_start = 0x48056000,
|
||||||
.pa_end = 0x4a0560ff,
|
.pa_end = 0x48056fff,
|
||||||
.flags = ADDR_TYPE_RT
|
.flags = ADDR_TYPE_RT
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -1742,6 +1742,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2430_gpio1_hwmod = {
|
static struct omap_hwmod omap2430_gpio1_hwmod = {
|
||||||
.name = "gpio1",
|
.name = "gpio1",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap243x_gpio1_irqs,
|
.mpu_irqs = omap243x_gpio1_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1772,6 +1773,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2430_gpio2_hwmod = {
|
static struct omap_hwmod omap2430_gpio2_hwmod = {
|
||||||
.name = "gpio2",
|
.name = "gpio2",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap243x_gpio2_irqs,
|
.mpu_irqs = omap243x_gpio2_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1802,6 +1804,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2430_gpio3_hwmod = {
|
static struct omap_hwmod omap2430_gpio3_hwmod = {
|
||||||
.name = "gpio3",
|
.name = "gpio3",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap243x_gpio3_irqs,
|
.mpu_irqs = omap243x_gpio3_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1832,6 +1835,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2430_gpio4_hwmod = {
|
static struct omap_hwmod omap2430_gpio4_hwmod = {
|
||||||
.name = "gpio4",
|
.name = "gpio4",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap243x_gpio4_irqs,
|
.mpu_irqs = omap243x_gpio4_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs),
|
||||||
.main_clk = "gpios_fck",
|
.main_clk = "gpios_fck",
|
||||||
|
@ -1862,6 +1866,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap2430_gpio5_hwmod = {
|
static struct omap_hwmod omap2430_gpio5_hwmod = {
|
||||||
.name = "gpio5",
|
.name = "gpio5",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap243x_gpio5_irqs,
|
.mpu_irqs = omap243x_gpio5_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs),
|
||||||
.main_clk = "gpio5_fck",
|
.main_clk = "gpio5_fck",
|
||||||
|
@ -1915,7 +1920,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
|
||||||
static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
|
static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
|
||||||
{
|
{
|
||||||
.pa_start = 0x48056000,
|
.pa_start = 0x48056000,
|
||||||
.pa_end = 0x4a0560ff,
|
.pa_end = 0x48056fff,
|
||||||
.flags = ADDR_TYPE_RT
|
.flags = ADDR_TYPE_RT
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -2141,6 +2141,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap3xxx_gpio1_hwmod = {
|
static struct omap_hwmod omap3xxx_gpio1_hwmod = {
|
||||||
.name = "gpio1",
|
.name = "gpio1",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap3xxx_gpio1_irqs,
|
.mpu_irqs = omap3xxx_gpio1_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs),
|
||||||
.main_clk = "gpio1_ick",
|
.main_clk = "gpio1_ick",
|
||||||
|
@ -2177,6 +2178,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap3xxx_gpio2_hwmod = {
|
static struct omap_hwmod omap3xxx_gpio2_hwmod = {
|
||||||
.name = "gpio2",
|
.name = "gpio2",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap3xxx_gpio2_irqs,
|
.mpu_irqs = omap3xxx_gpio2_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs),
|
||||||
.main_clk = "gpio2_ick",
|
.main_clk = "gpio2_ick",
|
||||||
|
@ -2213,6 +2215,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap3xxx_gpio3_hwmod = {
|
static struct omap_hwmod omap3xxx_gpio3_hwmod = {
|
||||||
.name = "gpio3",
|
.name = "gpio3",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap3xxx_gpio3_irqs,
|
.mpu_irqs = omap3xxx_gpio3_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs),
|
||||||
.main_clk = "gpio3_ick",
|
.main_clk = "gpio3_ick",
|
||||||
|
@ -2249,6 +2252,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap3xxx_gpio4_hwmod = {
|
static struct omap_hwmod omap3xxx_gpio4_hwmod = {
|
||||||
.name = "gpio4",
|
.name = "gpio4",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap3xxx_gpio4_irqs,
|
.mpu_irqs = omap3xxx_gpio4_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs),
|
||||||
.main_clk = "gpio4_ick",
|
.main_clk = "gpio4_ick",
|
||||||
|
@ -2285,6 +2289,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio5_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap3xxx_gpio5_hwmod = {
|
static struct omap_hwmod omap3xxx_gpio5_hwmod = {
|
||||||
.name = "gpio5",
|
.name = "gpio5",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap3xxx_gpio5_irqs,
|
.mpu_irqs = omap3xxx_gpio5_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs),
|
||||||
.main_clk = "gpio5_ick",
|
.main_clk = "gpio5_ick",
|
||||||
|
@ -2321,6 +2326,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio6_slaves[] = {
|
||||||
|
|
||||||
static struct omap_hwmod omap3xxx_gpio6_hwmod = {
|
static struct omap_hwmod omap3xxx_gpio6_hwmod = {
|
||||||
.name = "gpio6",
|
.name = "gpio6",
|
||||||
|
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||||
.mpu_irqs = omap3xxx_gpio6_irqs,
|
.mpu_irqs = omap3xxx_gpio6_irqs,
|
||||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs),
|
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs),
|
||||||
.main_clk = "gpio6_ick",
|
.main_clk = "gpio6_ick",
|
||||||
|
@ -2386,7 +2392,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
|
||||||
static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
|
static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
|
||||||
{
|
{
|
||||||
.pa_start = 0x48056000,
|
.pa_start = 0x48056000,
|
||||||
.pa_end = 0x4a0560ff,
|
.pa_end = 0x48056fff,
|
||||||
.flags = ADDR_TYPE_RT
|
.flags = ADDR_TYPE_RT
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -885,7 +885,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = {
|
||||||
static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
|
static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
|
||||||
{
|
{
|
||||||
.pa_start = 0x4a056000,
|
.pa_start = 0x4a056000,
|
||||||
.pa_end = 0x4a0560ff,
|
.pa_end = 0x4a056fff,
|
||||||
.flags = ADDR_TYPE_RT
|
.flags = ADDR_TYPE_RT
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -196,11 +196,11 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
|
||||||
/* No timeout error for debug sources */
|
/* No timeout error for debug sources */
|
||||||
}
|
}
|
||||||
|
|
||||||
base = ((l3->rt) + (*(omap3_l3_bases[int_type] + err_source)));
|
|
||||||
|
|
||||||
/* identify the error source */
|
/* identify the error source */
|
||||||
for (err_source = 0; !(status & (1 << err_source)); err_source++)
|
for (err_source = 0; !(status & (1 << err_source)); err_source++)
|
||||||
;
|
;
|
||||||
|
|
||||||
|
base = l3->rt + *(omap3_l3_bases[int_type] + err_source);
|
||||||
error = omap3_l3_readll(base, L3_ERROR_LOG);
|
error = omap3_l3_readll(base, L3_ERROR_LOG);
|
||||||
|
|
||||||
if (error) {
|
if (error) {
|
||||||
|
|
|
@ -89,6 +89,7 @@ static void omap2_init_processor_devices(void)
|
||||||
if (cpu_is_omap44xx()) {
|
if (cpu_is_omap44xx()) {
|
||||||
_init_omap_device("l3_main_1", &l3_dev);
|
_init_omap_device("l3_main_1", &l3_dev);
|
||||||
_init_omap_device("dsp", &dsp_dev);
|
_init_omap_device("dsp", &dsp_dev);
|
||||||
|
_init_omap_device("iva", &iva_dev);
|
||||||
} else {
|
} else {
|
||||||
_init_omap_device("l3_main", &l3_dev);
|
_init_omap_device("l3_main", &l3_dev);
|
||||||
}
|
}
|
||||||
|
|
|
@ -114,7 +114,6 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd)
|
||||||
sys_clk_speed /= 1000;
|
sys_clk_speed /= 1000;
|
||||||
|
|
||||||
/* Generic voltage parameters */
|
/* Generic voltage parameters */
|
||||||
vdd->curr_volt = 1200000;
|
|
||||||
vdd->volt_scale = vp_forceupdate_scale_voltage;
|
vdd->volt_scale = vp_forceupdate_scale_voltage;
|
||||||
vdd->vp_enabled = false;
|
vdd->vp_enabled = false;
|
||||||
|
|
||||||
|
|
|
@ -300,6 +300,8 @@ void __init paging_init(void)
|
||||||
zones_size[ZONE_DMA] = m68k_memory[i].size >> PAGE_SHIFT;
|
zones_size[ZONE_DMA] = m68k_memory[i].size >> PAGE_SHIFT;
|
||||||
free_area_init_node(i, zones_size,
|
free_area_init_node(i, zones_size,
|
||||||
m68k_memory[i].addr >> PAGE_SHIFT, NULL);
|
m68k_memory[i].addr >> PAGE_SHIFT, NULL);
|
||||||
|
if (node_present_pages(i))
|
||||||
|
node_set_state(i, N_NORMAL_MEMORY);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -266,8 +266,10 @@ static void __init setup_bootmem(void)
|
||||||
}
|
}
|
||||||
memset(pfnnid_map, 0xff, sizeof(pfnnid_map));
|
memset(pfnnid_map, 0xff, sizeof(pfnnid_map));
|
||||||
|
|
||||||
for (i = 0; i < npmem_ranges; i++)
|
for (i = 0; i < npmem_ranges; i++) {
|
||||||
|
node_set_state(i, N_NORMAL_MEMORY);
|
||||||
node_set_online(i);
|
node_set_online(i);
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -60,7 +60,7 @@
|
||||||
*
|
*
|
||||||
* Obviously, the GART is not cache coherent and so any change to it
|
* Obviously, the GART is not cache coherent and so any change to it
|
||||||
* must be flushed to memory (or maybe just make the GART space non
|
* must be flushed to memory (or maybe just make the GART space non
|
||||||
* cachable). AGP memory itself does't seem to be cache coherent neither.
|
* cachable). AGP memory itself doesn't seem to be cache coherent neither.
|
||||||
*
|
*
|
||||||
* In order to invalidate the GART (which is probably necessary to inval
|
* In order to invalidate the GART (which is probably necessary to inval
|
||||||
* the bridge internal TLBs), the following sequence has to be written,
|
* the bridge internal TLBs), the following sequence has to be written,
|
||||||
|
|
|
@ -76,7 +76,7 @@ static void prng_seed(int nbytes)
|
||||||
|
|
||||||
/* Add the entropy */
|
/* Add the entropy */
|
||||||
while (nbytes >= 8) {
|
while (nbytes >= 8) {
|
||||||
*((__u64 *)parm_block) ^= *((__u64 *)buf+i);
|
*((__u64 *)parm_block) ^= *((__u64 *)(buf+i));
|
||||||
prng_add_entropy();
|
prng_add_entropy();
|
||||||
i += 8;
|
i += 8;
|
||||||
nbytes -= 8;
|
nbytes -= 8;
|
||||||
|
|
|
@ -543,7 +543,6 @@ static void pfault_interrupt(unsigned int ext_int_code,
|
||||||
struct task_struct *tsk;
|
struct task_struct *tsk;
|
||||||
__u16 subcode;
|
__u16 subcode;
|
||||||
|
|
||||||
kstat_cpu(smp_processor_id()).irqs[EXTINT_PFL]++;
|
|
||||||
/*
|
/*
|
||||||
* Get the external interruption subcode & pfault
|
* Get the external interruption subcode & pfault
|
||||||
* initial/completion signal bit. VM stores this
|
* initial/completion signal bit. VM stores this
|
||||||
|
@ -553,6 +552,7 @@ static void pfault_interrupt(unsigned int ext_int_code,
|
||||||
subcode = ext_int_code >> 16;
|
subcode = ext_int_code >> 16;
|
||||||
if ((subcode & 0xff00) != __SUBCODE_MASK)
|
if ((subcode & 0xff00) != __SUBCODE_MASK)
|
||||||
return;
|
return;
|
||||||
|
kstat_cpu(smp_processor_id()).irqs[EXTINT_PFL]++;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Get the token (= address of the task structure of the affected task).
|
* Get the token (= address of the task structure of the affected task).
|
||||||
|
|
|
@ -47,7 +47,7 @@ config HOSTFS
|
||||||
|
|
||||||
config HPPFS
|
config HPPFS
|
||||||
tristate "HoneyPot ProcFS (EXPERIMENTAL)"
|
tristate "HoneyPot ProcFS (EXPERIMENTAL)"
|
||||||
depends on EXPERIMENTAL
|
depends on EXPERIMENTAL && PROC_FS
|
||||||
help
|
help
|
||||||
hppfs (HoneyPot ProcFS) is a filesystem which allows UML /proc
|
hppfs (HoneyPot ProcFS) is a filesystem which allows UML /proc
|
||||||
entries to be overridden, removed, or fabricated from the host.
|
entries to be overridden, removed, or fabricated from the host.
|
||||||
|
|
|
@ -49,7 +49,10 @@ static inline struct thread_info *current_thread_info(void)
|
||||||
{
|
{
|
||||||
struct thread_info *ti;
|
struct thread_info *ti;
|
||||||
unsigned long mask = THREAD_SIZE - 1;
|
unsigned long mask = THREAD_SIZE - 1;
|
||||||
ti = (struct thread_info *) (((unsigned long) &ti) & ~mask);
|
void *p;
|
||||||
|
|
||||||
|
asm volatile ("" : "=r" (p) : "0" (&ti));
|
||||||
|
ti = (struct thread_info *) (((unsigned long)p) & ~mask);
|
||||||
return ti;
|
return ti;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -4,7 +4,7 @@
|
||||||
|
|
||||||
obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \
|
obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \
|
||||||
ptrace_user.o setjmp.o signal.o stub.o stub_segv.o syscalls.o sysrq.o \
|
ptrace_user.o setjmp.o signal.o stub.o stub_segv.o syscalls.o sysrq.o \
|
||||||
sys_call_table.o tls.o
|
sys_call_table.o tls.o atomic64_cx8_32.o
|
||||||
|
|
||||||
obj-$(CONFIG_BINFMT_ELF) += elfcore.o
|
obj-$(CONFIG_BINFMT_ELF) += elfcore.o
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,225 @@
|
||||||
|
/*
|
||||||
|
* atomic64_t for 586+
|
||||||
|
*
|
||||||
|
* Copied from arch/x86/lib/atomic64_cx8_32.S
|
||||||
|
*
|
||||||
|
* Copyright © 2010 Luca Barbieri
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/linkage.h>
|
||||||
|
#include <asm/alternative-asm.h>
|
||||||
|
#include <asm/dwarf2.h>
|
||||||
|
|
||||||
|
.macro SAVE reg
|
||||||
|
pushl_cfi %\reg
|
||||||
|
CFI_REL_OFFSET \reg, 0
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro RESTORE reg
|
||||||
|
popl_cfi %\reg
|
||||||
|
CFI_RESTORE \reg
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro read64 reg
|
||||||
|
movl %ebx, %eax
|
||||||
|
movl %ecx, %edx
|
||||||
|
/* we need LOCK_PREFIX since otherwise cmpxchg8b always does the write */
|
||||||
|
LOCK_PREFIX
|
||||||
|
cmpxchg8b (\reg)
|
||||||
|
.endm
|
||||||
|
|
||||||
|
ENTRY(atomic64_read_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
|
||||||
|
read64 %ecx
|
||||||
|
ret
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_read_cx8)
|
||||||
|
|
||||||
|
ENTRY(atomic64_set_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
|
||||||
|
1:
|
||||||
|
/* we don't need LOCK_PREFIX since aligned 64-bit writes
|
||||||
|
* are atomic on 586 and newer */
|
||||||
|
cmpxchg8b (%esi)
|
||||||
|
jne 1b
|
||||||
|
|
||||||
|
ret
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_set_cx8)
|
||||||
|
|
||||||
|
ENTRY(atomic64_xchg_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
|
||||||
|
movl %ebx, %eax
|
||||||
|
movl %ecx, %edx
|
||||||
|
1:
|
||||||
|
LOCK_PREFIX
|
||||||
|
cmpxchg8b (%esi)
|
||||||
|
jne 1b
|
||||||
|
|
||||||
|
ret
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_xchg_cx8)
|
||||||
|
|
||||||
|
.macro addsub_return func ins insc
|
||||||
|
ENTRY(atomic64_\func\()_return_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
SAVE ebp
|
||||||
|
SAVE ebx
|
||||||
|
SAVE esi
|
||||||
|
SAVE edi
|
||||||
|
|
||||||
|
movl %eax, %esi
|
||||||
|
movl %edx, %edi
|
||||||
|
movl %ecx, %ebp
|
||||||
|
|
||||||
|
read64 %ebp
|
||||||
|
1:
|
||||||
|
movl %eax, %ebx
|
||||||
|
movl %edx, %ecx
|
||||||
|
\ins\()l %esi, %ebx
|
||||||
|
\insc\()l %edi, %ecx
|
||||||
|
LOCK_PREFIX
|
||||||
|
cmpxchg8b (%ebp)
|
||||||
|
jne 1b
|
||||||
|
|
||||||
|
10:
|
||||||
|
movl %ebx, %eax
|
||||||
|
movl %ecx, %edx
|
||||||
|
RESTORE edi
|
||||||
|
RESTORE esi
|
||||||
|
RESTORE ebx
|
||||||
|
RESTORE ebp
|
||||||
|
ret
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_\func\()_return_cx8)
|
||||||
|
.endm
|
||||||
|
|
||||||
|
addsub_return add add adc
|
||||||
|
addsub_return sub sub sbb
|
||||||
|
|
||||||
|
.macro incdec_return func ins insc
|
||||||
|
ENTRY(atomic64_\func\()_return_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
SAVE ebx
|
||||||
|
|
||||||
|
read64 %esi
|
||||||
|
1:
|
||||||
|
movl %eax, %ebx
|
||||||
|
movl %edx, %ecx
|
||||||
|
\ins\()l $1, %ebx
|
||||||
|
\insc\()l $0, %ecx
|
||||||
|
LOCK_PREFIX
|
||||||
|
cmpxchg8b (%esi)
|
||||||
|
jne 1b
|
||||||
|
|
||||||
|
10:
|
||||||
|
movl %ebx, %eax
|
||||||
|
movl %ecx, %edx
|
||||||
|
RESTORE ebx
|
||||||
|
ret
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_\func\()_return_cx8)
|
||||||
|
.endm
|
||||||
|
|
||||||
|
incdec_return inc add adc
|
||||||
|
incdec_return dec sub sbb
|
||||||
|
|
||||||
|
ENTRY(atomic64_dec_if_positive_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
SAVE ebx
|
||||||
|
|
||||||
|
read64 %esi
|
||||||
|
1:
|
||||||
|
movl %eax, %ebx
|
||||||
|
movl %edx, %ecx
|
||||||
|
subl $1, %ebx
|
||||||
|
sbb $0, %ecx
|
||||||
|
js 2f
|
||||||
|
LOCK_PREFIX
|
||||||
|
cmpxchg8b (%esi)
|
||||||
|
jne 1b
|
||||||
|
|
||||||
|
2:
|
||||||
|
movl %ebx, %eax
|
||||||
|
movl %ecx, %edx
|
||||||
|
RESTORE ebx
|
||||||
|
ret
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_dec_if_positive_cx8)
|
||||||
|
|
||||||
|
ENTRY(atomic64_add_unless_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
SAVE ebp
|
||||||
|
SAVE ebx
|
||||||
|
/* these just push these two parameters on the stack */
|
||||||
|
SAVE edi
|
||||||
|
SAVE esi
|
||||||
|
|
||||||
|
movl %ecx, %ebp
|
||||||
|
movl %eax, %esi
|
||||||
|
movl %edx, %edi
|
||||||
|
|
||||||
|
read64 %ebp
|
||||||
|
1:
|
||||||
|
cmpl %eax, 0(%esp)
|
||||||
|
je 4f
|
||||||
|
2:
|
||||||
|
movl %eax, %ebx
|
||||||
|
movl %edx, %ecx
|
||||||
|
addl %esi, %ebx
|
||||||
|
adcl %edi, %ecx
|
||||||
|
LOCK_PREFIX
|
||||||
|
cmpxchg8b (%ebp)
|
||||||
|
jne 1b
|
||||||
|
|
||||||
|
movl $1, %eax
|
||||||
|
3:
|
||||||
|
addl $8, %esp
|
||||||
|
CFI_ADJUST_CFA_OFFSET -8
|
||||||
|
RESTORE ebx
|
||||||
|
RESTORE ebp
|
||||||
|
ret
|
||||||
|
4:
|
||||||
|
cmpl %edx, 4(%esp)
|
||||||
|
jne 2b
|
||||||
|
xorl %eax, %eax
|
||||||
|
jmp 3b
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_add_unless_cx8)
|
||||||
|
|
||||||
|
ENTRY(atomic64_inc_not_zero_cx8)
|
||||||
|
CFI_STARTPROC
|
||||||
|
SAVE ebx
|
||||||
|
|
||||||
|
read64 %esi
|
||||||
|
1:
|
||||||
|
testl %eax, %eax
|
||||||
|
je 4f
|
||||||
|
2:
|
||||||
|
movl %eax, %ebx
|
||||||
|
movl %edx, %ecx
|
||||||
|
addl $1, %ebx
|
||||||
|
adcl $0, %ecx
|
||||||
|
LOCK_PREFIX
|
||||||
|
cmpxchg8b (%esi)
|
||||||
|
jne 1b
|
||||||
|
|
||||||
|
movl $1, %eax
|
||||||
|
3:
|
||||||
|
RESTORE ebx
|
||||||
|
ret
|
||||||
|
4:
|
||||||
|
testl %edx, %edx
|
||||||
|
jne 2b
|
||||||
|
jmp 3b
|
||||||
|
CFI_ENDPROC
|
||||||
|
ENDPROC(atomic64_inc_not_zero_cx8)
|
|
@ -91,7 +91,7 @@ static int detect_memory_e801(void)
|
||||||
if (oreg.ax > 15*1024) {
|
if (oreg.ax > 15*1024) {
|
||||||
return -1; /* Bogus! */
|
return -1; /* Bogus! */
|
||||||
} else if (oreg.ax == 15*1024) {
|
} else if (oreg.ax == 15*1024) {
|
||||||
boot_params.alt_mem_k = (oreg.dx << 6) + oreg.ax;
|
boot_params.alt_mem_k = (oreg.bx << 6) + oreg.ax;
|
||||||
} else {
|
} else {
|
||||||
/*
|
/*
|
||||||
* This ignores memory above 16MB if we have a memory
|
* This ignores memory above 16MB if we have a memory
|
||||||
|
|
|
@ -150,7 +150,7 @@ void setup_IO_APIC_irq_extra(u32 gsi);
|
||||||
extern void ioapic_and_gsi_init(void);
|
extern void ioapic_and_gsi_init(void);
|
||||||
extern void ioapic_insert_resources(void);
|
extern void ioapic_insert_resources(void);
|
||||||
|
|
||||||
int io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr);
|
int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
|
||||||
|
|
||||||
extern struct IO_APIC_route_entry **alloc_ioapic_entries(void);
|
extern struct IO_APIC_route_entry **alloc_ioapic_entries(void);
|
||||||
extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
|
extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
|
||||||
|
|
|
@ -128,7 +128,7 @@ static int __init parse_noapic(char *str)
|
||||||
}
|
}
|
||||||
early_param("noapic", parse_noapic);
|
early_param("noapic", parse_noapic);
|
||||||
|
|
||||||
static int io_apic_setup_irq_pin_once(unsigned int irq, int node,
|
static int io_apic_setup_irq_pin(unsigned int irq, int node,
|
||||||
struct io_apic_irq_attr *attr);
|
struct io_apic_irq_attr *attr);
|
||||||
|
|
||||||
/* Will be called in mpparse/acpi/sfi codes for saving IRQ info */
|
/* Will be called in mpparse/acpi/sfi codes for saving IRQ info */
|
||||||
|
@ -3570,7 +3570,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_HT_IRQ */
|
#endif /* CONFIG_HT_IRQ */
|
||||||
|
|
||||||
int
|
static int
|
||||||
io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)
|
io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)
|
||||||
{
|
{
|
||||||
struct irq_cfg *cfg = alloc_irq_and_cfg_at(irq, node);
|
struct irq_cfg *cfg = alloc_irq_and_cfg_at(irq, node);
|
||||||
|
@ -3585,7 +3585,7 @@ io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int io_apic_setup_irq_pin_once(unsigned int irq, int node,
|
int io_apic_setup_irq_pin_once(unsigned int irq, int node,
|
||||||
struct io_apic_irq_attr *attr)
|
struct io_apic_irq_attr *attr)
|
||||||
{
|
{
|
||||||
unsigned int id = attr->ioapic, pin = attr->ioapic_pin;
|
unsigned int id = attr->ioapic, pin = attr->ioapic_pin;
|
||||||
|
|
|
@ -613,8 +613,8 @@ static int x86_setup_perfctr(struct perf_event *event)
|
||||||
/*
|
/*
|
||||||
* Branch tracing:
|
* Branch tracing:
|
||||||
*/
|
*/
|
||||||
if ((attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) &&
|
if (attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS &&
|
||||||
(hwc->sample_period == 1)) {
|
!attr->freq && hwc->sample_period == 1) {
|
||||||
/* BTS is not supported by this architecture. */
|
/* BTS is not supported by this architecture. */
|
||||||
if (!x86_pmu.bts_active)
|
if (!x86_pmu.bts_active)
|
||||||
return -EOPNOTSUPP;
|
return -EOPNOTSUPP;
|
||||||
|
@ -1288,6 +1288,16 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
|
||||||
|
|
||||||
cpuc = &__get_cpu_var(cpu_hw_events);
|
cpuc = &__get_cpu_var(cpu_hw_events);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Some chipsets need to unmask the LVTPC in a particular spot
|
||||||
|
* inside the nmi handler. As a result, the unmasking was pushed
|
||||||
|
* into all the nmi handlers.
|
||||||
|
*
|
||||||
|
* This generic handler doesn't seem to have any issues where the
|
||||||
|
* unmasking occurs so it was left at the top.
|
||||||
|
*/
|
||||||
|
apic_write(APIC_LVTPC, APIC_DM_NMI);
|
||||||
|
|
||||||
for (idx = 0; idx < x86_pmu.num_counters; idx++) {
|
for (idx = 0; idx < x86_pmu.num_counters; idx++) {
|
||||||
if (!test_bit(idx, cpuc->active_mask)) {
|
if (!test_bit(idx, cpuc->active_mask)) {
|
||||||
/*
|
/*
|
||||||
|
@ -1374,8 +1384,6 @@ perf_event_nmi_handler(struct notifier_block *self,
|
||||||
return NOTIFY_DONE;
|
return NOTIFY_DONE;
|
||||||
}
|
}
|
||||||
|
|
||||||
apic_write(APIC_LVTPC, APIC_DM_NMI);
|
|
||||||
|
|
||||||
handled = x86_pmu.handle_irq(args->regs);
|
handled = x86_pmu.handle_irq(args->regs);
|
||||||
if (!handled)
|
if (!handled)
|
||||||
return NOTIFY_DONE;
|
return NOTIFY_DONE;
|
||||||
|
|
|
@ -25,7 +25,7 @@ struct intel_percore {
|
||||||
/*
|
/*
|
||||||
* Intel PerfMon, used on Core and later.
|
* Intel PerfMon, used on Core and later.
|
||||||
*/
|
*/
|
||||||
static const u64 intel_perfmon_event_map[] =
|
static u64 intel_perfmon_event_map[PERF_COUNT_HW_MAX] __read_mostly =
|
||||||
{
|
{
|
||||||
[PERF_COUNT_HW_CPU_CYCLES] = 0x003c,
|
[PERF_COUNT_HW_CPU_CYCLES] = 0x003c,
|
||||||
[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
|
[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
|
||||||
|
@ -933,6 +933,16 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
|
||||||
|
|
||||||
cpuc = &__get_cpu_var(cpu_hw_events);
|
cpuc = &__get_cpu_var(cpu_hw_events);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Some chipsets need to unmask the LVTPC in a particular spot
|
||||||
|
* inside the nmi handler. As a result, the unmasking was pushed
|
||||||
|
* into all the nmi handlers.
|
||||||
|
*
|
||||||
|
* This handler doesn't seem to have any issues with the unmasking
|
||||||
|
* so it was left at the top.
|
||||||
|
*/
|
||||||
|
apic_write(APIC_LVTPC, APIC_DM_NMI);
|
||||||
|
|
||||||
intel_pmu_disable_all();
|
intel_pmu_disable_all();
|
||||||
handled = intel_pmu_drain_bts_buffer();
|
handled = intel_pmu_drain_bts_buffer();
|
||||||
status = intel_pmu_get_status();
|
status = intel_pmu_get_status();
|
||||||
|
@ -998,6 +1008,9 @@ intel_bts_constraints(struct perf_event *event)
|
||||||
struct hw_perf_event *hwc = &event->hw;
|
struct hw_perf_event *hwc = &event->hw;
|
||||||
unsigned int hw_event, bts_event;
|
unsigned int hw_event, bts_event;
|
||||||
|
|
||||||
|
if (event->attr.freq)
|
||||||
|
return NULL;
|
||||||
|
|
||||||
hw_event = hwc->config & INTEL_ARCH_EVENT_MASK;
|
hw_event = hwc->config & INTEL_ARCH_EVENT_MASK;
|
||||||
bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
|
bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
|
||||||
|
|
||||||
|
@ -1409,6 +1422,18 @@ static __init int intel_pmu_init(void)
|
||||||
x86_pmu.percore_constraints = intel_nehalem_percore_constraints;
|
x86_pmu.percore_constraints = intel_nehalem_percore_constraints;
|
||||||
x86_pmu.enable_all = intel_pmu_nhm_enable_all;
|
x86_pmu.enable_all = intel_pmu_nhm_enable_all;
|
||||||
x86_pmu.extra_regs = intel_nehalem_extra_regs;
|
x86_pmu.extra_regs = intel_nehalem_extra_regs;
|
||||||
|
|
||||||
|
if (ebx & 0x40) {
|
||||||
|
/*
|
||||||
|
* Erratum AAJ80 detected, we work it around by using
|
||||||
|
* the BR_MISP_EXEC.ANY event. This will over-count
|
||||||
|
* branch-misses, but it's still much better than the
|
||||||
|
* architectural event which is often completely bogus:
|
||||||
|
*/
|
||||||
|
intel_perfmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0x7f89;
|
||||||
|
|
||||||
|
pr_cont("erratum AAJ80 worked around, ");
|
||||||
|
}
|
||||||
pr_cont("Nehalem events, ");
|
pr_cont("Nehalem events, ");
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|
|
@ -950,11 +950,20 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
|
||||||
x86_pmu_stop(event, 0);
|
x86_pmu_stop(event, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (handled) {
|
if (handled)
|
||||||
/* p4 quirk: unmask it again */
|
|
||||||
apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
|
|
||||||
inc_irq_stat(apic_perf_irqs);
|
inc_irq_stat(apic_perf_irqs);
|
||||||
}
|
|
||||||
|
/*
|
||||||
|
* When dealing with the unmasking of the LVTPC on P4 perf hw, it has
|
||||||
|
* been observed that the OVF bit flag has to be cleared first _before_
|
||||||
|
* the LVTPC can be unmasked.
|
||||||
|
*
|
||||||
|
* The reason is the NMI line will continue to be asserted while the OVF
|
||||||
|
* bit is set. This causes a second NMI to generate if the LVTPC is
|
||||||
|
* unmasked before the OVF bit is cleared, leading to unknown NMI
|
||||||
|
* messages.
|
||||||
|
*/
|
||||||
|
apic_write(APIC_LVTPC, APIC_DM_NMI);
|
||||||
|
|
||||||
return handled;
|
return handled;
|
||||||
}
|
}
|
||||||
|
|
|
@ -391,7 +391,7 @@ static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
|
||||||
|
|
||||||
set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
|
set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
|
||||||
|
|
||||||
return io_apic_setup_irq_pin(*out_hwirq, cpu_to_node(0), &attr);
|
return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init ioapic_add_ofnode(struct device_node *np)
|
static void __init ioapic_add_ofnode(struct device_node *np)
|
||||||
|
|
|
@ -347,7 +347,7 @@
|
||||||
"pciclass0c03";
|
"pciclass0c03";
|
||||||
|
|
||||||
reg = <0x16800 0x0 0x0 0x0 0x0>;
|
reg = <0x16800 0x0 0x0 0x0 0x0>;
|
||||||
interrupts = <22 3>;
|
interrupts = <22 1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usb@d,1 {
|
usb@d,1 {
|
||||||
|
@ -357,7 +357,7 @@
|
||||||
"pciclass0c03";
|
"pciclass0c03";
|
||||||
|
|
||||||
reg = <0x16900 0x0 0x0 0x0 0x0>;
|
reg = <0x16900 0x0 0x0 0x0 0x0>;
|
||||||
interrupts = <22 3>;
|
interrupts = <22 1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
sata@e,0 {
|
sata@e,0 {
|
||||||
|
@ -367,7 +367,7 @@
|
||||||
"pciclass0106";
|
"pciclass0106";
|
||||||
|
|
||||||
reg = <0x17000 0x0 0x0 0x0 0x0>;
|
reg = <0x17000 0x0 0x0 0x0 0x0>;
|
||||||
interrupts = <23 3>;
|
interrupts = <23 1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
flash@f,0 {
|
flash@f,0 {
|
||||||
|
|
|
@ -943,6 +943,10 @@ static int acpi_bus_get_flags(struct acpi_device *device)
|
||||||
if (ACPI_SUCCESS(status))
|
if (ACPI_SUCCESS(status))
|
||||||
device->flags.lockable = 1;
|
device->flags.lockable = 1;
|
||||||
|
|
||||||
|
/* Power resources cannot be power manageable. */
|
||||||
|
if (device->device_type == ACPI_BUS_TYPE_POWER)
|
||||||
|
return 0;
|
||||||
|
|
||||||
/* Presence of _PS0|_PR0 indicates 'power manageable' */
|
/* Presence of _PS0|_PR0 indicates 'power manageable' */
|
||||||
status = acpi_get_handle(device->handle, "_PS0", &temp);
|
status = acpi_get_handle(device->handle, "_PS0", &temp);
|
||||||
if (ACPI_FAILURE(status))
|
if (ACPI_FAILURE(status))
|
||||||
|
|
|
@ -63,6 +63,7 @@ void device_pm_init(struct device *dev)
|
||||||
dev->power.wakeup = NULL;
|
dev->power.wakeup = NULL;
|
||||||
spin_lock_init(&dev->power.lock);
|
spin_lock_init(&dev->power.lock);
|
||||||
pm_runtime_init(dev);
|
pm_runtime_init(dev);
|
||||||
|
INIT_LIST_HEAD(&dev->power.entry);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
|
@ -258,7 +258,7 @@ void device_set_wakeup_capable(struct device *dev, bool capable)
|
||||||
if (!!dev->power.can_wakeup == !!capable)
|
if (!!dev->power.can_wakeup == !!capable)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (device_is_registered(dev)) {
|
if (device_is_registered(dev) && !list_empty(&dev->power.entry)) {
|
||||||
if (capable) {
|
if (capable) {
|
||||||
if (wakeup_sysfs_add(dev))
|
if (wakeup_sysfs_add(dev))
|
||||||
return;
|
return;
|
||||||
|
|
|
@ -24,6 +24,7 @@ config DRM_KMS_HELPER
|
||||||
depends on DRM
|
depends on DRM
|
||||||
select FB
|
select FB
|
||||||
select FRAMEBUFFER_CONSOLE if !EXPERT
|
select FRAMEBUFFER_CONSOLE if !EXPERT
|
||||||
|
select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
|
||||||
help
|
help
|
||||||
FB and CRTC helpers for KMS drivers.
|
FB and CRTC helpers for KMS drivers.
|
||||||
|
|
||||||
|
|
|
@ -342,9 +342,22 @@ int drm_fb_helper_debug_leave(struct fb_info *info)
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(drm_fb_helper_debug_leave);
|
EXPORT_SYMBOL(drm_fb_helper_debug_leave);
|
||||||
|
|
||||||
|
bool drm_fb_helper_restore_fbdev_mode(struct drm_fb_helper *fb_helper)
|
||||||
|
{
|
||||||
|
bool error = false;
|
||||||
|
int i, ret;
|
||||||
|
for (i = 0; i < fb_helper->crtc_count; i++) {
|
||||||
|
struct drm_mode_set *mode_set = &fb_helper->crtc_info[i].mode_set;
|
||||||
|
ret = drm_crtc_helper_set_config(mode_set);
|
||||||
|
if (ret)
|
||||||
|
error = true;
|
||||||
|
}
|
||||||
|
return error;
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL(drm_fb_helper_restore_fbdev_mode);
|
||||||
|
|
||||||
bool drm_fb_helper_force_kernel_mode(void)
|
bool drm_fb_helper_force_kernel_mode(void)
|
||||||
{
|
{
|
||||||
int i = 0;
|
|
||||||
bool ret, error = false;
|
bool ret, error = false;
|
||||||
struct drm_fb_helper *helper;
|
struct drm_fb_helper *helper;
|
||||||
|
|
||||||
|
@ -352,13 +365,13 @@ bool drm_fb_helper_force_kernel_mode(void)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
list_for_each_entry(helper, &kernel_fb_helper_list, kernel_fb_list) {
|
list_for_each_entry(helper, &kernel_fb_helper_list, kernel_fb_list) {
|
||||||
for (i = 0; i < helper->crtc_count; i++) {
|
if (helper->dev->switch_power_state == DRM_SWITCH_POWER_OFF)
|
||||||
struct drm_mode_set *mode_set = &helper->crtc_info[i].mode_set;
|
continue;
|
||||||
ret = drm_crtc_helper_set_config(mode_set);
|
|
||||||
|
ret = drm_fb_helper_restore_fbdev_mode(helper);
|
||||||
if (ret)
|
if (ret)
|
||||||
error = true;
|
error = true;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
return error;
|
return error;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -2207,7 +2207,7 @@ void i915_driver_lastclose(struct drm_device * dev)
|
||||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||||
|
|
||||||
if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) {
|
if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) {
|
||||||
drm_fb_helper_restore();
|
intel_fb_restore_mode(dev);
|
||||||
vga_switcheroo_process_delayed_switch();
|
vga_switcheroo_process_delayed_switch();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
|
@ -338,4 +338,5 @@ extern int intel_overlay_attrs(struct drm_device *dev, void *data,
|
||||||
struct drm_file *file_priv);
|
struct drm_file *file_priv);
|
||||||
|
|
||||||
extern void intel_fb_output_poll_changed(struct drm_device *dev);
|
extern void intel_fb_output_poll_changed(struct drm_device *dev);
|
||||||
|
extern void intel_fb_restore_mode(struct drm_device *dev);
|
||||||
#endif /* __INTEL_DRV_H__ */
|
#endif /* __INTEL_DRV_H__ */
|
||||||
|
|
|
@ -264,3 +264,13 @@ void intel_fb_output_poll_changed(struct drm_device *dev)
|
||||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||||
drm_fb_helper_hotplug_event(&dev_priv->fbdev->helper);
|
drm_fb_helper_hotplug_event(&dev_priv->fbdev->helper);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void intel_fb_restore_mode(struct drm_device *dev)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||||
|
|
||||||
|
ret = drm_fb_helper_restore_fbdev_mode(&dev_priv->fbdev->helper);
|
||||||
|
if (ret)
|
||||||
|
DRM_DEBUG("failed to restore crtc mode\n");
|
||||||
|
}
|
||||||
|
|
|
@ -221,6 +221,19 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
case RADEON_INFO_NUM_TILE_PIPES:
|
||||||
|
if (rdev->family >= CHIP_CAYMAN)
|
||||||
|
value = rdev->config.cayman.max_tile_pipes;
|
||||||
|
else if (rdev->family >= CHIP_CEDAR)
|
||||||
|
value = rdev->config.evergreen.max_tile_pipes;
|
||||||
|
else if (rdev->family >= CHIP_RV770)
|
||||||
|
value = rdev->config.rv770.max_tile_pipes;
|
||||||
|
else if (rdev->family >= CHIP_R600)
|
||||||
|
value = rdev->config.r600.max_tile_pipes;
|
||||||
|
else {
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
DRM_DEBUG_KMS("Invalid request %d\n", info->request);
|
DRM_DEBUG_KMS("Invalid request %d\n", info->request);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
@ -708,6 +708,7 @@ r600 0x9400
|
||||||
0x00028D0C DB_RENDER_CONTROL
|
0x00028D0C DB_RENDER_CONTROL
|
||||||
0x00028D10 DB_RENDER_OVERRIDE
|
0x00028D10 DB_RENDER_OVERRIDE
|
||||||
0x0002880C DB_SHADER_CONTROL
|
0x0002880C DB_SHADER_CONTROL
|
||||||
|
0x00028D28 DB_SRESULTS_COMPARE_STATE0
|
||||||
0x00028D2C DB_SRESULTS_COMPARE_STATE1
|
0x00028D2C DB_SRESULTS_COMPARE_STATE1
|
||||||
0x00028430 DB_STENCILREFMASK
|
0x00028430 DB_STENCILREFMASK
|
||||||
0x00028434 DB_STENCILREFMASK_BF
|
0x00028434 DB_STENCILREFMASK_BF
|
||||||
|
|
|
@ -110,8 +110,7 @@ config SENSORS_ADM1021
|
||||||
help
|
help
|
||||||
If you say yes here you get support for Analog Devices ADM1021
|
If you say yes here you get support for Analog Devices ADM1021
|
||||||
and ADM1023 sensor chips and clones: Maxim MAX1617 and MAX1617A,
|
and ADM1023 sensor chips and clones: Maxim MAX1617 and MAX1617A,
|
||||||
Genesys Logic GL523SM, National Semiconductor LM84, TI THMC10,
|
Genesys Logic GL523SM, National Semiconductor LM84 and TI THMC10.
|
||||||
and the XEON processor built-in sensor.
|
|
||||||
|
|
||||||
This driver can also be built as a module. If so, the module
|
This driver can also be built as a module. If so, the module
|
||||||
will be called adm1021.
|
will be called adm1021.
|
||||||
|
@ -618,10 +617,10 @@ config SENSORS_LM90
|
||||||
depends on I2C
|
depends on I2C
|
||||||
help
|
help
|
||||||
If you say yes here you get support for National Semiconductor LM90,
|
If you say yes here you get support for National Semiconductor LM90,
|
||||||
LM86, LM89 and LM99, Analog Devices ADM1032 and ADT7461, Maxim
|
LM86, LM89 and LM99, Analog Devices ADM1032, ADT7461, and ADT7461A,
|
||||||
MAX6646, MAX6647, MAX6648, MAX6649, MAX6657, MAX6658, MAX6659,
|
Maxim MAX6646, MAX6647, MAX6648, MAX6649, MAX6657, MAX6658, MAX6659,
|
||||||
MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, and Winbond/Nuvoton
|
MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, ON Semiconductor NCT1008,
|
||||||
W83L771W/G/AWG/ASG sensor chips.
|
and Winbond/Nuvoton W83L771W/G/AWG/ASG sensor chips.
|
||||||
|
|
||||||
This driver can also be built as a module. If so, the module
|
This driver can also be built as a module. If so, the module
|
||||||
will be called lm90.
|
will be called lm90.
|
||||||
|
|
|
@ -1094,6 +1094,7 @@ static struct attribute *lm85_attributes_minctl[] = {
|
||||||
&sensor_dev_attr_pwm1_auto_pwm_minctl.dev_attr.attr,
|
&sensor_dev_attr_pwm1_auto_pwm_minctl.dev_attr.attr,
|
||||||
&sensor_dev_attr_pwm2_auto_pwm_minctl.dev_attr.attr,
|
&sensor_dev_attr_pwm2_auto_pwm_minctl.dev_attr.attr,
|
||||||
&sensor_dev_attr_pwm3_auto_pwm_minctl.dev_attr.attr,
|
&sensor_dev_attr_pwm3_auto_pwm_minctl.dev_attr.attr,
|
||||||
|
NULL
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct attribute_group lm85_group_minctl = {
|
static const struct attribute_group lm85_group_minctl = {
|
||||||
|
@ -1104,6 +1105,7 @@ static struct attribute *lm85_attributes_temp_off[] = {
|
||||||
&sensor_dev_attr_temp1_auto_temp_off.dev_attr.attr,
|
&sensor_dev_attr_temp1_auto_temp_off.dev_attr.attr,
|
||||||
&sensor_dev_attr_temp2_auto_temp_off.dev_attr.attr,
|
&sensor_dev_attr_temp2_auto_temp_off.dev_attr.attr,
|
||||||
&sensor_dev_attr_temp3_auto_temp_off.dev_attr.attr,
|
&sensor_dev_attr_temp3_auto_temp_off.dev_attr.attr,
|
||||||
|
NULL
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct attribute_group lm85_group_temp_off = {
|
static const struct attribute_group lm85_group_temp_off = {
|
||||||
|
@ -1329,11 +1331,11 @@ static int lm85_probe(struct i2c_client *client,
|
||||||
if (data->type != emc6d103s) {
|
if (data->type != emc6d103s) {
|
||||||
err = sysfs_create_group(&client->dev.kobj, &lm85_group_minctl);
|
err = sysfs_create_group(&client->dev.kobj, &lm85_group_minctl);
|
||||||
if (err)
|
if (err)
|
||||||
goto err_kfree;
|
goto err_remove_files;
|
||||||
err = sysfs_create_group(&client->dev.kobj,
|
err = sysfs_create_group(&client->dev.kobj,
|
||||||
&lm85_group_temp_off);
|
&lm85_group_temp_off);
|
||||||
if (err)
|
if (err)
|
||||||
goto err_kfree;
|
goto err_remove_files;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* The ADT7463/68 have an optional VRM 10 mode where pin 21 is used
|
/* The ADT7463/68 have an optional VRM 10 mode where pin 21 is used
|
||||||
|
|
|
@ -49,10 +49,10 @@
|
||||||
* chips, but support three temperature sensors instead of two. MAX6695
|
* chips, but support three temperature sensors instead of two. MAX6695
|
||||||
* and MAX6696 only differ in the pinout so they can be treated identically.
|
* and MAX6696 only differ in the pinout so they can be treated identically.
|
||||||
*
|
*
|
||||||
* This driver also supports the ADT7461 chip from Analog Devices.
|
* This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
|
||||||
* It's supported in both compatibility and extended mode. It is mostly
|
* NCT1008 from ON Semiconductor. The chips are supported in both compatibility
|
||||||
* compatible with LM90 except for a data format difference for the
|
* and extended mode. They are mostly compatible with LM90 except for a data
|
||||||
* temperature value registers.
|
* format difference for the temperature value registers.
|
||||||
*
|
*
|
||||||
* Since the LM90 was the first chipset supported by this driver, most
|
* Since the LM90 was the first chipset supported by this driver, most
|
||||||
* comments will refer to this chipset, but are actually general and
|
* comments will refer to this chipset, but are actually general and
|
||||||
|
@ -88,9 +88,10 @@
|
||||||
* Addresses to scan
|
* Addresses to scan
|
||||||
* Address is fully defined internally and cannot be changed except for
|
* Address is fully defined internally and cannot be changed except for
|
||||||
* MAX6659, MAX6680 and MAX6681.
|
* MAX6659, MAX6680 and MAX6681.
|
||||||
* LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, MAX6649, MAX6657,
|
* LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
|
||||||
* MAX6658 and W83L771 have address 0x4c.
|
* MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
|
||||||
* ADM1032-2, ADT7461-2, LM89-1, LM99-1 and MAX6646 have address 0x4d.
|
* ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
|
||||||
|
* have address 0x4d.
|
||||||
* MAX6647 has address 0x4e.
|
* MAX6647 has address 0x4e.
|
||||||
* MAX6659 can have address 0x4c, 0x4d or 0x4e.
|
* MAX6659 can have address 0x4c, 0x4d or 0x4e.
|
||||||
* MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
|
* MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
|
||||||
|
@ -174,6 +175,7 @@ enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
|
||||||
static const struct i2c_device_id lm90_id[] = {
|
static const struct i2c_device_id lm90_id[] = {
|
||||||
{ "adm1032", adm1032 },
|
{ "adm1032", adm1032 },
|
||||||
{ "adt7461", adt7461 },
|
{ "adt7461", adt7461 },
|
||||||
|
{ "adt7461a", adt7461 },
|
||||||
{ "lm90", lm90 },
|
{ "lm90", lm90 },
|
||||||
{ "lm86", lm86 },
|
{ "lm86", lm86 },
|
||||||
{ "lm89", lm86 },
|
{ "lm89", lm86 },
|
||||||
|
@ -188,6 +190,7 @@ static const struct i2c_device_id lm90_id[] = {
|
||||||
{ "max6681", max6680 },
|
{ "max6681", max6680 },
|
||||||
{ "max6695", max6696 },
|
{ "max6695", max6696 },
|
||||||
{ "max6696", max6696 },
|
{ "max6696", max6696 },
|
||||||
|
{ "nct1008", adt7461 },
|
||||||
{ "w83l771", w83l771 },
|
{ "w83l771", w83l771 },
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
|
@ -1153,6 +1156,11 @@ static int lm90_detect(struct i2c_client *new_client,
|
||||||
&& (reg_config1 & 0x1B) == 0x00
|
&& (reg_config1 & 0x1B) == 0x00
|
||||||
&& reg_convrate <= 0x0A) {
|
&& reg_convrate <= 0x0A) {
|
||||||
name = "adt7461";
|
name = "adt7461";
|
||||||
|
} else
|
||||||
|
if (chip_id == 0x57 /* ADT7461A, NCT1008 */
|
||||||
|
&& (reg_config1 & 0x1B) == 0x00
|
||||||
|
&& reg_convrate <= 0x0A) {
|
||||||
|
name = "adt7461a";
|
||||||
}
|
}
|
||||||
} else
|
} else
|
||||||
if (man_id == 0x4D) { /* Maxim */
|
if (man_id == 0x4D) { /* Maxim */
|
||||||
|
|
|
@ -98,7 +98,6 @@ static const struct attribute_group twl4030_madc_group = {
|
||||||
static int __devinit twl4030_madc_hwmon_probe(struct platform_device *pdev)
|
static int __devinit twl4030_madc_hwmon_probe(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
int status;
|
|
||||||
struct device *hwmon;
|
struct device *hwmon;
|
||||||
|
|
||||||
ret = sysfs_create_group(&pdev->dev.kobj, &twl4030_madc_group);
|
ret = sysfs_create_group(&pdev->dev.kobj, &twl4030_madc_group);
|
||||||
|
@ -107,7 +106,7 @@ static int __devinit twl4030_madc_hwmon_probe(struct platform_device *pdev)
|
||||||
hwmon = hwmon_device_register(&pdev->dev);
|
hwmon = hwmon_device_register(&pdev->dev);
|
||||||
if (IS_ERR(hwmon)) {
|
if (IS_ERR(hwmon)) {
|
||||||
dev_err(&pdev->dev, "hwmon_device_register failed.\n");
|
dev_err(&pdev->dev, "hwmon_device_register failed.\n");
|
||||||
status = PTR_ERR(hwmon);
|
ret = PTR_ERR(hwmon);
|
||||||
goto err_reg;
|
goto err_reg;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -134,10 +134,15 @@
|
||||||
SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \
|
SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \
|
||||||
SMBHSTSTS_INTR)
|
SMBHSTSTS_INTR)
|
||||||
|
|
||||||
|
/* Older devices have their ID defined in <linux/pci_ids.h> */
|
||||||
|
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
|
||||||
|
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
|
||||||
/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
|
/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
|
||||||
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
|
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
|
||||||
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
|
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
|
||||||
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
|
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
|
||||||
|
#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
|
||||||
|
#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
|
||||||
|
|
||||||
struct i801_priv {
|
struct i801_priv {
|
||||||
struct i2c_adapter adapter;
|
struct i2c_adapter adapter;
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/* ------------------------------------------------------------------------ *
|
/* ------------------------------------------------------------------------ *
|
||||||
* i2c-parport.c I2C bus over parallel port *
|
* i2c-parport.c I2C bus over parallel port *
|
||||||
* ------------------------------------------------------------------------ *
|
* ------------------------------------------------------------------------ *
|
||||||
Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
|
Copyright (C) 2003-2011 Jean Delvare <khali@linux-fr.org>
|
||||||
|
|
||||||
Based on older i2c-philips-par.c driver
|
Based on older i2c-philips-par.c driver
|
||||||
Copyright (C) 1995-2000 Simon G. Vogl
|
Copyright (C) 1995-2000 Simon G. Vogl
|
||||||
|
@ -33,6 +33,8 @@
|
||||||
#include <linux/i2c-algo-bit.h>
|
#include <linux/i2c-algo-bit.h>
|
||||||
#include <linux/i2c-smbus.h>
|
#include <linux/i2c-smbus.h>
|
||||||
#include <linux/slab.h>
|
#include <linux/slab.h>
|
||||||
|
#include <linux/list.h>
|
||||||
|
#include <linux/mutex.h>
|
||||||
#include "i2c-parport.h"
|
#include "i2c-parport.h"
|
||||||
|
|
||||||
/* ----- Device list ------------------------------------------------------ */
|
/* ----- Device list ------------------------------------------------------ */
|
||||||
|
@ -43,10 +45,11 @@ struct i2c_par {
|
||||||
struct i2c_algo_bit_data algo_data;
|
struct i2c_algo_bit_data algo_data;
|
||||||
struct i2c_smbus_alert_setup alert_data;
|
struct i2c_smbus_alert_setup alert_data;
|
||||||
struct i2c_client *ara;
|
struct i2c_client *ara;
|
||||||
struct i2c_par *next;
|
struct list_head node;
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct i2c_par *adapter_list;
|
static LIST_HEAD(adapter_list);
|
||||||
|
static DEFINE_MUTEX(adapter_list_lock);
|
||||||
|
|
||||||
/* ----- Low-level parallel port access ----------------------------------- */
|
/* ----- Low-level parallel port access ----------------------------------- */
|
||||||
|
|
||||||
|
@ -228,8 +231,9 @@ static void i2c_parport_attach (struct parport *port)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Add the new adapter to the list */
|
/* Add the new adapter to the list */
|
||||||
adapter->next = adapter_list;
|
mutex_lock(&adapter_list_lock);
|
||||||
adapter_list = adapter;
|
list_add_tail(&adapter->node, &adapter_list);
|
||||||
|
mutex_unlock(&adapter_list_lock);
|
||||||
return;
|
return;
|
||||||
|
|
||||||
ERROR1:
|
ERROR1:
|
||||||
|
@ -241,11 +245,11 @@ ERROR0:
|
||||||
|
|
||||||
static void i2c_parport_detach (struct parport *port)
|
static void i2c_parport_detach (struct parport *port)
|
||||||
{
|
{
|
||||||
struct i2c_par *adapter, *prev;
|
struct i2c_par *adapter, *_n;
|
||||||
|
|
||||||
/* Walk the list */
|
/* Walk the list */
|
||||||
for (prev = NULL, adapter = adapter_list; adapter;
|
mutex_lock(&adapter_list_lock);
|
||||||
prev = adapter, adapter = adapter->next) {
|
list_for_each_entry_safe(adapter, _n, &adapter_list, node) {
|
||||||
if (adapter->pdev->port == port) {
|
if (adapter->pdev->port == port) {
|
||||||
if (adapter->ara) {
|
if (adapter->ara) {
|
||||||
parport_disable_irq(port);
|
parport_disable_irq(port);
|
||||||
|
@ -259,14 +263,11 @@ static void i2c_parport_detach (struct parport *port)
|
||||||
|
|
||||||
parport_release(adapter->pdev);
|
parport_release(adapter->pdev);
|
||||||
parport_unregister_device(adapter->pdev);
|
parport_unregister_device(adapter->pdev);
|
||||||
if (prev)
|
list_del(&adapter->node);
|
||||||
prev->next = adapter->next;
|
|
||||||
else
|
|
||||||
adapter_list = adapter->next;
|
|
||||||
kfree(adapter);
|
kfree(adapter);
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
mutex_unlock(&adapter_list_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct parport_driver i2c_parport_driver = {
|
static struct parport_driver i2c_parport_driver = {
|
||||||
|
|
|
@ -1799,7 +1799,7 @@ static int qib_6120_setup_reset(struct qib_devdata *dd)
|
||||||
/*
|
/*
|
||||||
* Keep chip from being accessed until we are ready. Use
|
* Keep chip from being accessed until we are ready. Use
|
||||||
* writeq() directly, to allow the write even though QIB_PRESENT
|
* writeq() directly, to allow the write even though QIB_PRESENT
|
||||||
* isn't' set.
|
* isn't set.
|
||||||
*/
|
*/
|
||||||
dd->flags &= ~(QIB_INITTED | QIB_PRESENT);
|
dd->flags &= ~(QIB_INITTED | QIB_PRESENT);
|
||||||
dd->int_counter = 0; /* so we check interrupts work again */
|
dd->int_counter = 0; /* so we check interrupts work again */
|
||||||
|
|
|
@ -2111,7 +2111,7 @@ static int qib_setup_7220_reset(struct qib_devdata *dd)
|
||||||
/*
|
/*
|
||||||
* Keep chip from being accessed until we are ready. Use
|
* Keep chip from being accessed until we are ready. Use
|
||||||
* writeq() directly, to allow the write even though QIB_PRESENT
|
* writeq() directly, to allow the write even though QIB_PRESENT
|
||||||
* isn't' set.
|
* isn't set.
|
||||||
*/
|
*/
|
||||||
dd->flags &= ~(QIB_INITTED | QIB_PRESENT);
|
dd->flags &= ~(QIB_INITTED | QIB_PRESENT);
|
||||||
dd->int_counter = 0; /* so we check interrupts work again */
|
dd->int_counter = 0; /* so we check interrupts work again */
|
||||||
|
|
|
@ -3299,7 +3299,7 @@ static int qib_do_7322_reset(struct qib_devdata *dd)
|
||||||
/*
|
/*
|
||||||
* Keep chip from being accessed until we are ready. Use
|
* Keep chip from being accessed until we are ready. Use
|
||||||
* writeq() directly, to allow the write even though QIB_PRESENT
|
* writeq() directly, to allow the write even though QIB_PRESENT
|
||||||
* isn't' set.
|
* isn't set.
|
||||||
*/
|
*/
|
||||||
dd->flags &= ~(QIB_INITTED | QIB_PRESENT | QIB_BADINTR);
|
dd->flags &= ~(QIB_INITTED | QIB_PRESENT | QIB_BADINTR);
|
||||||
dd->flags |= QIB_DOING_RESET;
|
dd->flags |= QIB_DOING_RESET;
|
||||||
|
|
|
@ -533,16 +533,7 @@ int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq)
|
||||||
if (tda_fail(ret))
|
if (tda_fail(ret))
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
regs[R_MPD] = (0x77 & pd);
|
regs[R_MPD] = (0x7f & pd);
|
||||||
|
|
||||||
switch (priv->mode) {
|
|
||||||
case TDA18271_ANALOG:
|
|
||||||
regs[R_MPD] &= ~0x08;
|
|
||||||
break;
|
|
||||||
case TDA18271_DIGITAL:
|
|
||||||
regs[R_MPD] |= 0x08;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
div = ((d * (freq / 1000)) << 7) / 125;
|
div = ((d * (freq / 1000)) << 7) / 125;
|
||||||
|
|
||||||
|
|
|
@ -579,8 +579,8 @@ static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
|
||||||
#define RF3 2
|
#define RF3 2
|
||||||
u32 rf_default[3];
|
u32 rf_default[3];
|
||||||
u32 rf_freq[3];
|
u32 rf_freq[3];
|
||||||
u8 prog_cal[3];
|
s32 prog_cal[3];
|
||||||
u8 prog_tab[3];
|
s32 prog_tab[3];
|
||||||
|
|
||||||
i = tda18271_lookup_rf_band(fe, &freq, NULL);
|
i = tda18271_lookup_rf_band(fe, &freq, NULL);
|
||||||
|
|
||||||
|
@ -602,32 +602,33 @@ static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
|
||||||
return bcal;
|
return bcal;
|
||||||
|
|
||||||
tda18271_calc_rf_cal(fe, &rf_freq[rf]);
|
tda18271_calc_rf_cal(fe, &rf_freq[rf]);
|
||||||
prog_tab[rf] = regs[R_EB14];
|
prog_tab[rf] = (s32)regs[R_EB14];
|
||||||
|
|
||||||
if (1 == bcal)
|
if (1 == bcal)
|
||||||
prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
|
prog_cal[rf] =
|
||||||
|
(s32)tda18271_calibrate_rf(fe, rf_freq[rf]);
|
||||||
else
|
else
|
||||||
prog_cal[rf] = prog_tab[rf];
|
prog_cal[rf] = prog_tab[rf];
|
||||||
|
|
||||||
switch (rf) {
|
switch (rf) {
|
||||||
case RF1:
|
case RF1:
|
||||||
map[i].rf_a1 = 0;
|
map[i].rf_a1 = 0;
|
||||||
map[i].rf_b1 = (s32)(prog_cal[RF1] - prog_tab[RF1]);
|
map[i].rf_b1 = (prog_cal[RF1] - prog_tab[RF1]);
|
||||||
map[i].rf1 = rf_freq[RF1] / 1000;
|
map[i].rf1 = rf_freq[RF1] / 1000;
|
||||||
break;
|
break;
|
||||||
case RF2:
|
case RF2:
|
||||||
dividend = (s32)(prog_cal[RF2] - prog_tab[RF2]) -
|
dividend = (prog_cal[RF2] - prog_tab[RF2] -
|
||||||
(s32)(prog_cal[RF1] + prog_tab[RF1]);
|
prog_cal[RF1] + prog_tab[RF1]);
|
||||||
divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
|
divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
|
||||||
map[i].rf_a1 = (dividend / divisor);
|
map[i].rf_a1 = (dividend / divisor);
|
||||||
map[i].rf2 = rf_freq[RF2] / 1000;
|
map[i].rf2 = rf_freq[RF2] / 1000;
|
||||||
break;
|
break;
|
||||||
case RF3:
|
case RF3:
|
||||||
dividend = (s32)(prog_cal[RF3] - prog_tab[RF3]) -
|
dividend = (prog_cal[RF3] - prog_tab[RF3] -
|
||||||
(s32)(prog_cal[RF2] + prog_tab[RF2]);
|
prog_cal[RF2] + prog_tab[RF2]);
|
||||||
divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
|
divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
|
||||||
map[i].rf_a2 = (dividend / divisor);
|
map[i].rf_a2 = (dividend / divisor);
|
||||||
map[i].rf_b2 = (s32)(prog_cal[RF2] - prog_tab[RF2]);
|
map[i].rf_b2 = (prog_cal[RF2] - prog_tab[RF2]);
|
||||||
map[i].rf3 = rf_freq[RF3] / 1000;
|
map[i].rf3 = rf_freq[RF3] / 1000;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -229,8 +229,7 @@ static struct tda18271_map tda18271c2_km[] = {
|
||||||
static struct tda18271_map tda18271_rf_band[] = {
|
static struct tda18271_map tda18271_rf_band[] = {
|
||||||
{ .rfmax = 47900, .val = 0x00 },
|
{ .rfmax = 47900, .val = 0x00 },
|
||||||
{ .rfmax = 61100, .val = 0x01 },
|
{ .rfmax = 61100, .val = 0x01 },
|
||||||
/* { .rfmax = 152600, .val = 0x02 }, */
|
{ .rfmax = 152600, .val = 0x02 },
|
||||||
{ .rfmax = 121200, .val = 0x02 },
|
|
||||||
{ .rfmax = 164700, .val = 0x03 },
|
{ .rfmax = 164700, .val = 0x03 },
|
||||||
{ .rfmax = 203500, .val = 0x04 },
|
{ .rfmax = 203500, .val = 0x04 },
|
||||||
{ .rfmax = 457800, .val = 0x05 },
|
{ .rfmax = 457800, .val = 0x05 },
|
||||||
|
@ -448,7 +447,7 @@ static struct tda18271_map tda18271c2_rf_cal[] = {
|
||||||
{ .rfmax = 150000, .val = 0xb0 },
|
{ .rfmax = 150000, .val = 0xb0 },
|
||||||
{ .rfmax = 151000, .val = 0xb1 },
|
{ .rfmax = 151000, .val = 0xb1 },
|
||||||
{ .rfmax = 152000, .val = 0xb7 },
|
{ .rfmax = 152000, .val = 0xb7 },
|
||||||
{ .rfmax = 153000, .val = 0xbd },
|
{ .rfmax = 152600, .val = 0xbd },
|
||||||
{ .rfmax = 154000, .val = 0x20 },
|
{ .rfmax = 154000, .val = 0x20 },
|
||||||
{ .rfmax = 155000, .val = 0x22 },
|
{ .rfmax = 155000, .val = 0x22 },
|
||||||
{ .rfmax = 156000, .val = 0x24 },
|
{ .rfmax = 156000, .val = 0x24 },
|
||||||
|
@ -459,7 +458,7 @@ static struct tda18271_map tda18271c2_rf_cal[] = {
|
||||||
{ .rfmax = 161000, .val = 0x2d },
|
{ .rfmax = 161000, .val = 0x2d },
|
||||||
{ .rfmax = 163000, .val = 0x2e },
|
{ .rfmax = 163000, .val = 0x2e },
|
||||||
{ .rfmax = 164000, .val = 0x2f },
|
{ .rfmax = 164000, .val = 0x2f },
|
||||||
{ .rfmax = 165000, .val = 0x30 },
|
{ .rfmax = 164700, .val = 0x30 },
|
||||||
{ .rfmax = 166000, .val = 0x11 },
|
{ .rfmax = 166000, .val = 0x11 },
|
||||||
{ .rfmax = 167000, .val = 0x12 },
|
{ .rfmax = 167000, .val = 0x12 },
|
||||||
{ .rfmax = 168000, .val = 0x13 },
|
{ .rfmax = 168000, .val = 0x13 },
|
||||||
|
@ -510,7 +509,8 @@ static struct tda18271_map tda18271c2_rf_cal[] = {
|
||||||
{ .rfmax = 236000, .val = 0x1b },
|
{ .rfmax = 236000, .val = 0x1b },
|
||||||
{ .rfmax = 237000, .val = 0x1c },
|
{ .rfmax = 237000, .val = 0x1c },
|
||||||
{ .rfmax = 240000, .val = 0x1d },
|
{ .rfmax = 240000, .val = 0x1d },
|
||||||
{ .rfmax = 242000, .val = 0x1f },
|
{ .rfmax = 242000, .val = 0x1e },
|
||||||
|
{ .rfmax = 244000, .val = 0x1f },
|
||||||
{ .rfmax = 247000, .val = 0x20 },
|
{ .rfmax = 247000, .val = 0x20 },
|
||||||
{ .rfmax = 249000, .val = 0x21 },
|
{ .rfmax = 249000, .val = 0x21 },
|
||||||
{ .rfmax = 252000, .val = 0x22 },
|
{ .rfmax = 252000, .val = 0x22 },
|
||||||
|
@ -624,7 +624,7 @@ static struct tda18271_map tda18271c2_rf_cal[] = {
|
||||||
{ .rfmax = 453000, .val = 0x93 },
|
{ .rfmax = 453000, .val = 0x93 },
|
||||||
{ .rfmax = 454000, .val = 0x94 },
|
{ .rfmax = 454000, .val = 0x94 },
|
||||||
{ .rfmax = 456000, .val = 0x96 },
|
{ .rfmax = 456000, .val = 0x96 },
|
||||||
{ .rfmax = 457000, .val = 0x98 },
|
{ .rfmax = 457800, .val = 0x98 },
|
||||||
{ .rfmax = 461000, .val = 0x11 },
|
{ .rfmax = 461000, .val = 0x11 },
|
||||||
{ .rfmax = 468000, .val = 0x12 },
|
{ .rfmax = 468000, .val = 0x12 },
|
||||||
{ .rfmax = 472000, .val = 0x13 },
|
{ .rfmax = 472000, .val = 0x13 },
|
||||||
|
|
|
@ -38,7 +38,7 @@ MODULE_PARM_DESC(debug,
|
||||||
DEBSTATUS);
|
DEBSTATUS);
|
||||||
|
|
||||||
#define DRIVER_VERSION "0.1"
|
#define DRIVER_VERSION "0.1"
|
||||||
#define DRIVER_NAME "Technisat/B2C2 FlexCop II/IIb/III Digital TV PCI Driver"
|
#define DRIVER_NAME "flexcop-pci"
|
||||||
#define DRIVER_AUTHOR "Patrick Boettcher <patrick.boettcher@desy.de>"
|
#define DRIVER_AUTHOR "Patrick Boettcher <patrick.boettcher@desy.de>"
|
||||||
|
|
||||||
struct flexcop_pci {
|
struct flexcop_pci {
|
||||||
|
|
|
@ -362,7 +362,7 @@ config DVB_USB_LME2510
|
||||||
config DVB_USB_TECHNISAT_USB2
|
config DVB_USB_TECHNISAT_USB2
|
||||||
tristate "Technisat DVB-S/S2 USB2.0 support"
|
tristate "Technisat DVB-S/S2 USB2.0 support"
|
||||||
depends on DVB_USB
|
depends on DVB_USB
|
||||||
select DVB_STB0899 if !DVB_FE_CUSTOMISE
|
select DVB_STV090x if !DVB_FE_CUSTOMISE
|
||||||
select DVB_STB6100 if !DVB_FE_CUSTOMISE
|
select DVB_STV6110x if !DVB_FE_CUSTOMISE
|
||||||
help
|
help
|
||||||
Say Y here to support the Technisat USB2 DVB-S/S2 device
|
Say Y here to support the Technisat USB2 DVB-S/S2 device
|
||||||
|
|
|
@ -2162,7 +2162,7 @@ struct dibx000_agc_config dib7090_agc_config[2] = {
|
||||||
.agc1_pt3 = 98,
|
.agc1_pt3 = 98,
|
||||||
.agc1_slope1 = 0,
|
.agc1_slope1 = 0,
|
||||||
.agc1_slope2 = 167,
|
.agc1_slope2 = 167,
|
||||||
.agc1_pt1 = 98,
|
.agc2_pt1 = 98,
|
||||||
.agc2_pt2 = 255,
|
.agc2_pt2 = 255,
|
||||||
.agc2_slope1 = 104,
|
.agc2_slope1 = 104,
|
||||||
.agc2_slope2 = 0,
|
.agc2_slope2 = 0,
|
||||||
|
@ -2440,11 +2440,11 @@ static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
|
||||||
dib0700_set_i2c_speed(adap->dev, 340);
|
dib0700_set_i2c_speed(adap->dev, 340);
|
||||||
adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
|
adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
|
||||||
|
|
||||||
dib7090_slave_reset(adap->fe);
|
|
||||||
|
|
||||||
if (adap->fe == NULL)
|
if (adap->fe == NULL)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
|
dib7090_slave_reset(adap->fe);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -378,7 +378,6 @@ EXPORT_SYMBOL_GPL(media_entity_create_link);
|
||||||
|
|
||||||
static int __media_entity_setup_link_notify(struct media_link *link, u32 flags)
|
static int __media_entity_setup_link_notify(struct media_link *link, u32 flags)
|
||||||
{
|
{
|
||||||
const u32 mask = MEDIA_LNK_FL_ENABLED;
|
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* Notify both entities. */
|
/* Notify both entities. */
|
||||||
|
@ -395,7 +394,7 @@ static int __media_entity_setup_link_notify(struct media_link *link, u32 flags)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
link->flags = (link->flags & ~mask) | (flags & mask);
|
link->flags = flags;
|
||||||
link->reverse->flags = link->flags;
|
link->reverse->flags = link->flags;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -417,6 +416,7 @@ static int __media_entity_setup_link_notify(struct media_link *link, u32 flags)
|
||||||
*/
|
*/
|
||||||
int __media_entity_setup_link(struct media_link *link, u32 flags)
|
int __media_entity_setup_link(struct media_link *link, u32 flags)
|
||||||
{
|
{
|
||||||
|
const u32 mask = MEDIA_LNK_FL_ENABLED;
|
||||||
struct media_device *mdev;
|
struct media_device *mdev;
|
||||||
struct media_entity *source, *sink;
|
struct media_entity *source, *sink;
|
||||||
int ret = -EBUSY;
|
int ret = -EBUSY;
|
||||||
|
@ -424,6 +424,10 @@ int __media_entity_setup_link(struct media_link *link, u32 flags)
|
||||||
if (link == NULL)
|
if (link == NULL)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
|
/* The non-modifiable link flags must not be modified. */
|
||||||
|
if ((link->flags & ~mask) != (flags & ~mask))
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
if (link->flags & MEDIA_LNK_FL_IMMUTABLE)
|
if (link->flags & MEDIA_LNK_FL_IMMUTABLE)
|
||||||
return link->flags == flags ? 0 : -EINVAL;
|
return link->flags == flags ? 0 : -EINVAL;
|
||||||
|
|
||||||
|
|
|
@ -170,7 +170,7 @@ static int fmr2_setfreq(struct fmr2 *dev)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* !!! not tested, in my card this does't work !!! */
|
/* !!! not tested, in my card this doesn't work !!! */
|
||||||
static int fmr2_setvolume(struct fmr2 *dev)
|
static int fmr2_setvolume(struct fmr2 *dev)
|
||||||
{
|
{
|
||||||
int vol[16] = { 0x021, 0x084, 0x090, 0x104,
|
int vol[16] = { 0x021, 0x084, 0x090, 0x104,
|
||||||
|
|
|
@ -875,7 +875,7 @@ config MX3_VIDEO
|
||||||
config VIDEO_MX3
|
config VIDEO_MX3
|
||||||
tristate "i.MX3x Camera Sensor Interface driver"
|
tristate "i.MX3x Camera Sensor Interface driver"
|
||||||
depends on VIDEO_DEV && MX3_IPU && SOC_CAMERA
|
depends on VIDEO_DEV && MX3_IPU && SOC_CAMERA
|
||||||
select VIDEOBUF_DMA_CONTIG
|
select VIDEOBUF2_DMA_CONTIG
|
||||||
select MX3_VIDEO
|
select MX3_VIDEO
|
||||||
---help---
|
---help---
|
||||||
This is a v4l2 driver for the i.MX3x Camera Sensor Interface
|
This is a v4l2 driver for the i.MX3x Camera Sensor Interface
|
||||||
|
|
|
@ -350,8 +350,16 @@ void cx18_streams_cleanup(struct cx18 *cx, int unregister)
|
||||||
|
|
||||||
/* No struct video_device, but can have buffers allocated */
|
/* No struct video_device, but can have buffers allocated */
|
||||||
if (type == CX18_ENC_STREAM_TYPE_IDX) {
|
if (type == CX18_ENC_STREAM_TYPE_IDX) {
|
||||||
|
/* If the module params didn't inhibit IDX ... */
|
||||||
if (cx->stream_buffers[type] != 0) {
|
if (cx->stream_buffers[type] != 0) {
|
||||||
cx->stream_buffers[type] = 0;
|
cx->stream_buffers[type] = 0;
|
||||||
|
/*
|
||||||
|
* Before calling cx18_stream_free(),
|
||||||
|
* check if the IDX stream was actually set up.
|
||||||
|
* Needed, since the cx18_probe() error path
|
||||||
|
* exits through here as well as normal clean up
|
||||||
|
*/
|
||||||
|
if (cx->streams[type].buffers != 0)
|
||||||
cx18_stream_free(&cx->streams[type]);
|
cx18_stream_free(&cx->streams[type]);
|
||||||
}
|
}
|
||||||
continue;
|
continue;
|
||||||
|
|
|
@ -22,6 +22,7 @@ config VIDEO_CX23885
|
||||||
select DVB_CX24116 if !DVB_FE_CUSTOMISE
|
select DVB_CX24116 if !DVB_FE_CUSTOMISE
|
||||||
select DVB_STV0900 if !DVB_FE_CUSTOMISE
|
select DVB_STV0900 if !DVB_FE_CUSTOMISE
|
||||||
select DVB_DS3000 if !DVB_FE_CUSTOMISE
|
select DVB_DS3000 if !DVB_FE_CUSTOMISE
|
||||||
|
select DVB_STV0367 if !DVB_FE_CUSTOMISE
|
||||||
select MEDIA_TUNER_MT2131 if !MEDIA_TUNER_CUSTOMISE
|
select MEDIA_TUNER_MT2131 if !MEDIA_TUNER_CUSTOMISE
|
||||||
select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE
|
select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE
|
||||||
select MEDIA_TUNER_TDA8290 if !MEDIA_TUNER_CUSTOMISE
|
select MEDIA_TUNER_TDA8290 if !MEDIA_TUNER_CUSTOMISE
|
||||||
|
|
|
@ -298,7 +298,7 @@ static unsigned long imx074_query_bus_param(struct soc_camera_device *icd)
|
||||||
static int imx074_set_bus_param(struct soc_camera_device *icd,
|
static int imx074_set_bus_param(struct soc_camera_device *icd,
|
||||||
unsigned long flags)
|
unsigned long flags)
|
||||||
{
|
{
|
||||||
return -1;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct soc_camera_ops imx074_ops = {
|
static struct soc_camera_ops imx074_ops = {
|
||||||
|
|
|
@ -215,20 +215,21 @@ static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
|
||||||
}
|
}
|
||||||
|
|
||||||
switch (xclksel) {
|
switch (xclksel) {
|
||||||
case 0:
|
case ISP_XCLK_A:
|
||||||
isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
|
isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
|
||||||
ISPTCTRL_CTRL_DIVA_MASK,
|
ISPTCTRL_CTRL_DIVA_MASK,
|
||||||
divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
|
divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
|
||||||
dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
|
dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
|
||||||
currentxclk);
|
currentxclk);
|
||||||
break;
|
break;
|
||||||
case 1:
|
case ISP_XCLK_B:
|
||||||
isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
|
isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
|
||||||
ISPTCTRL_CTRL_DIVB_MASK,
|
ISPTCTRL_CTRL_DIVB_MASK,
|
||||||
divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
|
divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
|
||||||
dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
|
dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
|
||||||
currentxclk);
|
currentxclk);
|
||||||
break;
|
break;
|
||||||
|
case ISP_XCLK_NONE:
|
||||||
default:
|
default:
|
||||||
omap3isp_put(isp);
|
omap3isp_put(isp);
|
||||||
dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
|
dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
|
||||||
|
@ -237,13 +238,13 @@ static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Do we go from stable whatever to clock? */
|
/* Do we go from stable whatever to clock? */
|
||||||
if (divisor >= 2 && isp->xclk_divisor[xclksel] < 2)
|
if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
|
||||||
omap3isp_get(isp);
|
omap3isp_get(isp);
|
||||||
/* Stopping the clock. */
|
/* Stopping the clock. */
|
||||||
else if (divisor < 2 && isp->xclk_divisor[xclksel] >= 2)
|
else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
|
||||||
omap3isp_put(isp);
|
omap3isp_put(isp);
|
||||||
|
|
||||||
isp->xclk_divisor[xclksel] = divisor;
|
isp->xclk_divisor[xclksel - 1] = divisor;
|
||||||
|
|
||||||
omap3isp_put(isp);
|
omap3isp_put(isp);
|
||||||
|
|
||||||
|
@ -285,7 +286,8 @@ static void isp_power_settings(struct isp_device *isp, int idle)
|
||||||
*/
|
*/
|
||||||
void omap3isp_configure_bridge(struct isp_device *isp,
|
void omap3isp_configure_bridge(struct isp_device *isp,
|
||||||
enum ccdc_input_entity input,
|
enum ccdc_input_entity input,
|
||||||
const struct isp_parallel_platform_data *pdata)
|
const struct isp_parallel_platform_data *pdata,
|
||||||
|
unsigned int shift)
|
||||||
{
|
{
|
||||||
u32 ispctrl_val;
|
u32 ispctrl_val;
|
||||||
|
|
||||||
|
@ -298,9 +300,9 @@ void omap3isp_configure_bridge(struct isp_device *isp,
|
||||||
switch (input) {
|
switch (input) {
|
||||||
case CCDC_INPUT_PARALLEL:
|
case CCDC_INPUT_PARALLEL:
|
||||||
ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
|
ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
|
||||||
ispctrl_val |= pdata->data_lane_shift << ISPCTRL_SHIFT_SHIFT;
|
|
||||||
ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
|
ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
|
||||||
ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
|
ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
|
||||||
|
shift += pdata->data_lane_shift * 2;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CCDC_INPUT_CSI2A:
|
case CCDC_INPUT_CSI2A:
|
||||||
|
@ -319,6 +321,8 @@ void omap3isp_configure_bridge(struct isp_device *isp,
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
|
||||||
|
|
||||||
ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
|
ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
|
||||||
ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
|
ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
|
||||||
|
|
||||||
|
@ -658,6 +662,8 @@ int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
|
||||||
|
|
||||||
/* Apply power change to connected non-nodes. */
|
/* Apply power change to connected non-nodes. */
|
||||||
ret = isp_pipeline_pm_power(entity, change);
|
ret = isp_pipeline_pm_power(entity, change);
|
||||||
|
if (ret < 0)
|
||||||
|
entity->use_count -= change;
|
||||||
|
|
||||||
mutex_unlock(&entity->parent->graph_mutex);
|
mutex_unlock(&entity->parent->graph_mutex);
|
||||||
|
|
||||||
|
@ -872,6 +878,9 @@ static int isp_pipeline_disable(struct isp_pipeline *pipe)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (failure < 0)
|
||||||
|
isp->needs_reset = true;
|
||||||
|
|
||||||
return failure;
|
return failure;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -884,7 +893,8 @@ static int isp_pipeline_disable(struct isp_pipeline *pipe)
|
||||||
* single-shot or continuous mode.
|
* single-shot or continuous mode.
|
||||||
*
|
*
|
||||||
* Return 0 if successful, or the return value of the failed video::s_stream
|
* Return 0 if successful, or the return value of the failed video::s_stream
|
||||||
* operation otherwise.
|
* operation otherwise. The pipeline state is not updated when the operation
|
||||||
|
* fails, except when stopping the pipeline.
|
||||||
*/
|
*/
|
||||||
int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
|
int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
|
||||||
enum isp_pipeline_stream_state state)
|
enum isp_pipeline_stream_state state)
|
||||||
|
@ -895,6 +905,8 @@ int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
|
||||||
ret = isp_pipeline_disable(pipe);
|
ret = isp_pipeline_disable(pipe);
|
||||||
else
|
else
|
||||||
ret = isp_pipeline_enable(pipe, state);
|
ret = isp_pipeline_enable(pipe, state);
|
||||||
|
|
||||||
|
if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
|
||||||
pipe->stream_state = state;
|
pipe->stream_state = state;
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -1481,6 +1493,10 @@ void omap3isp_put(struct isp_device *isp)
|
||||||
if (--isp->ref_count == 0) {
|
if (--isp->ref_count == 0) {
|
||||||
isp_disable_interrupts(isp);
|
isp_disable_interrupts(isp);
|
||||||
isp_save_ctx(isp);
|
isp_save_ctx(isp);
|
||||||
|
if (isp->needs_reset) {
|
||||||
|
isp_reset(isp);
|
||||||
|
isp->needs_reset = false;
|
||||||
|
}
|
||||||
isp_disable_clocks(isp);
|
isp_disable_clocks(isp);
|
||||||
}
|
}
|
||||||
mutex_unlock(&isp->isp_mutex);
|
mutex_unlock(&isp->isp_mutex);
|
||||||
|
|
|
@ -132,7 +132,6 @@ struct isp_reg {
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* struct isp_parallel_platform_data - Parallel interface platform data
|
* struct isp_parallel_platform_data - Parallel interface platform data
|
||||||
* @width: Parallel bus width in bits (8, 10, 11 or 12)
|
|
||||||
* @data_lane_shift: Data lane shifter
|
* @data_lane_shift: Data lane shifter
|
||||||
* 0 - CAMEXT[13:0] -> CAM[13:0]
|
* 0 - CAMEXT[13:0] -> CAM[13:0]
|
||||||
* 1 - CAMEXT[13:2] -> CAM[11:0]
|
* 1 - CAMEXT[13:2] -> CAM[11:0]
|
||||||
|
@ -146,7 +145,6 @@ struct isp_reg {
|
||||||
* ISPCTRL_PAR_BRIDGE_BENDIAN - Big endian
|
* ISPCTRL_PAR_BRIDGE_BENDIAN - Big endian
|
||||||
*/
|
*/
|
||||||
struct isp_parallel_platform_data {
|
struct isp_parallel_platform_data {
|
||||||
unsigned int width;
|
|
||||||
unsigned int data_lane_shift:2;
|
unsigned int data_lane_shift:2;
|
||||||
unsigned int clk_pol:1;
|
unsigned int clk_pol:1;
|
||||||
unsigned int bridge:4;
|
unsigned int bridge:4;
|
||||||
|
@ -262,6 +260,7 @@ struct isp_device {
|
||||||
/* ISP Obj */
|
/* ISP Obj */
|
||||||
spinlock_t stat_lock; /* common lock for statistic drivers */
|
spinlock_t stat_lock; /* common lock for statistic drivers */
|
||||||
struct mutex isp_mutex; /* For handling ref_count field */
|
struct mutex isp_mutex; /* For handling ref_count field */
|
||||||
|
bool needs_reset;
|
||||||
int has_context;
|
int has_context;
|
||||||
int ref_count;
|
int ref_count;
|
||||||
unsigned int autoidle;
|
unsigned int autoidle;
|
||||||
|
@ -311,11 +310,12 @@ int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
|
||||||
enum isp_pipeline_stream_state state);
|
enum isp_pipeline_stream_state state);
|
||||||
void omap3isp_configure_bridge(struct isp_device *isp,
|
void omap3isp_configure_bridge(struct isp_device *isp,
|
||||||
enum ccdc_input_entity input,
|
enum ccdc_input_entity input,
|
||||||
const struct isp_parallel_platform_data *pdata);
|
const struct isp_parallel_platform_data *pdata,
|
||||||
|
unsigned int shift);
|
||||||
|
|
||||||
#define ISP_XCLK_NONE -1
|
#define ISP_XCLK_NONE 0
|
||||||
#define ISP_XCLK_A 0
|
#define ISP_XCLK_A 1
|
||||||
#define ISP_XCLK_B 1
|
#define ISP_XCLK_B 2
|
||||||
|
|
||||||
struct isp_device *omap3isp_get(struct isp_device *isp);
|
struct isp_device *omap3isp_get(struct isp_device *isp);
|
||||||
void omap3isp_put(struct isp_device *isp);
|
void omap3isp_put(struct isp_device *isp);
|
||||||
|
|
|
@ -43,6 +43,12 @@ __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
|
||||||
|
|
||||||
static const unsigned int ccdc_fmts[] = {
|
static const unsigned int ccdc_fmts[] = {
|
||||||
V4L2_MBUS_FMT_Y8_1X8,
|
V4L2_MBUS_FMT_Y8_1X8,
|
||||||
|
V4L2_MBUS_FMT_Y10_1X10,
|
||||||
|
V4L2_MBUS_FMT_Y12_1X12,
|
||||||
|
V4L2_MBUS_FMT_SGRBG8_1X8,
|
||||||
|
V4L2_MBUS_FMT_SRGGB8_1X8,
|
||||||
|
V4L2_MBUS_FMT_SBGGR8_1X8,
|
||||||
|
V4L2_MBUS_FMT_SGBRG8_1X8,
|
||||||
V4L2_MBUS_FMT_SGRBG10_1X10,
|
V4L2_MBUS_FMT_SGRBG10_1X10,
|
||||||
V4L2_MBUS_FMT_SRGGB10_1X10,
|
V4L2_MBUS_FMT_SRGGB10_1X10,
|
||||||
V4L2_MBUS_FMT_SBGGR10_1X10,
|
V4L2_MBUS_FMT_SBGGR10_1X10,
|
||||||
|
@ -1110,21 +1116,38 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
|
||||||
struct isp_parallel_platform_data *pdata = NULL;
|
struct isp_parallel_platform_data *pdata = NULL;
|
||||||
struct v4l2_subdev *sensor;
|
struct v4l2_subdev *sensor;
|
||||||
struct v4l2_mbus_framefmt *format;
|
struct v4l2_mbus_framefmt *format;
|
||||||
|
const struct isp_format_info *fmt_info;
|
||||||
|
struct v4l2_subdev_format fmt_src;
|
||||||
|
unsigned int depth_out;
|
||||||
|
unsigned int depth_in = 0;
|
||||||
struct media_pad *pad;
|
struct media_pad *pad;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
unsigned int shift;
|
||||||
u32 syn_mode;
|
u32 syn_mode;
|
||||||
u32 ccdc_pattern;
|
u32 ccdc_pattern;
|
||||||
|
|
||||||
if (ccdc->input == CCDC_INPUT_PARALLEL) {
|
|
||||||
pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
|
pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
|
||||||
sensor = media_entity_to_v4l2_subdev(pad->entity);
|
sensor = media_entity_to_v4l2_subdev(pad->entity);
|
||||||
|
if (ccdc->input == CCDC_INPUT_PARALLEL)
|
||||||
pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
|
pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
|
||||||
->bus.parallel;
|
->bus.parallel;
|
||||||
|
|
||||||
|
/* Compute shift value for lane shifter to configure the bridge. */
|
||||||
|
fmt_src.pad = pad->index;
|
||||||
|
fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
|
||||||
|
if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
|
||||||
|
fmt_info = omap3isp_video_format_info(fmt_src.format.code);
|
||||||
|
depth_in = fmt_info->bpp;
|
||||||
}
|
}
|
||||||
|
|
||||||
omap3isp_configure_bridge(isp, ccdc->input, pdata);
|
fmt_info = omap3isp_video_format_info
|
||||||
|
(isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
|
||||||
|
depth_out = fmt_info->bpp;
|
||||||
|
|
||||||
ccdc->syncif.datsz = pdata ? pdata->width : 10;
|
shift = depth_in - depth_out;
|
||||||
|
omap3isp_configure_bridge(isp, ccdc->input, pdata, shift);
|
||||||
|
|
||||||
|
ccdc->syncif.datsz = depth_out;
|
||||||
ccdc_config_sync_if(ccdc, &ccdc->syncif);
|
ccdc_config_sync_if(ccdc, &ccdc->syncif);
|
||||||
|
|
||||||
/* CCDC_PAD_SINK */
|
/* CCDC_PAD_SINK */
|
||||||
|
@ -1338,7 +1361,7 @@ static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
|
||||||
* @ccdc: Pointer to ISP CCDC device.
|
* @ccdc: Pointer to ISP CCDC device.
|
||||||
* @event: Pointing which event trigger handler
|
* @event: Pointing which event trigger handler
|
||||||
*
|
*
|
||||||
* Return 1 when the event and stopping request combination is satisfyied,
|
* Return 1 when the event and stopping request combination is satisfied,
|
||||||
* zero otherwise.
|
* zero otherwise.
|
||||||
*/
|
*/
|
||||||
static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
|
static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
|
||||||
|
@ -1618,7 +1641,7 @@ static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
|
||||||
|
|
||||||
ccdc_set_outaddr(ccdc, buffer->isp_addr);
|
ccdc_set_outaddr(ccdc, buffer->isp_addr);
|
||||||
|
|
||||||
/* We now have a buffer queued on the output, restart the pipeline in
|
/* We now have a buffer queued on the output, restart the pipeline
|
||||||
* on the next CCDC interrupt if running in continuous mode (or when
|
* on the next CCDC interrupt if running in continuous mode (or when
|
||||||
* starting the stream).
|
* starting the stream).
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -755,7 +755,7 @@ static struct preview_update update_attrs[] = {
|
||||||
* @configs - pointer to update config structure.
|
* @configs - pointer to update config structure.
|
||||||
* @config - return pointer to appropriate structure field.
|
* @config - return pointer to appropriate structure field.
|
||||||
* @bit - for which feature to return pointers.
|
* @bit - for which feature to return pointers.
|
||||||
* Return size of coresponding prev_params member
|
* Return size of corresponding prev_params member
|
||||||
*/
|
*/
|
||||||
static u32
|
static u32
|
||||||
__preview_get_ptrs(struct prev_params *params, void **param,
|
__preview_get_ptrs(struct prev_params *params, void **param,
|
||||||
|
|
|
@ -339,7 +339,7 @@ static int isp_video_buffer_prepare_user(struct isp_video_buffer *buf)
|
||||||
up_read(¤t->mm->mmap_sem);
|
up_read(¤t->mm->mmap_sem);
|
||||||
|
|
||||||
if (ret != buf->npages) {
|
if (ret != buf->npages) {
|
||||||
buf->npages = ret;
|
buf->npages = ret < 0 ? 0 : ret;
|
||||||
isp_video_buffer_cleanup(buf);
|
isp_video_buffer_cleanup(buf);
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
}
|
}
|
||||||
|
@ -408,8 +408,8 @@ done:
|
||||||
* isp_video_buffer_prepare_vm_flags - Get VMA flags for a userspace address
|
* isp_video_buffer_prepare_vm_flags - Get VMA flags for a userspace address
|
||||||
*
|
*
|
||||||
* This function locates the VMAs for the buffer's userspace address and checks
|
* This function locates the VMAs for the buffer's userspace address and checks
|
||||||
* that their flags match. The onlflag that we need to care for at the moment is
|
* that their flags match. The only flag that we need to care for at the moment
|
||||||
* VM_PFNMAP.
|
* is VM_PFNMAP.
|
||||||
*
|
*
|
||||||
* The buffer vm_flags field is set to the first VMA flags.
|
* The buffer vm_flags field is set to the first VMA flags.
|
||||||
*
|
*
|
||||||
|
|
|
@ -714,19 +714,50 @@ static void resizer_print_status(struct isp_res_device *res)
|
||||||
* iw and ih are the input width and height after cropping. Those equations need
|
* iw and ih are the input width and height after cropping. Those equations need
|
||||||
* to be satisfied exactly for the resizer to work correctly.
|
* to be satisfied exactly for the resizer to work correctly.
|
||||||
*
|
*
|
||||||
* Reverting the equations, we can compute the resizing ratios with
|
* The equations can't be easily reverted, as the >> 8 operation is not linear.
|
||||||
|
* In addition, not all input sizes can be achieved for a given output size. To
|
||||||
|
* get the highest input size lower than or equal to the requested input size,
|
||||||
|
* we need to compute the highest resizing ratio that satisfies the following
|
||||||
|
* inequality (taking the 4-tap mode width equation as an example)
|
||||||
|
*
|
||||||
|
* iw >= (32 * sph + (ow - 1) * hrsz + 16) >> 8 - 7
|
||||||
|
*
|
||||||
|
* (where iw is the requested input width) which can be rewritten as
|
||||||
|
*
|
||||||
|
* iw - 7 >= (32 * sph + (ow - 1) * hrsz + 16) >> 8
|
||||||
|
* (iw - 7) << 8 >= 32 * sph + (ow - 1) * hrsz + 16 - b
|
||||||
|
* ((iw - 7) << 8) + b >= 32 * sph + (ow - 1) * hrsz + 16
|
||||||
|
*
|
||||||
|
* where b is the value of the 8 least significant bits of the right hand side
|
||||||
|
* expression of the last inequality. The highest resizing ratio value will be
|
||||||
|
* achieved when b is equal to its maximum value of 255. That resizing ratio
|
||||||
|
* value will still satisfy the original inequality, as b will disappear when
|
||||||
|
* the expression will be shifted right by 8.
|
||||||
|
*
|
||||||
|
* The reverted the equations thus become
|
||||||
*
|
*
|
||||||
* - 8-phase, 4-tap mode
|
* - 8-phase, 4-tap mode
|
||||||
* hrsz = ((iw - 7) * 256 - 16 - 32 * sph) / (ow - 1)
|
* hrsz = ((iw - 7) * 256 + 255 - 16 - 32 * sph) / (ow - 1)
|
||||||
* vrsz = ((ih - 4) * 256 - 16 - 32 * spv) / (oh - 1)
|
* vrsz = ((ih - 4) * 256 + 255 - 16 - 32 * spv) / (oh - 1)
|
||||||
* - 4-phase, 7-tap mode
|
* - 4-phase, 7-tap mode
|
||||||
* hrsz = ((iw - 7) * 256 - 32 - 64 * sph) / (ow - 1)
|
* hrsz = ((iw - 7) * 256 + 255 - 32 - 64 * sph) / (ow - 1)
|
||||||
* vrsz = ((ih - 7) * 256 - 32 - 64 * spv) / (oh - 1)
|
* vrsz = ((ih - 7) * 256 + 255 - 32 - 64 * spv) / (oh - 1)
|
||||||
*
|
*
|
||||||
* The ratios are integer values, and must be rounded down to ensure that the
|
* The ratios are integer values, and are rounded down to ensure that the
|
||||||
* cropped input size is not bigger than the uncropped input size. As the ratio
|
* cropped input size is not bigger than the uncropped input size.
|
||||||
* in 7-tap mode is always smaller than the ratio in 4-tap mode, we can use the
|
*
|
||||||
* 7-tap mode equations to compute a ratio approximation.
|
* As the number of phases/taps, used to select the correct equations to compute
|
||||||
|
* the ratio, depends on the ratio, we start with the 4-tap mode equations to
|
||||||
|
* compute an approximation of the ratio, and switch to the 7-tap mode equations
|
||||||
|
* if the approximation is higher than the ratio threshold.
|
||||||
|
*
|
||||||
|
* As the 7-tap mode equations will return a ratio smaller than or equal to the
|
||||||
|
* 4-tap mode equations, the resulting ratio could become lower than or equal to
|
||||||
|
* the ratio threshold. This 'equations loop' isn't an issue as long as the
|
||||||
|
* correct equations are used to compute the final input size. Starting with the
|
||||||
|
* 4-tap mode equations ensure that, in case of values resulting in a 'ratio
|
||||||
|
* loop', the smallest of the ratio values will be used, never exceeding the
|
||||||
|
* requested input size.
|
||||||
*
|
*
|
||||||
* We first clamp the output size according to the hardware capabilitie to avoid
|
* We first clamp the output size according to the hardware capabilitie to avoid
|
||||||
* auto-cropping the input more than required to satisfy the TRM equations. The
|
* auto-cropping the input more than required to satisfy the TRM equations. The
|
||||||
|
@ -775,6 +806,8 @@ static void resizer_calc_ratios(struct isp_res_device *res,
|
||||||
unsigned int max_width;
|
unsigned int max_width;
|
||||||
unsigned int max_height;
|
unsigned int max_height;
|
||||||
unsigned int width_alignment;
|
unsigned int width_alignment;
|
||||||
|
unsigned int width;
|
||||||
|
unsigned int height;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Clamp the output height based on the hardware capabilities and
|
* Clamp the output height based on the hardware capabilities and
|
||||||
|
@ -786,7 +819,10 @@ static void resizer_calc_ratios(struct isp_res_device *res,
|
||||||
max_height = min_t(unsigned int, max_height, MAX_OUT_HEIGHT);
|
max_height = min_t(unsigned int, max_height, MAX_OUT_HEIGHT);
|
||||||
output->height = clamp(output->height, min_height, max_height);
|
output->height = clamp(output->height, min_height, max_height);
|
||||||
|
|
||||||
ratio->vert = ((input->height - 7) * 256 - 32 - 64 * spv)
|
ratio->vert = ((input->height - 4) * 256 + 255 - 16 - 32 * spv)
|
||||||
|
/ (output->height - 1);
|
||||||
|
if (ratio->vert > MID_RESIZE_VALUE)
|
||||||
|
ratio->vert = ((input->height - 7) * 256 + 255 - 32 - 64 * spv)
|
||||||
/ (output->height - 1);
|
/ (output->height - 1);
|
||||||
ratio->vert = clamp_t(unsigned int, ratio->vert,
|
ratio->vert = clamp_t(unsigned int, ratio->vert,
|
||||||
MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
|
MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
|
||||||
|
@ -794,11 +830,11 @@ static void resizer_calc_ratios(struct isp_res_device *res,
|
||||||
if (ratio->vert <= MID_RESIZE_VALUE) {
|
if (ratio->vert <= MID_RESIZE_VALUE) {
|
||||||
upscaled_height = (output->height - 1) * ratio->vert
|
upscaled_height = (output->height - 1) * ratio->vert
|
||||||
+ 32 * spv + 16;
|
+ 32 * spv + 16;
|
||||||
input->height = (upscaled_height >> 8) + 4;
|
height = (upscaled_height >> 8) + 4;
|
||||||
} else {
|
} else {
|
||||||
upscaled_height = (output->height - 1) * ratio->vert
|
upscaled_height = (output->height - 1) * ratio->vert
|
||||||
+ 64 * spv + 32;
|
+ 64 * spv + 32;
|
||||||
input->height = (upscaled_height >> 8) + 7;
|
height = (upscaled_height >> 8) + 7;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -854,7 +890,10 @@ static void resizer_calc_ratios(struct isp_res_device *res,
|
||||||
max_width & ~(width_alignment - 1));
|
max_width & ~(width_alignment - 1));
|
||||||
output->width = ALIGN(output->width, width_alignment);
|
output->width = ALIGN(output->width, width_alignment);
|
||||||
|
|
||||||
ratio->horz = ((input->width - 7) * 256 - 32 - 64 * sph)
|
ratio->horz = ((input->width - 7) * 256 + 255 - 16 - 32 * sph)
|
||||||
|
/ (output->width - 1);
|
||||||
|
if (ratio->horz > MID_RESIZE_VALUE)
|
||||||
|
ratio->horz = ((input->width - 7) * 256 + 255 - 32 - 64 * sph)
|
||||||
/ (output->width - 1);
|
/ (output->width - 1);
|
||||||
ratio->horz = clamp_t(unsigned int, ratio->horz,
|
ratio->horz = clamp_t(unsigned int, ratio->horz,
|
||||||
MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
|
MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
|
||||||
|
@ -862,12 +901,18 @@ static void resizer_calc_ratios(struct isp_res_device *res,
|
||||||
if (ratio->horz <= MID_RESIZE_VALUE) {
|
if (ratio->horz <= MID_RESIZE_VALUE) {
|
||||||
upscaled_width = (output->width - 1) * ratio->horz
|
upscaled_width = (output->width - 1) * ratio->horz
|
||||||
+ 32 * sph + 16;
|
+ 32 * sph + 16;
|
||||||
input->width = (upscaled_width >> 8) + 7;
|
width = (upscaled_width >> 8) + 7;
|
||||||
} else {
|
} else {
|
||||||
upscaled_width = (output->width - 1) * ratio->horz
|
upscaled_width = (output->width - 1) * ratio->horz
|
||||||
+ 64 * sph + 32;
|
+ 64 * sph + 32;
|
||||||
input->width = (upscaled_width >> 8) + 7;
|
width = (upscaled_width >> 8) + 7;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Center the new crop rectangle. */
|
||||||
|
input->left += (input->width - width) / 2;
|
||||||
|
input->top += (input->height - height) / 2;
|
||||||
|
input->width = width;
|
||||||
|
input->height = height;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -131,9 +131,9 @@ struct ispstat {
|
||||||
struct ispstat_generic_config {
|
struct ispstat_generic_config {
|
||||||
/*
|
/*
|
||||||
* Fields must be in the same order as in:
|
* Fields must be in the same order as in:
|
||||||
* - isph3a_aewb_config
|
* - omap3isp_h3a_aewb_config
|
||||||
* - isph3a_af_config
|
* - omap3isp_h3a_af_config
|
||||||
* - isphist_config
|
* - omap3isp_hist_config
|
||||||
*/
|
*/
|
||||||
u32 buf_size;
|
u32 buf_size;
|
||||||
u16 config_counter;
|
u16 config_counter;
|
||||||
|
|
|
@ -47,29 +47,59 @@
|
||||||
|
|
||||||
static struct isp_format_info formats[] = {
|
static struct isp_format_info formats[] = {
|
||||||
{ V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,
|
{ V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,
|
||||||
V4L2_MBUS_FMT_Y8_1X8, V4L2_PIX_FMT_GREY, 8, },
|
V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,
|
||||||
|
V4L2_PIX_FMT_GREY, 8, },
|
||||||
|
{ V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_Y10_1X10,
|
||||||
|
V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_Y8_1X8,
|
||||||
|
V4L2_PIX_FMT_Y10, 10, },
|
||||||
|
{ V4L2_MBUS_FMT_Y12_1X12, V4L2_MBUS_FMT_Y10_1X10,
|
||||||
|
V4L2_MBUS_FMT_Y12_1X12, V4L2_MBUS_FMT_Y8_1X8,
|
||||||
|
V4L2_PIX_FMT_Y12, 12, },
|
||||||
|
{ V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_MBUS_FMT_SBGGR8_1X8,
|
||||||
|
V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_MBUS_FMT_SBGGR8_1X8,
|
||||||
|
V4L2_PIX_FMT_SBGGR8, 8, },
|
||||||
|
{ V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_SGBRG8_1X8,
|
||||||
|
V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_SGBRG8_1X8,
|
||||||
|
V4L2_PIX_FMT_SGBRG8, 8, },
|
||||||
|
{ V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_MBUS_FMT_SGRBG8_1X8,
|
||||||
|
V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_MBUS_FMT_SGRBG8_1X8,
|
||||||
|
V4L2_PIX_FMT_SGRBG8, 8, },
|
||||||
|
{ V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8,
|
||||||
|
V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8,
|
||||||
|
V4L2_PIX_FMT_SRGGB8, 8, },
|
||||||
{ V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,
|
{ V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,
|
||||||
V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_PIX_FMT_SGRBG10DPCM8, 8, },
|
V4L2_MBUS_FMT_SGRBG10_1X10, 0,
|
||||||
|
V4L2_PIX_FMT_SGRBG10DPCM8, 8, },
|
||||||
{ V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR10_1X10,
|
{ V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR10_1X10,
|
||||||
V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_PIX_FMT_SBGGR10, 10, },
|
V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR8_1X8,
|
||||||
|
V4L2_PIX_FMT_SBGGR10, 10, },
|
||||||
{ V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_MBUS_FMT_SGBRG10_1X10,
|
{ V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_MBUS_FMT_SGBRG10_1X10,
|
||||||
V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_PIX_FMT_SGBRG10, 10, },
|
V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_MBUS_FMT_SGBRG8_1X8,
|
||||||
|
V4L2_PIX_FMT_SGBRG10, 10, },
|
||||||
{ V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SGRBG10_1X10,
|
{ V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SGRBG10_1X10,
|
||||||
V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_PIX_FMT_SGRBG10, 10, },
|
V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SGRBG8_1X8,
|
||||||
|
V4L2_PIX_FMT_SGRBG10, 10, },
|
||||||
{ V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_MBUS_FMT_SRGGB10_1X10,
|
{ V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_MBUS_FMT_SRGGB10_1X10,
|
||||||
V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_PIX_FMT_SRGGB10, 10, },
|
V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_MBUS_FMT_SRGGB8_1X8,
|
||||||
|
V4L2_PIX_FMT_SRGGB10, 10, },
|
||||||
{ V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_MBUS_FMT_SBGGR10_1X10,
|
{ V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_MBUS_FMT_SBGGR10_1X10,
|
||||||
V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_PIX_FMT_SBGGR12, 12, },
|
V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_MBUS_FMT_SBGGR8_1X8,
|
||||||
|
V4L2_PIX_FMT_SBGGR12, 12, },
|
||||||
{ V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_MBUS_FMT_SGBRG10_1X10,
|
{ V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_MBUS_FMT_SGBRG10_1X10,
|
||||||
V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_PIX_FMT_SGBRG12, 12, },
|
V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_MBUS_FMT_SGBRG8_1X8,
|
||||||
|
V4L2_PIX_FMT_SGBRG12, 12, },
|
||||||
{ V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_MBUS_FMT_SGRBG10_1X10,
|
{ V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_MBUS_FMT_SGRBG10_1X10,
|
||||||
V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_PIX_FMT_SGRBG12, 12, },
|
V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_MBUS_FMT_SGRBG8_1X8,
|
||||||
|
V4L2_PIX_FMT_SGRBG12, 12, },
|
||||||
{ V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_MBUS_FMT_SRGGB10_1X10,
|
{ V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_MBUS_FMT_SRGGB10_1X10,
|
||||||
V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_PIX_FMT_SRGGB12, 12, },
|
V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_MBUS_FMT_SRGGB8_1X8,
|
||||||
|
V4L2_PIX_FMT_SRGGB12, 12, },
|
||||||
{ V4L2_MBUS_FMT_UYVY8_1X16, V4L2_MBUS_FMT_UYVY8_1X16,
|
{ V4L2_MBUS_FMT_UYVY8_1X16, V4L2_MBUS_FMT_UYVY8_1X16,
|
||||||
V4L2_MBUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_UYVY, 16, },
|
V4L2_MBUS_FMT_UYVY8_1X16, 0,
|
||||||
|
V4L2_PIX_FMT_UYVY, 16, },
|
||||||
{ V4L2_MBUS_FMT_YUYV8_1X16, V4L2_MBUS_FMT_YUYV8_1X16,
|
{ V4L2_MBUS_FMT_YUYV8_1X16, V4L2_MBUS_FMT_YUYV8_1X16,
|
||||||
V4L2_MBUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_YUYV, 16, },
|
V4L2_MBUS_FMT_YUYV8_1X16, 0,
|
||||||
|
V4L2_PIX_FMT_YUYV, 16, },
|
||||||
};
|
};
|
||||||
|
|
||||||
const struct isp_format_info *
|
const struct isp_format_info *
|
||||||
|
@ -85,6 +115,37 @@ omap3isp_video_format_info(enum v4l2_mbus_pixelcode code)
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Decide whether desired output pixel code can be obtained with
|
||||||
|
* the lane shifter by shifting the input pixel code.
|
||||||
|
* @in: input pixelcode to shifter
|
||||||
|
* @out: output pixelcode from shifter
|
||||||
|
* @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
|
||||||
|
*
|
||||||
|
* return true if the combination is possible
|
||||||
|
* return false otherwise
|
||||||
|
*/
|
||||||
|
static bool isp_video_is_shiftable(enum v4l2_mbus_pixelcode in,
|
||||||
|
enum v4l2_mbus_pixelcode out,
|
||||||
|
unsigned int additional_shift)
|
||||||
|
{
|
||||||
|
const struct isp_format_info *in_info, *out_info;
|
||||||
|
|
||||||
|
if (in == out)
|
||||||
|
return true;
|
||||||
|
|
||||||
|
in_info = omap3isp_video_format_info(in);
|
||||||
|
out_info = omap3isp_video_format_info(out);
|
||||||
|
|
||||||
|
if ((in_info->flavor == 0) || (out_info->flavor == 0))
|
||||||
|
return false;
|
||||||
|
|
||||||
|
if (in_info->flavor != out_info->flavor)
|
||||||
|
return false;
|
||||||
|
|
||||||
|
return in_info->bpp - out_info->bpp + additional_shift <= 6;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* isp_video_mbus_to_pix - Convert v4l2_mbus_framefmt to v4l2_pix_format
|
* isp_video_mbus_to_pix - Convert v4l2_mbus_framefmt to v4l2_pix_format
|
||||||
* @video: ISP video instance
|
* @video: ISP video instance
|
||||||
|
@ -235,6 +296,7 @@ static int isp_video_validate_pipeline(struct isp_pipeline *pipe)
|
||||||
return -EPIPE;
|
return -EPIPE;
|
||||||
|
|
||||||
while (1) {
|
while (1) {
|
||||||
|
unsigned int shifter_link;
|
||||||
/* Retrieve the sink format */
|
/* Retrieve the sink format */
|
||||||
pad = &subdev->entity.pads[0];
|
pad = &subdev->entity.pads[0];
|
||||||
if (!(pad->flags & MEDIA_PAD_FL_SINK))
|
if (!(pad->flags & MEDIA_PAD_FL_SINK))
|
||||||
|
@ -263,6 +325,10 @@ static int isp_video_validate_pipeline(struct isp_pipeline *pipe)
|
||||||
return -ENOSPC;
|
return -ENOSPC;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* If sink pad is on CCDC, the link has the lane shifter
|
||||||
|
* in the middle of it. */
|
||||||
|
shifter_link = subdev == &isp->isp_ccdc.subdev;
|
||||||
|
|
||||||
/* Retrieve the source format */
|
/* Retrieve the source format */
|
||||||
pad = media_entity_remote_source(pad);
|
pad = media_entity_remote_source(pad);
|
||||||
if (pad == NULL ||
|
if (pad == NULL ||
|
||||||
|
@ -278,10 +344,24 @@ static int isp_video_validate_pipeline(struct isp_pipeline *pipe)
|
||||||
return -EPIPE;
|
return -EPIPE;
|
||||||
|
|
||||||
/* Check if the two ends match */
|
/* Check if the two ends match */
|
||||||
if (fmt_source.format.code != fmt_sink.format.code ||
|
if (fmt_source.format.width != fmt_sink.format.width ||
|
||||||
fmt_source.format.width != fmt_sink.format.width ||
|
|
||||||
fmt_source.format.height != fmt_sink.format.height)
|
fmt_source.format.height != fmt_sink.format.height)
|
||||||
return -EPIPE;
|
return -EPIPE;
|
||||||
|
|
||||||
|
if (shifter_link) {
|
||||||
|
unsigned int parallel_shift = 0;
|
||||||
|
if (isp->isp_ccdc.input == CCDC_INPUT_PARALLEL) {
|
||||||
|
struct isp_parallel_platform_data *pdata =
|
||||||
|
&((struct isp_v4l2_subdevs_group *)
|
||||||
|
subdev->host_priv)->bus.parallel;
|
||||||
|
parallel_shift = pdata->data_lane_shift * 2;
|
||||||
|
}
|
||||||
|
if (!isp_video_is_shiftable(fmt_source.format.code,
|
||||||
|
fmt_sink.format.code,
|
||||||
|
parallel_shift))
|
||||||
|
return -EPIPE;
|
||||||
|
} else if (fmt_source.format.code != fmt_sink.format.code)
|
||||||
|
return -EPIPE;
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -49,6 +49,8 @@ struct v4l2_pix_format;
|
||||||
* bits. Identical to @code if the format is 10 bits wide or less.
|
* bits. Identical to @code if the format is 10 bits wide or less.
|
||||||
* @uncompressed: V4L2 media bus format code for the corresponding uncompressed
|
* @uncompressed: V4L2 media bus format code for the corresponding uncompressed
|
||||||
* format. Identical to @code if the format is not DPCM compressed.
|
* format. Identical to @code if the format is not DPCM compressed.
|
||||||
|
* @flavor: V4L2 media bus format code for the same pixel layout but
|
||||||
|
* shifted to be 8 bits per pixel. =0 if format is not shiftable.
|
||||||
* @pixelformat: V4L2 pixel format FCC identifier
|
* @pixelformat: V4L2 pixel format FCC identifier
|
||||||
* @bpp: Bits per pixel
|
* @bpp: Bits per pixel
|
||||||
*/
|
*/
|
||||||
|
@ -56,6 +58,7 @@ struct isp_format_info {
|
||||||
enum v4l2_mbus_pixelcode code;
|
enum v4l2_mbus_pixelcode code;
|
||||||
enum v4l2_mbus_pixelcode truncated;
|
enum v4l2_mbus_pixelcode truncated;
|
||||||
enum v4l2_mbus_pixelcode uncompressed;
|
enum v4l2_mbus_pixelcode uncompressed;
|
||||||
|
enum v4l2_mbus_pixelcode flavor;
|
||||||
u32 pixelformat;
|
u32 pixelformat;
|
||||||
unsigned int bpp;
|
unsigned int bpp;
|
||||||
};
|
};
|
||||||
|
|
|
@ -527,7 +527,7 @@ static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
if (vb2_is_streaming(&fimc->vid_cap.vbq) || fimc_capture_active(fimc))
|
if (vb2_is_busy(&fimc->vid_cap.vbq) || fimc_capture_active(fimc))
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
|
|
||||||
frame = &ctx->d_frame;
|
frame = &ctx->d_frame;
|
||||||
|
@ -539,8 +539,10 @@ static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < frame->fmt->colplanes; i++)
|
for (i = 0; i < frame->fmt->colplanes; i++) {
|
||||||
frame->payload[i] = pix->plane_fmt[i].bytesperline * pix->height;
|
frame->payload[i] =
|
||||||
|
(pix->width * pix->height * frame->fmt->depth[i]) >> 3;
|
||||||
|
}
|
||||||
|
|
||||||
/* Output DMA frame pixel size and offsets. */
|
/* Output DMA frame pixel size and offsets. */
|
||||||
frame->f_width = pix->plane_fmt[0].bytesperline * 8
|
frame->f_width = pix->plane_fmt[0].bytesperline * 8
|
||||||
|
|
|
@ -361,10 +361,20 @@ static void fimc_capture_irq_handler(struct fimc_dev *fimc)
|
||||||
{
|
{
|
||||||
struct fimc_vid_cap *cap = &fimc->vid_cap;
|
struct fimc_vid_cap *cap = &fimc->vid_cap;
|
||||||
struct fimc_vid_buffer *v_buf;
|
struct fimc_vid_buffer *v_buf;
|
||||||
|
struct timeval *tv;
|
||||||
|
struct timespec ts;
|
||||||
|
|
||||||
if (!list_empty(&cap->active_buf_q) &&
|
if (!list_empty(&cap->active_buf_q) &&
|
||||||
test_bit(ST_CAPT_RUN, &fimc->state)) {
|
test_bit(ST_CAPT_RUN, &fimc->state)) {
|
||||||
|
ktime_get_real_ts(&ts);
|
||||||
|
|
||||||
v_buf = active_queue_pop(cap);
|
v_buf = active_queue_pop(cap);
|
||||||
|
|
||||||
|
tv = &v_buf->vb.v4l2_buf.timestamp;
|
||||||
|
tv->tv_sec = ts.tv_sec;
|
||||||
|
tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
|
||||||
|
v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
|
||||||
|
|
||||||
vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
|
vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -758,7 +768,7 @@ static void fimc_unlock(struct vb2_queue *vq)
|
||||||
mutex_unlock(&ctx->fimc_dev->lock);
|
mutex_unlock(&ctx->fimc_dev->lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
struct vb2_ops fimc_qops = {
|
static struct vb2_ops fimc_qops = {
|
||||||
.queue_setup = fimc_queue_setup,
|
.queue_setup = fimc_queue_setup,
|
||||||
.buf_prepare = fimc_buf_prepare,
|
.buf_prepare = fimc_buf_prepare,
|
||||||
.buf_queue = fimc_buf_queue,
|
.buf_queue = fimc_buf_queue,
|
||||||
|
@ -927,23 +937,23 @@ int fimc_vidioc_try_fmt_mplane(struct file *file, void *priv,
|
||||||
pix->num_planes = fmt->memplanes;
|
pix->num_planes = fmt->memplanes;
|
||||||
pix->colorspace = V4L2_COLORSPACE_JPEG;
|
pix->colorspace = V4L2_COLORSPACE_JPEG;
|
||||||
|
|
||||||
|
|
||||||
for (i = 0; i < pix->num_planes; ++i) {
|
for (i = 0; i < pix->num_planes; ++i) {
|
||||||
int bpl = pix->plane_fmt[i].bytesperline;
|
u32 bpl = pix->plane_fmt[i].bytesperline;
|
||||||
|
u32 *sizeimage = &pix->plane_fmt[i].sizeimage;
|
||||||
|
|
||||||
dbg("[%d] bpl: %d, depth: %d, w: %d, h: %d",
|
if (fmt->colplanes > 1 && (bpl == 0 || bpl < pix->width))
|
||||||
i, bpl, fmt->depth[i], pix->width, pix->height);
|
bpl = pix->width; /* Planar */
|
||||||
|
|
||||||
if (!bpl || (bpl * 8 / fmt->depth[i]) > pix->width)
|
if (fmt->colplanes == 1 && /* Packed */
|
||||||
bpl = (pix->width * fmt->depth[0]) >> 3;
|
(bpl == 0 || ((bpl * 8) / fmt->depth[i]) < pix->width))
|
||||||
|
bpl = (pix->width * fmt->depth[0]) / 8;
|
||||||
|
|
||||||
if (!pix->plane_fmt[i].sizeimage)
|
if (i == 0) /* Same bytesperline for each plane. */
|
||||||
pix->plane_fmt[i].sizeimage = pix->height * bpl;
|
mod_x = bpl;
|
||||||
|
|
||||||
pix->plane_fmt[i].bytesperline = bpl;
|
pix->plane_fmt[i].bytesperline = mod_x;
|
||||||
|
*sizeimage = (pix->width * pix->height * fmt->depth[i]) / 8;
|
||||||
dbg("[%d]: bpl: %d, sizeimage: %d",
|
|
||||||
i, pix->plane_fmt[i].bytesperline,
|
|
||||||
pix->plane_fmt[i].sizeimage);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -965,7 +975,7 @@ static int fimc_m2m_s_fmt_mplane(struct file *file, void *priv,
|
||||||
|
|
||||||
vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
|
vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
|
||||||
|
|
||||||
if (vb2_is_streaming(vq)) {
|
if (vb2_is_busy(vq)) {
|
||||||
v4l2_err(&fimc->m2m.v4l2_dev, "queue (%d) busy\n", f->type);
|
v4l2_err(&fimc->m2m.v4l2_dev, "queue (%d) busy\n", f->type);
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
}
|
}
|
||||||
|
@ -985,8 +995,10 @@ static int fimc_m2m_s_fmt_mplane(struct file *file, void *priv,
|
||||||
if (!frame->fmt)
|
if (!frame->fmt)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
for (i = 0; i < frame->fmt->colplanes; i++)
|
for (i = 0; i < frame->fmt->colplanes; i++) {
|
||||||
frame->payload[i] = pix->plane_fmt[i].bytesperline * pix->height;
|
frame->payload[i] =
|
||||||
|
(pix->width * pix->height * frame->fmt->depth[i]) / 8;
|
||||||
|
}
|
||||||
|
|
||||||
frame->f_width = pix->plane_fmt[0].bytesperline * 8 /
|
frame->f_width = pix->plane_fmt[0].bytesperline * 8 /
|
||||||
frame->fmt->depth[0];
|
frame->fmt->depth[0];
|
||||||
|
@ -1750,7 +1762,7 @@ static int __devexit fimc_remove(struct platform_device *pdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Image pixel limits, similar across several FIMC HW revisions. */
|
/* Image pixel limits, similar across several FIMC HW revisions. */
|
||||||
static struct fimc_pix_limit s5p_pix_limit[3] = {
|
static struct fimc_pix_limit s5p_pix_limit[4] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
.scaler_en_w = 3264,
|
.scaler_en_w = 3264,
|
||||||
.scaler_dis_w = 8192,
|
.scaler_dis_w = 8192,
|
||||||
|
@ -1775,6 +1787,14 @@ static struct fimc_pix_limit s5p_pix_limit[3] = {
|
||||||
.out_rot_en_w = 1280,
|
.out_rot_en_w = 1280,
|
||||||
.out_rot_dis_w = 1920,
|
.out_rot_dis_w = 1920,
|
||||||
},
|
},
|
||||||
|
[3] = {
|
||||||
|
.scaler_en_w = 1920,
|
||||||
|
.scaler_dis_w = 8192,
|
||||||
|
.in_rot_en_h = 1366,
|
||||||
|
.in_rot_dis_w = 8192,
|
||||||
|
.out_rot_en_w = 1366,
|
||||||
|
.out_rot_dis_w = 1920,
|
||||||
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct samsung_fimc_variant fimc0_variant_s5p = {
|
static struct samsung_fimc_variant fimc0_variant_s5p = {
|
||||||
|
@ -1827,7 +1847,7 @@ static struct samsung_fimc_variant fimc2_variant_s5pv210 = {
|
||||||
.pix_limit = &s5p_pix_limit[2],
|
.pix_limit = &s5p_pix_limit[2],
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct samsung_fimc_variant fimc0_variant_s5pv310 = {
|
static struct samsung_fimc_variant fimc0_variant_exynos4 = {
|
||||||
.pix_hoff = 1,
|
.pix_hoff = 1,
|
||||||
.has_inp_rot = 1,
|
.has_inp_rot = 1,
|
||||||
.has_out_rot = 1,
|
.has_out_rot = 1,
|
||||||
|
@ -1840,7 +1860,7 @@ static struct samsung_fimc_variant fimc0_variant_s5pv310 = {
|
||||||
.pix_limit = &s5p_pix_limit[1],
|
.pix_limit = &s5p_pix_limit[1],
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct samsung_fimc_variant fimc2_variant_s5pv310 = {
|
static struct samsung_fimc_variant fimc2_variant_exynos4 = {
|
||||||
.pix_hoff = 1,
|
.pix_hoff = 1,
|
||||||
.has_cistatus2 = 1,
|
.has_cistatus2 = 1,
|
||||||
.has_mainscaler_ext = 1,
|
.has_mainscaler_ext = 1,
|
||||||
|
@ -1848,7 +1868,7 @@ static struct samsung_fimc_variant fimc2_variant_s5pv310 = {
|
||||||
.min_out_pixsize = 16,
|
.min_out_pixsize = 16,
|
||||||
.hor_offs_align = 1,
|
.hor_offs_align = 1,
|
||||||
.out_buf_count = 32,
|
.out_buf_count = 32,
|
||||||
.pix_limit = &s5p_pix_limit[2],
|
.pix_limit = &s5p_pix_limit[3],
|
||||||
};
|
};
|
||||||
|
|
||||||
/* S5PC100 */
|
/* S5PC100 */
|
||||||
|
@ -1874,12 +1894,12 @@ static struct samsung_fimc_driverdata fimc_drvdata_s5pv210 = {
|
||||||
};
|
};
|
||||||
|
|
||||||
/* S5PV310, S5PC210 */
|
/* S5PV310, S5PC210 */
|
||||||
static struct samsung_fimc_driverdata fimc_drvdata_s5pv310 = {
|
static struct samsung_fimc_driverdata fimc_drvdata_exynos4 = {
|
||||||
.variant = {
|
.variant = {
|
||||||
[0] = &fimc0_variant_s5pv310,
|
[0] = &fimc0_variant_exynos4,
|
||||||
[1] = &fimc0_variant_s5pv310,
|
[1] = &fimc0_variant_exynos4,
|
||||||
[2] = &fimc0_variant_s5pv310,
|
[2] = &fimc0_variant_exynos4,
|
||||||
[3] = &fimc2_variant_s5pv310,
|
[3] = &fimc2_variant_exynos4,
|
||||||
},
|
},
|
||||||
.num_entities = 4,
|
.num_entities = 4,
|
||||||
.lclk_frequency = 166000000UL,
|
.lclk_frequency = 166000000UL,
|
||||||
|
@ -1893,8 +1913,8 @@ static struct platform_device_id fimc_driver_ids[] = {
|
||||||
.name = "s5pv210-fimc",
|
.name = "s5pv210-fimc",
|
||||||
.driver_data = (unsigned long)&fimc_drvdata_s5pv210,
|
.driver_data = (unsigned long)&fimc_drvdata_s5pv210,
|
||||||
}, {
|
}, {
|
||||||
.name = "s5pv310-fimc",
|
.name = "exynos4-fimc",
|
||||||
.driver_data = (unsigned long)&fimc_drvdata_s5pv310,
|
.driver_data = (unsigned long)&fimc_drvdata_exynos4,
|
||||||
},
|
},
|
||||||
{},
|
{},
|
||||||
};
|
};
|
||||||
|
|
|
@ -922,7 +922,7 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int
|
||||||
/* Try 2560x1920, 1280x960, 640x480, 320x240 */
|
/* Try 2560x1920, 1280x960, 640x480, 320x240 */
|
||||||
mf.width = 2560 >> shift;
|
mf.width = 2560 >> shift;
|
||||||
mf.height = 1920 >> shift;
|
mf.height = 1920 >> shift;
|
||||||
ret = v4l2_device_call_until_err(sd->v4l2_dev, 0, video,
|
ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video,
|
||||||
s_mbus_fmt, &mf);
|
s_mbus_fmt, &mf);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -1224,7 +1224,7 @@ static int client_s_fmt(struct soc_camera_device *icd,
|
||||||
struct v4l2_cropcap cap;
|
struct v4l2_cropcap cap;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = v4l2_device_call_until_err(sd->v4l2_dev, 0, video,
|
ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video,
|
||||||
s_mbus_fmt, mf);
|
s_mbus_fmt, mf);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -1254,7 +1254,7 @@ static int client_s_fmt(struct soc_camera_device *icd,
|
||||||
tmp_h = min(2 * tmp_h, max_height);
|
tmp_h = min(2 * tmp_h, max_height);
|
||||||
mf->width = tmp_w;
|
mf->width = tmp_w;
|
||||||
mf->height = tmp_h;
|
mf->height = tmp_h;
|
||||||
ret = v4l2_device_call_until_err(sd->v4l2_dev, 0, video,
|
ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video,
|
||||||
s_mbus_fmt, mf);
|
s_mbus_fmt, mf);
|
||||||
dev_geo(dev, "Camera scaled to %ux%u\n",
|
dev_geo(dev, "Camera scaled to %ux%u\n",
|
||||||
mf->width, mf->height);
|
mf->width, mf->height);
|
||||||
|
@ -1658,7 +1658,7 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
|
||||||
mf.code = xlate->code;
|
mf.code = xlate->code;
|
||||||
mf.colorspace = pix->colorspace;
|
mf.colorspace = pix->colorspace;
|
||||||
|
|
||||||
ret = v4l2_device_call_until_err(sd->v4l2_dev, 0, video, try_mbus_fmt, &mf);
|
ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, try_mbus_fmt, &mf);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
@ -1682,7 +1682,7 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
|
||||||
*/
|
*/
|
||||||
mf.width = 2560;
|
mf.width = 2560;
|
||||||
mf.height = 1920;
|
mf.height = 1920;
|
||||||
ret = v4l2_device_call_until_err(sd->v4l2_dev, 0, video,
|
ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video,
|
||||||
try_mbus_fmt, &mf);
|
try_mbus_fmt, &mf);
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
/* Shouldn't actually happen... */
|
/* Shouldn't actually happen... */
|
||||||
|
|
|
@ -38,6 +38,8 @@ struct sh_csi2 {
|
||||||
void __iomem *base;
|
void __iomem *base;
|
||||||
struct platform_device *pdev;
|
struct platform_device *pdev;
|
||||||
struct sh_csi2_client_config *client;
|
struct sh_csi2_client_config *client;
|
||||||
|
unsigned long (*query_bus_param)(struct soc_camera_device *);
|
||||||
|
int (*set_bus_param)(struct soc_camera_device *, unsigned long);
|
||||||
};
|
};
|
||||||
|
|
||||||
static int sh_csi2_try_fmt(struct v4l2_subdev *sd,
|
static int sh_csi2_try_fmt(struct v4l2_subdev *sd,
|
||||||
|
@ -208,6 +210,7 @@ static int sh_csi2_notify(struct notifier_block *nb,
|
||||||
case BUS_NOTIFY_BOUND_DRIVER:
|
case BUS_NOTIFY_BOUND_DRIVER:
|
||||||
snprintf(priv->subdev.name, V4L2_SUBDEV_NAME_SIZE, "%s%s",
|
snprintf(priv->subdev.name, V4L2_SUBDEV_NAME_SIZE, "%s%s",
|
||||||
dev_name(v4l2_dev->dev), ".mipi-csi");
|
dev_name(v4l2_dev->dev), ".mipi-csi");
|
||||||
|
priv->subdev.grp_id = (long)icd;
|
||||||
ret = v4l2_device_register_subdev(v4l2_dev, &priv->subdev);
|
ret = v4l2_device_register_subdev(v4l2_dev, &priv->subdev);
|
||||||
dev_dbg(dev, "%s(%p): ret(register_subdev) = %d\n", __func__, priv, ret);
|
dev_dbg(dev, "%s(%p): ret(register_subdev) = %d\n", __func__, priv, ret);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
|
@ -215,6 +218,8 @@ static int sh_csi2_notify(struct notifier_block *nb,
|
||||||
|
|
||||||
priv->client = pdata->clients + i;
|
priv->client = pdata->clients + i;
|
||||||
|
|
||||||
|
priv->set_bus_param = icd->ops->set_bus_param;
|
||||||
|
priv->query_bus_param = icd->ops->query_bus_param;
|
||||||
icd->ops->set_bus_param = sh_csi2_set_bus_param;
|
icd->ops->set_bus_param = sh_csi2_set_bus_param;
|
||||||
icd->ops->query_bus_param = sh_csi2_query_bus_param;
|
icd->ops->query_bus_param = sh_csi2_query_bus_param;
|
||||||
|
|
||||||
|
@ -226,8 +231,10 @@ static int sh_csi2_notify(struct notifier_block *nb,
|
||||||
priv->client = NULL;
|
priv->client = NULL;
|
||||||
|
|
||||||
/* Driver is about to be unbound */
|
/* Driver is about to be unbound */
|
||||||
icd->ops->set_bus_param = NULL;
|
icd->ops->set_bus_param = priv->set_bus_param;
|
||||||
icd->ops->query_bus_param = NULL;
|
icd->ops->query_bus_param = priv->query_bus_param;
|
||||||
|
priv->set_bus_param = NULL;
|
||||||
|
priv->query_bus_param = NULL;
|
||||||
|
|
||||||
v4l2_device_unregister_subdev(&priv->subdev);
|
v4l2_device_unregister_subdev(&priv->subdev);
|
||||||
|
|
||||||
|
|
|
@ -996,10 +996,11 @@ static void soc_camera_free_i2c(struct soc_camera_device *icd)
|
||||||
{
|
{
|
||||||
struct i2c_client *client =
|
struct i2c_client *client =
|
||||||
to_i2c_client(to_soc_camera_control(icd));
|
to_i2c_client(to_soc_camera_control(icd));
|
||||||
|
struct i2c_adapter *adap = client->adapter;
|
||||||
dev_set_drvdata(&icd->dev, NULL);
|
dev_set_drvdata(&icd->dev, NULL);
|
||||||
v4l2_device_unregister_subdev(i2c_get_clientdata(client));
|
v4l2_device_unregister_subdev(i2c_get_clientdata(client));
|
||||||
i2c_unregister_device(client);
|
i2c_unregister_device(client);
|
||||||
i2c_put_adapter(client->adapter);
|
i2c_put_adapter(adap);
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
#define soc_camera_init_i2c(icd, icl) (-ENODEV)
|
#define soc_camera_init_i2c(icd, icl) (-ENODEV)
|
||||||
|
@ -1071,6 +1072,9 @@ static int soc_camera_probe(struct device *dev)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
sd = soc_camera_to_subdev(icd);
|
||||||
|
sd->grp_id = (long)icd;
|
||||||
|
|
||||||
/* At this point client .probe() should have run already */
|
/* At this point client .probe() should have run already */
|
||||||
ret = soc_camera_init_user_formats(icd);
|
ret = soc_camera_init_user_formats(icd);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
|
@ -1092,7 +1096,6 @@ static int soc_camera_probe(struct device *dev)
|
||||||
goto evidstart;
|
goto evidstart;
|
||||||
|
|
||||||
/* Try to improve our guess of a reasonable window format */
|
/* Try to improve our guess of a reasonable window format */
|
||||||
sd = soc_camera_to_subdev(icd);
|
|
||||||
if (!v4l2_subdev_call(sd, video, g_mbus_fmt, &mf)) {
|
if (!v4l2_subdev_call(sd, video, g_mbus_fmt, &mf)) {
|
||||||
icd->user_width = mf.width;
|
icd->user_width = mf.width;
|
||||||
icd->user_height = mf.height;
|
icd->user_height = mf.height;
|
||||||
|
|
|
@ -389,7 +389,8 @@ static int v4l2_open(struct inode *inode, struct file *filp)
|
||||||
video_get(vdev);
|
video_get(vdev);
|
||||||
mutex_unlock(&videodev_lock);
|
mutex_unlock(&videodev_lock);
|
||||||
#if defined(CONFIG_MEDIA_CONTROLLER)
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
||||||
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev) {
|
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
|
||||||
|
vdev->vfl_type != VFL_TYPE_SUBDEV) {
|
||||||
entity = media_entity_get(&vdev->entity);
|
entity = media_entity_get(&vdev->entity);
|
||||||
if (!entity) {
|
if (!entity) {
|
||||||
ret = -EBUSY;
|
ret = -EBUSY;
|
||||||
|
@ -415,7 +416,8 @@ err:
|
||||||
/* decrease the refcount in case of an error */
|
/* decrease the refcount in case of an error */
|
||||||
if (ret) {
|
if (ret) {
|
||||||
#if defined(CONFIG_MEDIA_CONTROLLER)
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
||||||
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev)
|
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
|
||||||
|
vdev->vfl_type != VFL_TYPE_SUBDEV)
|
||||||
media_entity_put(entity);
|
media_entity_put(entity);
|
||||||
#endif
|
#endif
|
||||||
video_put(vdev);
|
video_put(vdev);
|
||||||
|
@ -437,7 +439,8 @@ static int v4l2_release(struct inode *inode, struct file *filp)
|
||||||
mutex_unlock(vdev->lock);
|
mutex_unlock(vdev->lock);
|
||||||
}
|
}
|
||||||
#if defined(CONFIG_MEDIA_CONTROLLER)
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
||||||
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev)
|
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
|
||||||
|
vdev->vfl_type != VFL_TYPE_SUBDEV)
|
||||||
media_entity_put(&vdev->entity);
|
media_entity_put(&vdev->entity);
|
||||||
#endif
|
#endif
|
||||||
/* decrease the refcount unconditionally since the release()
|
/* decrease the refcount unconditionally since the release()
|
||||||
|
@ -686,7 +689,8 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
|
||||||
|
|
||||||
#if defined(CONFIG_MEDIA_CONTROLLER)
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
||||||
/* Part 5: Register the entity. */
|
/* Part 5: Register the entity. */
|
||||||
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev) {
|
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
|
||||||
|
vdev->vfl_type != VFL_TYPE_SUBDEV) {
|
||||||
vdev->entity.type = MEDIA_ENT_T_DEVNODE_V4L;
|
vdev->entity.type = MEDIA_ENT_T_DEVNODE_V4L;
|
||||||
vdev->entity.name = vdev->name;
|
vdev->entity.name = vdev->name;
|
||||||
vdev->entity.v4l.major = VIDEO_MAJOR;
|
vdev->entity.v4l.major = VIDEO_MAJOR;
|
||||||
|
@ -733,7 +737,8 @@ void video_unregister_device(struct video_device *vdev)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
#if defined(CONFIG_MEDIA_CONTROLLER)
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
||||||
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev)
|
if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
|
||||||
|
vdev->vfl_type != VFL_TYPE_SUBDEV)
|
||||||
media_device_unregister_entity(&vdev->entity);
|
media_device_unregister_entity(&vdev->entity);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -37,6 +37,9 @@ module_param(debug, int, 0644);
|
||||||
#define call_qop(q, op, args...) \
|
#define call_qop(q, op, args...) \
|
||||||
(((q)->ops->op) ? ((q)->ops->op(args)) : 0)
|
(((q)->ops->op) ? ((q)->ops->op(args)) : 0)
|
||||||
|
|
||||||
|
#define V4L2_BUFFER_STATE_FLAGS (V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_QUEUED | \
|
||||||
|
V4L2_BUF_FLAG_DONE | V4L2_BUF_FLAG_ERROR)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* __vb2_buf_mem_alloc() - allocate video memory for the given buffer
|
* __vb2_buf_mem_alloc() - allocate video memory for the given buffer
|
||||||
*/
|
*/
|
||||||
|
@ -51,7 +54,7 @@ static int __vb2_buf_mem_alloc(struct vb2_buffer *vb,
|
||||||
for (plane = 0; plane < vb->num_planes; ++plane) {
|
for (plane = 0; plane < vb->num_planes; ++plane) {
|
||||||
mem_priv = call_memop(q, plane, alloc, q->alloc_ctx[plane],
|
mem_priv = call_memop(q, plane, alloc, q->alloc_ctx[plane],
|
||||||
plane_sizes[plane]);
|
plane_sizes[plane]);
|
||||||
if (!mem_priv)
|
if (IS_ERR_OR_NULL(mem_priv))
|
||||||
goto free;
|
goto free;
|
||||||
|
|
||||||
/* Associate allocator private data with this plane */
|
/* Associate allocator private data with this plane */
|
||||||
|
@ -284,7 +287,7 @@ static int __fill_v4l2_buffer(struct vb2_buffer *vb, struct v4l2_buffer *b)
|
||||||
struct vb2_queue *q = vb->vb2_queue;
|
struct vb2_queue *q = vb->vb2_queue;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
/* Copy back data such as timestamp, input, etc. */
|
/* Copy back data such as timestamp, flags, input, etc. */
|
||||||
memcpy(b, &vb->v4l2_buf, offsetof(struct v4l2_buffer, m));
|
memcpy(b, &vb->v4l2_buf, offsetof(struct v4l2_buffer, m));
|
||||||
b->input = vb->v4l2_buf.input;
|
b->input = vb->v4l2_buf.input;
|
||||||
b->reserved = vb->v4l2_buf.reserved;
|
b->reserved = vb->v4l2_buf.reserved;
|
||||||
|
@ -313,7 +316,10 @@ static int __fill_v4l2_buffer(struct vb2_buffer *vb, struct v4l2_buffer *b)
|
||||||
b->m.userptr = vb->v4l2_planes[0].m.userptr;
|
b->m.userptr = vb->v4l2_planes[0].m.userptr;
|
||||||
}
|
}
|
||||||
|
|
||||||
b->flags = 0;
|
/*
|
||||||
|
* Clear any buffer state related flags.
|
||||||
|
*/
|
||||||
|
b->flags &= ~V4L2_BUFFER_STATE_FLAGS;
|
||||||
|
|
||||||
switch (vb->state) {
|
switch (vb->state) {
|
||||||
case VB2_BUF_STATE_QUEUED:
|
case VB2_BUF_STATE_QUEUED:
|
||||||
|
@ -519,6 +525,7 @@ int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
|
||||||
num_buffers = min_t(unsigned int, req->count, VIDEO_MAX_FRAME);
|
num_buffers = min_t(unsigned int, req->count, VIDEO_MAX_FRAME);
|
||||||
memset(plane_sizes, 0, sizeof(plane_sizes));
|
memset(plane_sizes, 0, sizeof(plane_sizes));
|
||||||
memset(q->alloc_ctx, 0, sizeof(q->alloc_ctx));
|
memset(q->alloc_ctx, 0, sizeof(q->alloc_ctx));
|
||||||
|
q->memory = req->memory;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Ask the driver how many buffers and planes per buffer it requires.
|
* Ask the driver how many buffers and planes per buffer it requires.
|
||||||
|
@ -560,8 +567,6 @@ int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
|
||||||
ret = num_buffers;
|
ret = num_buffers;
|
||||||
}
|
}
|
||||||
|
|
||||||
q->memory = req->memory;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Return the number of successfully allocated buffers
|
* Return the number of successfully allocated buffers
|
||||||
* to the userspace.
|
* to the userspace.
|
||||||
|
@ -715,6 +720,8 @@ static int __fill_vb2_buffer(struct vb2_buffer *vb, struct v4l2_buffer *b,
|
||||||
|
|
||||||
vb->v4l2_buf.field = b->field;
|
vb->v4l2_buf.field = b->field;
|
||||||
vb->v4l2_buf.timestamp = b->timestamp;
|
vb->v4l2_buf.timestamp = b->timestamp;
|
||||||
|
vb->v4l2_buf.input = b->input;
|
||||||
|
vb->v4l2_buf.flags = b->flags & ~V4L2_BUFFER_STATE_FLAGS;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -46,7 +46,7 @@ static void *vb2_dma_contig_alloc(void *alloc_ctx, unsigned long size)
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
if (!buf->vaddr) {
|
if (!buf->vaddr) {
|
||||||
dev_err(conf->dev, "dma_alloc_coherent of size %ld failed\n",
|
dev_err(conf->dev, "dma_alloc_coherent of size %ld failed\n",
|
||||||
buf->size);
|
size);
|
||||||
kfree(buf);
|
kfree(buf);
|
||||||
return ERR_PTR(-ENOMEM);
|
return ERR_PTR(-ENOMEM);
|
||||||
}
|
}
|
||||||
|
|
|
@ -400,7 +400,7 @@ static uint16_t __init doc200x_ident_chip(struct mtd_info *mtd, int nr)
|
||||||
doc200x_hwcontrol(mtd, 0, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
|
doc200x_hwcontrol(mtd, 0, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
|
||||||
doc200x_hwcontrol(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
|
doc200x_hwcontrol(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
|
||||||
|
|
||||||
/* We can't' use dev_ready here, but at least we wait for the
|
/* We can't use dev_ready here, but at least we wait for the
|
||||||
* command to complete
|
* command to complete
|
||||||
*/
|
*/
|
||||||
udelay(50);
|
udelay(50);
|
||||||
|
|
|
@ -173,7 +173,7 @@ static int pcmcia_access_config(struct pcmcia_device *p_dev,
|
||||||
c = p_dev->function_config;
|
c = p_dev->function_config;
|
||||||
|
|
||||||
if (!(c->state & CONFIG_LOCKED)) {
|
if (!(c->state & CONFIG_LOCKED)) {
|
||||||
dev_dbg(&p_dev->dev, "Configuration isn't't locked\n");
|
dev_dbg(&p_dev->dev, "Configuration isn't locked\n");
|
||||||
mutex_unlock(&s->ops_mutex);
|
mutex_unlock(&s->ops_mutex);
|
||||||
return -EACCES;
|
return -EACCES;
|
||||||
}
|
}
|
||||||
|
|
|
@ -257,6 +257,8 @@ static int __devinit max8925_rtc_probe(struct platform_device *pdev)
|
||||||
goto out_irq;
|
goto out_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
dev_set_drvdata(&pdev->dev, info);
|
||||||
|
|
||||||
info->rtc_dev = rtc_device_register("max8925-rtc", &pdev->dev,
|
info->rtc_dev = rtc_device_register("max8925-rtc", &pdev->dev,
|
||||||
&max8925_rtc_ops, THIS_MODULE);
|
&max8925_rtc_ops, THIS_MODULE);
|
||||||
ret = PTR_ERR(info->rtc_dev);
|
ret = PTR_ERR(info->rtc_dev);
|
||||||
|
@ -265,7 +267,6 @@ static int __devinit max8925_rtc_probe(struct platform_device *pdev)
|
||||||
goto out_rtc;
|
goto out_rtc;
|
||||||
}
|
}
|
||||||
|
|
||||||
dev_set_drvdata(&pdev->dev, info);
|
|
||||||
platform_set_drvdata(pdev, info);
|
platform_set_drvdata(pdev, info);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -239,7 +239,6 @@ static void dasd_ext_handler(unsigned int ext_int_code,
|
||||||
addr_t ip;
|
addr_t ip;
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
kstat_cpu(smp_processor_id()).irqs[EXTINT_DSD]++;
|
|
||||||
switch (ext_int_code >> 24) {
|
switch (ext_int_code >> 24) {
|
||||||
case DASD_DIAG_CODE_31BIT:
|
case DASD_DIAG_CODE_31BIT:
|
||||||
ip = (addr_t) param32;
|
ip = (addr_t) param32;
|
||||||
|
@ -250,6 +249,7 @@ static void dasd_ext_handler(unsigned int ext_int_code,
|
||||||
default:
|
default:
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
kstat_cpu(smp_processor_id()).irqs[EXTINT_DSD]++;
|
||||||
if (!ip) { /* no intparm: unsolicited interrupt */
|
if (!ip) { /* no intparm: unsolicited interrupt */
|
||||||
DBF_EVENT(DBF_NOTICE, "%s", "caught unsolicited "
|
DBF_EVENT(DBF_NOTICE, "%s", "caught unsolicited "
|
||||||
"interrupt");
|
"interrupt");
|
||||||
|
|
|
@ -381,10 +381,10 @@ static void kvm_extint_handler(unsigned int ext_int_code,
|
||||||
u16 subcode;
|
u16 subcode;
|
||||||
u32 param;
|
u32 param;
|
||||||
|
|
||||||
kstat_cpu(smp_processor_id()).irqs[EXTINT_VRT]++;
|
|
||||||
subcode = ext_int_code >> 16;
|
subcode = ext_int_code >> 16;
|
||||||
if ((subcode & 0xff00) != VIRTIO_SUBCODE_64)
|
if ((subcode & 0xff00) != VIRTIO_SUBCODE_64)
|
||||||
return;
|
return;
|
||||||
|
kstat_cpu(smp_processor_id()).irqs[EXTINT_VRT]++;
|
||||||
|
|
||||||
/* The LSB might be overloaded, we have to mask it */
|
/* The LSB might be overloaded, we have to mask it */
|
||||||
vq = (struct virtqueue *)(param64 & ~1UL);
|
vq = (struct virtqueue *)(param64 & ~1UL);
|
||||||
|
|
|
@ -394,12 +394,14 @@ int scsi_dh_activate(struct request_queue *q, activate_complete fn, void *data)
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
struct scsi_device *sdev;
|
struct scsi_device *sdev;
|
||||||
struct scsi_device_handler *scsi_dh = NULL;
|
struct scsi_device_handler *scsi_dh = NULL;
|
||||||
|
struct device *dev = NULL;
|
||||||
|
|
||||||
spin_lock_irqsave(q->queue_lock, flags);
|
spin_lock_irqsave(q->queue_lock, flags);
|
||||||
sdev = q->queuedata;
|
sdev = q->queuedata;
|
||||||
if (sdev && sdev->scsi_dh_data)
|
if (sdev && sdev->scsi_dh_data)
|
||||||
scsi_dh = sdev->scsi_dh_data->scsi_dh;
|
scsi_dh = sdev->scsi_dh_data->scsi_dh;
|
||||||
if (!scsi_dh || !get_device(&sdev->sdev_gendev) ||
|
dev = get_device(&sdev->sdev_gendev);
|
||||||
|
if (!scsi_dh || !dev ||
|
||||||
sdev->sdev_state == SDEV_CANCEL ||
|
sdev->sdev_state == SDEV_CANCEL ||
|
||||||
sdev->sdev_state == SDEV_DEL)
|
sdev->sdev_state == SDEV_DEL)
|
||||||
err = SCSI_DH_NOSYS;
|
err = SCSI_DH_NOSYS;
|
||||||
|
@ -410,12 +412,13 @@ int scsi_dh_activate(struct request_queue *q, activate_complete fn, void *data)
|
||||||
if (err) {
|
if (err) {
|
||||||
if (fn)
|
if (fn)
|
||||||
fn(data, err);
|
fn(data, err);
|
||||||
return err;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (scsi_dh->activate)
|
if (scsi_dh->activate)
|
||||||
err = scsi_dh->activate(sdev, fn, data);
|
err = scsi_dh->activate(sdev, fn, data);
|
||||||
put_device(&sdev->sdev_gendev);
|
out:
|
||||||
|
put_device(dev);
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(scsi_dh_activate);
|
EXPORT_SYMBOL_GPL(scsi_dh_activate);
|
||||||
|
|
|
@ -688,6 +688,13 @@ _ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Check for overflow and wraparound */
|
||||||
|
if (karg.data_sge_offset * 4 > ioc->request_sz ||
|
||||||
|
karg.data_sge_offset > (UINT_MAX / 4)) {
|
||||||
|
ret = -EINVAL;
|
||||||
|
goto out;
|
||||||
|
}
|
||||||
|
|
||||||
/* copy in request message frame from user */
|
/* copy in request message frame from user */
|
||||||
if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) {
|
if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) {
|
||||||
printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__, __LINE__,
|
printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__, __LINE__,
|
||||||
|
@ -1963,7 +1970,7 @@ _ctl_diag_read_buffer(void __user *arg, enum block_state state)
|
||||||
Mpi2DiagBufferPostReply_t *mpi_reply;
|
Mpi2DiagBufferPostReply_t *mpi_reply;
|
||||||
int rc, i;
|
int rc, i;
|
||||||
u8 buffer_type;
|
u8 buffer_type;
|
||||||
unsigned long timeleft;
|
unsigned long timeleft, request_size, copy_size;
|
||||||
u16 smid;
|
u16 smid;
|
||||||
u16 ioc_status;
|
u16 ioc_status;
|
||||||
u8 issue_reset = 0;
|
u8 issue_reset = 0;
|
||||||
|
@ -1999,6 +2006,8 @@ _ctl_diag_read_buffer(void __user *arg, enum block_state state)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
request_size = ioc->diag_buffer_sz[buffer_type];
|
||||||
|
|
||||||
if ((karg.starting_offset % 4) || (karg.bytes_to_read % 4)) {
|
if ((karg.starting_offset % 4) || (karg.bytes_to_read % 4)) {
|
||||||
printk(MPT2SAS_ERR_FMT "%s: either the starting_offset "
|
printk(MPT2SAS_ERR_FMT "%s: either the starting_offset "
|
||||||
"or bytes_to_read are not 4 byte aligned\n", ioc->name,
|
"or bytes_to_read are not 4 byte aligned\n", ioc->name,
|
||||||
|
@ -2006,13 +2015,23 @@ _ctl_diag_read_buffer(void __user *arg, enum block_state state)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (karg.starting_offset > request_size)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
diag_data = (void *)(request_data + karg.starting_offset);
|
diag_data = (void *)(request_data + karg.starting_offset);
|
||||||
dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: diag_buffer(%p), "
|
dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: diag_buffer(%p), "
|
||||||
"offset(%d), sz(%d)\n", ioc->name, __func__,
|
"offset(%d), sz(%d)\n", ioc->name, __func__,
|
||||||
diag_data, karg.starting_offset, karg.bytes_to_read));
|
diag_data, karg.starting_offset, karg.bytes_to_read));
|
||||||
|
|
||||||
|
/* Truncate data on requests that are too large */
|
||||||
|
if ((diag_data + karg.bytes_to_read < diag_data) ||
|
||||||
|
(diag_data + karg.bytes_to_read > request_data + request_size))
|
||||||
|
copy_size = request_size - karg.starting_offset;
|
||||||
|
else
|
||||||
|
copy_size = karg.bytes_to_read;
|
||||||
|
|
||||||
if (copy_to_user((void __user *)uarg->diagnostic_data,
|
if (copy_to_user((void __user *)uarg->diagnostic_data,
|
||||||
diag_data, karg.bytes_to_read)) {
|
diag_data, copy_size)) {
|
||||||
printk(MPT2SAS_ERR_FMT "%s: Unable to write "
|
printk(MPT2SAS_ERR_FMT "%s: Unable to write "
|
||||||
"mpt_diag_read_buffer_t data @ %p\n", ioc->name,
|
"mpt_diag_read_buffer_t data @ %p\n", ioc->name,
|
||||||
__func__, diag_data);
|
__func__, diag_data);
|
||||||
|
|
|
@ -3814,6 +3814,9 @@ static long pmcraid_ioctl_passthrough(
|
||||||
rc = -EFAULT;
|
rc = -EFAULT;
|
||||||
goto out_free_buffer;
|
goto out_free_buffer;
|
||||||
}
|
}
|
||||||
|
} else if (request_size < 0) {
|
||||||
|
rc = -EINVAL;
|
||||||
|
goto out_free_buffer;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* check if we have any additional command parameters */
|
/* check if we have any additional command parameters */
|
||||||
|
|
|
@ -322,14 +322,8 @@ static void scsi_device_dev_release_usercontext(struct work_struct *work)
|
||||||
kfree(evt);
|
kfree(evt);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (sdev->request_queue) {
|
/* NULL queue means the device can't be used */
|
||||||
sdev->request_queue->queuedata = NULL;
|
|
||||||
/* user context needed to free queue */
|
|
||||||
scsi_free_queue(sdev->request_queue);
|
|
||||||
/* temporary expedient, try to catch use of queue lock
|
|
||||||
* after free of sdev */
|
|
||||||
sdev->request_queue = NULL;
|
sdev->request_queue = NULL;
|
||||||
}
|
|
||||||
|
|
||||||
scsi_target_reap(scsi_target(sdev));
|
scsi_target_reap(scsi_target(sdev));
|
||||||
|
|
||||||
|
@ -937,6 +931,12 @@ void __scsi_remove_device(struct scsi_device *sdev)
|
||||||
if (sdev->host->hostt->slave_destroy)
|
if (sdev->host->hostt->slave_destroy)
|
||||||
sdev->host->hostt->slave_destroy(sdev);
|
sdev->host->hostt->slave_destroy(sdev);
|
||||||
transport_destroy_device(dev);
|
transport_destroy_device(dev);
|
||||||
|
|
||||||
|
/* cause the request function to reject all I/O requests */
|
||||||
|
sdev->request_queue->queuedata = NULL;
|
||||||
|
|
||||||
|
/* Freeing the queue signals to block that we're done */
|
||||||
|
scsi_free_queue(sdev->request_queue);
|
||||||
put_device(dev);
|
put_device(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
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