Merge branch 'remotes/lorenzo/pci/cadence'

- Add DT binding and TI j721e support for refclk to PCIe connector (Kishon
  Vijay Abraham I)

- Add host mode and endpoint mode DT bindings for TI AM64 SoC (Kishon Vijay
  Abraham I)

* remotes/lorenzo/pci/cadence:
  PCI: j721e: Add support to provide refclk to PCIe connector
  dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC
  dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC
  dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
This commit is contained in:
Bjorn Helgaas 2021-05-04 10:43:26 -05:00
Родитель 531a953da3 49e0efdce7
Коммит 3ec17ca688
3 изменённых файлов: 40 добавлений и 11 удалений

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@ -16,13 +16,15 @@ allOf:
properties: properties:
compatible: compatible:
oneOf: oneOf:
- const: ti,j721e-pcie-ep
- description: PCIe EP controller in AM64
items:
- const: ti,am64-pcie-ep
- const: ti,j721e-pcie-ep
- description: PCIe EP controller in J7200 - description: PCIe EP controller in J7200
items: items:
- const: ti,j7200-pcie-ep - const: ti,j7200-pcie-ep
- const: ti,j721e-pcie-ep - const: ti,j721e-pcie-ep
- description: PCIe EP controller in J721E
items:
- const: ti,j721e-pcie-ep
reg: reg:
maxItems: 4 maxItems: 4
@ -66,7 +68,6 @@ required:
- power-domains - power-domains
- clocks - clocks
- clock-names - clock-names
- dma-coherent
- max-functions - max-functions
- phys - phys
- phy-names - phy-names

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@ -16,13 +16,15 @@ allOf:
properties: properties:
compatible: compatible:
oneOf: oneOf:
- const: ti,j721e-pcie-host
- description: PCIe controller in AM64
items:
- const: ti,am64-pcie-host
- const: ti,j721e-pcie-host
- description: PCIe controller in J7200 - description: PCIe controller in J7200
items: items:
- const: ti,j7200-pcie-host - const: ti,j7200-pcie-host
- const: ti,j721e-pcie-host - const: ti,j721e-pcie-host
- description: PCIe controller in J721E
items:
- const: ti,j721e-pcie-host
reg: reg:
maxItems: 4 maxItems: 4
@ -46,12 +48,17 @@ properties:
maxItems: 1 maxItems: 1
clocks: clocks:
maxItems: 1 minItems: 1
description: clock-specifier to represent input to the PCIe maxItems: 2
description: |+
clock-specifier to represent input to the PCIe for 1 item.
2nd item if present represents reference clock to the connector.
clock-names: clock-names:
minItems: 1
items: items:
- const: fck - const: fck
- const: pcie_refclk
vendor-id: vendor-id:
const: 0x104c const: 0x104c
@ -62,6 +69,8 @@ properties:
- const: 0xb00d - const: 0xb00d
- items: - items:
- const: 0xb00f - const: 0xb00f
- items:
- const: 0xb010
msi-map: true msi-map: true
@ -78,7 +87,6 @@ required:
- vendor-id - vendor-id
- device-id - device-id
- msi-map - msi-map
- dma-coherent
- dma-ranges - dma-ranges
- ranges - ranges
- reset-gpios - reset-gpios

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@ -6,6 +6,7 @@
* Author: Kishon Vijay Abraham I <kishon@ti.com> * Author: Kishon Vijay Abraham I <kishon@ti.com>
*/ */
#include <linux/clk.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/gpio/consumer.h> #include <linux/gpio/consumer.h>
#include <linux/io.h> #include <linux/io.h>
@ -50,6 +51,7 @@ enum link_status {
struct j721e_pcie { struct j721e_pcie {
struct device *dev; struct device *dev;
struct clk *refclk;
u32 mode; u32 mode;
u32 num_lanes; u32 num_lanes;
struct cdns_pcie *cdns_pcie; struct cdns_pcie *cdns_pcie;
@ -312,6 +314,7 @@ static int j721e_pcie_probe(struct platform_device *pdev)
struct cdns_pcie_ep *ep; struct cdns_pcie_ep *ep;
struct gpio_desc *gpiod; struct gpio_desc *gpiod;
void __iomem *base; void __iomem *base;
struct clk *clk;
u32 num_lanes; u32 num_lanes;
u32 mode; u32 mode;
int ret; int ret;
@ -411,6 +414,20 @@ static int j721e_pcie_probe(struct platform_device *pdev)
goto err_get_sync; goto err_get_sync;
} }
clk = devm_clk_get_optional(dev, "pcie_refclk");
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
dev_err(dev, "failed to get pcie_refclk\n");
goto err_pcie_setup;
}
ret = clk_prepare_enable(clk);
if (ret) {
dev_err(dev, "failed to enable pcie_refclk\n");
goto err_get_sync;
}
pcie->refclk = clk;
/* /*
* "Power Sequencing and Reset Signal Timings" table in * "Power Sequencing and Reset Signal Timings" table in
* PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0 * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0
@ -425,8 +442,10 @@ static int j721e_pcie_probe(struct platform_device *pdev)
} }
ret = cdns_pcie_host_setup(rc); ret = cdns_pcie_host_setup(rc);
if (ret < 0) if (ret < 0) {
clk_disable_unprepare(pcie->refclk);
goto err_pcie_setup; goto err_pcie_setup;
}
break; break;
case PCI_MODE_EP: case PCI_MODE_EP:
@ -479,6 +498,7 @@ static int j721e_pcie_remove(struct platform_device *pdev)
struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; struct cdns_pcie *cdns_pcie = pcie->cdns_pcie;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
clk_disable_unprepare(pcie->refclk);
cdns_pcie_disable_phy(cdns_pcie); cdns_pcie_disable_phy(cdns_pcie);
pm_runtime_put(dev); pm_runtime_put(dev);
pm_runtime_disable(dev); pm_runtime_disable(dev);