rtw89: pci: support variant of fill_txaddr_info
The txaddr_info is used to fill the DMA address of skb->data. The v1 version can support up to 10 entries, but the maximum size of each entry is 2047, so it fill more than one entry for large packet, like 3000 bytes. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220318023214.32411-9-pkshih@realtek.com
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6d5b5d6290
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@ -721,6 +721,7 @@ struct rtw89_tx_desc_info {
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u8 ampdu_density;
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u8 ampdu_num;
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bool sec_en;
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u8 addr_info_nr;
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u8 sec_type;
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u8 sec_cam_idx;
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u16 data_rate;
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@ -977,6 +977,58 @@ static void rtw89_pci_ops_flush_queues(struct rtw89_dev *rtwdev, u32 queues,
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__rtw89_pci_ops_flush_txchs(rtwdev, BIT(RTW89_TXCH_NUM) - 1, drop);
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}
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u32 rtw89_pci_fill_txaddr_info(struct rtw89_dev *rtwdev,
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void *txaddr_info_addr, u32 total_len,
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dma_addr_t dma, u8 *add_info_nr)
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{
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struct rtw89_pci_tx_addr_info_32 *txaddr_info = txaddr_info_addr;
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txaddr_info->length = cpu_to_le16(total_len);
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txaddr_info->option = cpu_to_le16(RTW89_PCI_ADDR_MSDU_LS |
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RTW89_PCI_ADDR_NUM(1));
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txaddr_info->dma = cpu_to_le32(dma);
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*add_info_nr = 1;
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return sizeof(*txaddr_info);
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}
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EXPORT_SYMBOL(rtw89_pci_fill_txaddr_info);
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u32 rtw89_pci_fill_txaddr_info_v1(struct rtw89_dev *rtwdev,
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void *txaddr_info_addr, u32 total_len,
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dma_addr_t dma, u8 *add_info_nr)
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{
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struct rtw89_pci_tx_addr_info_32_v1 *txaddr_info = txaddr_info_addr;
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u32 remain = total_len;
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u32 len;
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u16 length_option;
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int n;
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for (n = 0; n < RTW89_TXADDR_INFO_NR_V1 && remain; n++) {
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len = remain >= TXADDR_INFO_LENTHG_V1_MAX ?
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TXADDR_INFO_LENTHG_V1_MAX : remain;
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remain -= len;
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length_option = FIELD_PREP(B_PCIADDR_LEN_V1_MASK, len) |
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FIELD_PREP(B_PCIADDR_HIGH_SEL_V1_MASK, 0) |
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FIELD_PREP(B_PCIADDR_LS_V1_MASK, remain == 0);
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txaddr_info->length_opt = cpu_to_le16(length_option);
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txaddr_info->dma_low_lsb = cpu_to_le16(FIELD_GET(GENMASK(15, 0), dma));
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txaddr_info->dma_low_msb = cpu_to_le16(FIELD_GET(GENMASK(31, 16), dma));
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dma += len;
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txaddr_info++;
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}
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WARN_ONCE(remain, "length overflow remain=%u total_len=%u",
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remain, total_len);
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*add_info_nr = n;
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return n * sizeof(*txaddr_info);
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}
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EXPORT_SYMBOL(rtw89_pci_fill_txaddr_info_v1);
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static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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struct rtw89_pci_tx_ring *tx_ring,
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struct rtw89_pci_tx_wd *txwd,
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@ -987,7 +1039,7 @@ static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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struct rtw89_txwd_body *txwd_body;
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struct rtw89_txwd_info *txwd_info;
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struct rtw89_pci_tx_wp_info *txwp_info;
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struct rtw89_pci_tx_addr_info_32 *txaddr_info;
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void *txaddr_info_addr;
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struct pci_dev *pdev = rtwpci->pdev;
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struct sk_buff *skb = tx_req->skb;
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struct rtw89_pci_tx_data *tx_data = RTW89_PCI_TX_SKB_CB(skb);
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@ -1009,7 +1061,6 @@ static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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tx_data->dma = dma;
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txaddr_info_len = sizeof(*txaddr_info);
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txwp_len = sizeof(*txwp_info);
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txwd_len = sizeof(*txwd_body);
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txwd_len += en_wd_info ? sizeof(*txwd_info) : 0;
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@ -1021,11 +1072,10 @@ static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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txwp_info->seq3 = 0;
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tx_ring->tx_cnt++;
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txaddr_info = txwd->vaddr + txwd_len + txwp_len;
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txaddr_info->length = cpu_to_le16(skb->len);
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txaddr_info->option = cpu_to_le16(RTW89_PCI_ADDR_MSDU_LS |
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RTW89_PCI_ADDR_NUM(1));
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txaddr_info->dma = cpu_to_le32(dma);
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txaddr_info_addr = txwd->vaddr + txwd_len + txwp_len;
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txaddr_info_len =
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rtw89_chip_fill_txaddr_info(rtwdev, txaddr_info_addr, skb->len,
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dma, &desc_info->addr_info_nr);
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txwd->len = txwd_len + txwp_len + txaddr_info_len;
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@ -448,6 +448,10 @@ struct rtw89_pci_ch_dma_addr_set {
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struct rtw89_pci_info {
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const struct rtw89_pci_ch_dma_addr_set *dma_addr_set;
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u32 (*fill_txaddr_info)(struct rtw89_dev *rtwdev,
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void *txaddr_info_addr, u32 total_len,
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dma_addr_t dma, u8 *add_info_nr);
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};
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struct rtw89_pci_bd_ram {
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@ -493,6 +497,18 @@ struct rtw89_pci_tx_addr_info_32 {
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__le32 dma;
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} __packed;
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#define RTW89_TXADDR_INFO_NR_V1 10
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struct rtw89_pci_tx_addr_info_32_v1 {
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__le16 length_opt;
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#define B_PCIADDR_LEN_V1_MASK GENMASK(10, 0)
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#define B_PCIADDR_HIGH_SEL_V1_MASK GENMASK(14, 11)
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#define B_PCIADDR_LS_V1_MASK BIT(15)
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#define TXADDR_INFO_LENTHG_V1_MAX ALIGN_DOWN(BIT(11) - 1, 4)
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__le16 dma_low_lsb;
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__le16 dma_low_msb;
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} __packed;
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#define RTW89_PCI_RPP_POLLUTED BIT(31)
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#define RTW89_PCI_RPP_SEQ GENMASK(30, 16)
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#define RTW89_PCI_RPP_TX_STATUS GENMASK(15, 13)
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@ -698,5 +714,22 @@ struct pci_device_id;
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int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id);
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void rtw89_pci_remove(struct pci_dev *pdev);
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u32 rtw89_pci_fill_txaddr_info(struct rtw89_dev *rtwdev,
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void *txaddr_info_addr, u32 total_len,
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dma_addr_t dma, u8 *add_info_nr);
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u32 rtw89_pci_fill_txaddr_info_v1(struct rtw89_dev *rtwdev,
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void *txaddr_info_addr, u32 total_len,
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dma_addr_t dma, u8 *add_info_nr);
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static inline
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u32 rtw89_chip_fill_txaddr_info(struct rtw89_dev *rtwdev,
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void *txaddr_info_addr, u32 total_len,
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dma_addr_t dma, u8 *add_info_nr)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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return info->fill_txaddr_info(rtwdev, txaddr_info_addr, total_len,
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dma, add_info_nr);
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}
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#endif
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@ -10,6 +10,8 @@
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static const struct rtw89_pci_info rtw8852a_pci_info = {
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.dma_addr_set = &rtw89_pci_ch_dma_addr_set,
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.fill_txaddr_info = rtw89_pci_fill_txaddr_info,
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};
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static const struct rtw89_driver_info rtw89_8852ae_info = {
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@ -11,6 +11,8 @@
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static const struct rtw89_pci_info rtw8852c_pci_info = {
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.dma_addr_set = &rtw89_pci_ch_dma_addr_set_v1,
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.fill_txaddr_info = rtw89_pci_fill_txaddr_info_v1,
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};
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static const struct rtw89_driver_info rtw89_8852ce_info = {
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